FR2956932B1 - Procede de test de la resistance d'un circuit integre a une analyse par canal auxiliaire - Google Patents
Procede de test de la resistance d'un circuit integre a une analyse par canal auxiliaireInfo
- Publication number
- FR2956932B1 FR2956932B1 FR1000833A FR1000833A FR2956932B1 FR 2956932 B1 FR2956932 B1 FR 2956932B1 FR 1000833 A FR1000833 A FR 1000833A FR 1000833 A FR1000833 A FR 1000833A FR 2956932 B1 FR2956932 B1 FR 2956932B1
- Authority
- FR
- France
- Prior art keywords
- integrated circuit
- testing
- resistance
- subset
- auxiliary channel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
- G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
- G06F7/722—Modular multiplication
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K7/00—Methods or arrangements for sensing record carriers, e.g. for reading patterns
- G06K7/0008—General problems related to the reading of electronic memory record carriers, independent of its reading method, e.g. power transfer
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09C—CIPHERING OR DECIPHERING APPARATUS FOR CRYPTOGRAPHIC OR OTHER PURPOSES INVOLVING THE NEED FOR SECRECY
- G09C1/00—Apparatus or methods whereby a given sequence of signs, e.g. an intelligible text, is transformed into an unintelligible sequence of signs by transposing the signs or groups of signs or by replacing them by others according to a predetermined system
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/002—Countermeasures against attacks on cryptographic mechanisms
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/30—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy
- H04L9/3006—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy underlying computational problems or public-key parameters
- H04L9/302—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy underlying computational problems or public-key parameters involving the integer factorization problem, e.g. RSA or quadratic sieve [QS] schemes
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/72—Indexing scheme relating to groups G06F7/72 - G06F7/729
- G06F2207/7219—Countermeasures against side channel or fault attacks
- G06F2207/7223—Randomisation as countermeasure against side channel attacks
- G06F2207/7233—Masking, e.g. (A**e)+r mod n
- G06F2207/7238—Operand masking, i.e. message blinding, e.g. (A+r)**e mod n; k.(P+R)
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/72—Indexing scheme relating to groups G06F7/72 - G06F7/729
- G06F2207/7219—Countermeasures against side channel or fault attacks
- G06F2207/7223—Randomisation as countermeasure against side channel attacks
- G06F2207/7252—Randomisation as countermeasure against side channel attacks of operation order, e.g. starting to treat the exponent at a random place, or in a randomly chosen direction
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
- G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
- G06F7/723—Modular exponentiation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
- H04L2209/26—Testing cryptographic entity, e.g. testing integrity of encryption key or encryption algorithm
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computing Systems (AREA)
- Computer Security & Cryptography (AREA)
- Computer Networks & Wireless Communication (AREA)
- Computational Mathematics (AREA)
- Signal Processing (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Mathematical Physics (AREA)
- General Engineering & Computer Science (AREA)
- Artificial Intelligence (AREA)
- Computer Vision & Pattern Recognition (AREA)
- Semiconductor Integrated Circuits (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Measurement Of Resistance Or Impedance (AREA)
Priority Applications (9)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR1000833A FR2956932B1 (fr) | 2010-03-01 | 2010-03-01 | Procede de test de la resistance d'un circuit integre a une analyse par canal auxiliaire |
| EP11001428.9A EP2365659B1 (fr) | 2010-03-01 | 2011-02-21 | Procédé de test de la résistance d'un circuit intégré à une analyse par canal auxiliaire |
| EP11001491.7A EP2363975B1 (fr) | 2010-03-01 | 2011-02-23 | Circuit intégré protégé contre une analyse par canal auxiliaire horizontale |
| CA2732651A CA2732651C (fr) | 2010-03-01 | 2011-02-24 | Procede de test de la resistance d'un circuit integre a une analyse par canal auxiliaire |
| CA2732444A CA2732444C (fr) | 2010-03-01 | 2011-02-24 | Circuit integre protege contre une analyse par canal auxiliaire horizontale |
| CN201110049399.9A CN102193060B (zh) | 2010-03-01 | 2011-03-01 | 用于测试集成电路设备的方法和系统 |
| CN2011100497307A CN102193773A (zh) | 2010-03-01 | 2011-03-01 | 针对水平旁路分析而受到保护的集成电路 |
| KR1020110018644A KR101792650B1 (ko) | 2010-03-01 | 2011-03-02 | 사이드 채널 분석에 대한 집적 회로의 저항을 테스트하는 방법 |
| KR1020110018646A KR20110099185A (ko) | 2010-03-01 | 2011-03-02 | 수평 사이드 채널 분석에 대항하여 보호된 집적 회로 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR1000833A FR2956932B1 (fr) | 2010-03-01 | 2010-03-01 | Procede de test de la resistance d'un circuit integre a une analyse par canal auxiliaire |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| FR2956932A1 FR2956932A1 (fr) | 2011-09-02 |
| FR2956932B1 true FR2956932B1 (fr) | 2012-08-17 |
Family
ID=42938534
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR1000833A Active FR2956932B1 (fr) | 2010-03-01 | 2010-03-01 | Procede de test de la resistance d'un circuit integre a une analyse par canal auxiliaire |
Country Status (1)
| Country | Link |
|---|---|
| FR (1) | FR2956932B1 (fr) |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3926532B2 (ja) * | 2000-03-16 | 2007-06-06 | 株式会社日立製作所 | 情報処理装置、情報処理方法、及びカード部材 |
| FR2818846B1 (fr) * | 2000-12-22 | 2004-03-05 | Gemplus Card Int | Procede de contre-mesure dans un composant electronique mettant en oeuvre un algorithme de cryptographie |
-
2010
- 2010-03-01 FR FR1000833A patent/FR2956932B1/fr active Active
Also Published As
| Publication number | Publication date |
|---|---|
| FR2956932A1 (fr) | 2011-09-02 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| CA | Change of address |
Effective date: 20140129 |
|
| CD | Change of name or company name |
Owner name: INSIDE SECURE, FR Effective date: 20140129 |
|
| PLFP | Fee payment |
Year of fee payment: 7 |
|
| PLFP | Fee payment |
Year of fee payment: 8 |