FR2995135B1 - Procede de realisation de transistors fet - Google Patents

Procede de realisation de transistors fet

Info

Publication number
FR2995135B1
FR2995135B1 FR1258264A FR1258264A FR2995135B1 FR 2995135 B1 FR2995135 B1 FR 2995135B1 FR 1258264 A FR1258264 A FR 1258264A FR 1258264 A FR1258264 A FR 1258264A FR 2995135 B1 FR2995135 B1 FR 2995135B1
Authority
FR
France
Prior art keywords
fet transistors
producing
producing fet
transistors
fet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1258264A
Other languages
English (en)
Other versions
FR2995135A1 (fr
Inventor
Laurent Grenouillet
Maud Vinet
Romain Wacquez
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA, Commissariat a lEnergie Atomique et aux Energies Alternatives CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR1258264A priority Critical patent/FR2995135B1/fr
Priority to US14/426,007 priority patent/US11264479B2/en
Priority to PCT/EP2013/068300 priority patent/WO2014037411A1/fr
Publication of FR2995135A1 publication Critical patent/FR2995135A1/fr
Application granted granted Critical
Publication of FR2995135B1 publication Critical patent/FR2995135B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/027—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
    • H10D30/0278—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs forming single crystalline channels on wafers after forming insulating device isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/637—Lateral IGFETs having no inversion channels, e.g. buried channel lateral IGFETs, normally-on lateral IGFETs or depletion-mode lateral IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6741—Group IV materials, e.g. germanium or silicon carbide
    • H10D30/6743—Silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/711—Insulated-gate field-effect transistors [IGFET] having floating bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113—Isolations within a component, i.e. internal isolations
    • H10D62/115—Dielectric isolations, e.g. air gaps
    • H10D62/116—Dielectric isolations, e.g. air gaps adjoining the input or output regions of field-effect devices, e.g. adjoining source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/351—Substrate regions of field-effect devices
    • H10D62/357—Substrate regions of field-effect devices of FETs
    • H10D62/364—Substrate regions of field-effect devices of FETs of IGFETs
    • H10D62/371—Inactive supplementary semiconductor regions, e.g. for preventing punch-through, improving capacity effect or leakage current
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/025—Manufacture or treatment forming recessed gates, e.g. by using local oxidation
    • H10D64/027—Manufacture or treatment forming recessed gates, e.g. by using local oxidation by etching at gate locations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/512—Disposition of the gate electrodes, e.g. buried gates
    • H10D64/513—Disposition of the gate electrodes, e.g. buried gates within recesses in the substrate, e.g. trench gates, groove gates or buried gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/21—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically active species
    • H10P30/212—Through-implantation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
    • H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
FR1258264A 2012-09-05 2012-09-05 Procede de realisation de transistors fet Active FR2995135B1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FR1258264A FR2995135B1 (fr) 2012-09-05 2012-09-05 Procede de realisation de transistors fet
US14/426,007 US11264479B2 (en) 2012-09-05 2013-09-04 Process for producing FET transistors
PCT/EP2013/068300 WO2014037411A1 (fr) 2012-09-05 2013-09-04 Procédé de réalisation de transistors fet

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1258264A FR2995135B1 (fr) 2012-09-05 2012-09-05 Procede de realisation de transistors fet

Publications (2)

Publication Number Publication Date
FR2995135A1 FR2995135A1 (fr) 2014-03-07
FR2995135B1 true FR2995135B1 (fr) 2015-12-04

Family

ID=47049308

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1258264A Active FR2995135B1 (fr) 2012-09-05 2012-09-05 Procede de realisation de transistors fet

Country Status (3)

Country Link
US (1) US11264479B2 (fr)
FR (1) FR2995135B1 (fr)
WO (1) WO2014037411A1 (fr)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11967583B2 (en) * 2012-12-22 2024-04-23 Monolithic 3D Inc. 3D semiconductor device and structure with metal layers
US9450059B2 (en) * 2013-09-06 2016-09-20 Kabushiki Kaisha Toshiba Semiconductor device and method of manufacturing the same
US9768254B2 (en) * 2015-07-30 2017-09-19 International Business Machines Corporation Leakage-free implantation-free ETSOI transistors
US11653498B2 (en) * 2017-11-30 2023-05-16 Taiwan Semiconductor Manufacturing Co., Ltd. Memory device with improved data retention
US10686440B2 (en) * 2017-12-21 2020-06-16 Integrated Device Technology, Inc. RF switch with digital gate threshold voltage
US20240178290A1 (en) * 2022-11-28 2024-05-30 Globalfoundries U.S. Inc. Ic structure with gate electrode fully within v-shaped cavity

Family Cites Families (85)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59194438A (ja) 1983-04-18 1984-11-05 Mitsubishi Electric Corp 半導体装置のメサ台形成方法
JPS6289324A (ja) 1985-10-16 1987-04-23 Nec Corp 半導体装置の製造方法
US5366911A (en) * 1994-05-11 1994-11-22 United Microelectronics Corporation VLSI process with global planarization
JP3454951B2 (ja) * 1994-12-12 2003-10-06 株式会社半導体エネルギー研究所 半導体装置の作製方法
US5736435A (en) * 1995-07-03 1998-04-07 Motorola, Inc. Process for fabricating a fully self-aligned soi mosfet
US5801075A (en) * 1996-10-30 1998-09-01 Advanced Micro Devices, Inc. Method of forming trench transistor with metal spacers
JPH10189966A (ja) * 1996-12-26 1998-07-21 Toshiba Corp 半導体装置及びその製造方法
TW347561B (en) * 1997-06-20 1998-12-11 Ti Acer Co Ltd Method of forming a T-gate Lightly-Doped Drain semiconductor device
US6054355A (en) * 1997-06-30 2000-04-25 Kabushiki Kaisha Toshiba Method of manufacturing a semiconductor device which includes forming a dummy gate
US5869359A (en) * 1997-08-20 1999-02-09 Prabhakar; Venkatraman Process for forming silicon on insulator devices having elevated source and drain regions
US6117712A (en) * 1998-03-13 2000-09-12 Texas Instruments - Acer Incorporated Method of forming ultra-short channel and elevated S/D MOSFETS with a metal gate on SOI substrate
US6465842B2 (en) * 1998-06-25 2002-10-15 Kabushiki Kaisha Toshiba MIS semiconductor device and method of fabricating the same
US6278165B1 (en) * 1998-06-29 2001-08-21 Kabushiki Kaisha Toshiba MIS transistor having a large driving current and method for producing the same
US6303448B1 (en) * 1998-11-05 2001-10-16 Taiwan Semiconductor Manufacturing Company Method for fabricating raised source/drain structures
JP2000243854A (ja) * 1999-02-22 2000-09-08 Toshiba Corp 半導体装置及びその製造方法
US6248675B1 (en) * 1999-08-05 2001-06-19 Advanced Micro Devices, Inc. Fabrication of field effect transistors having dual gates with gate dielectrics of high dielectric constant using lowered temperatures
US6033963A (en) * 1999-08-30 2000-03-07 Taiwan Semiconductor Manufacturing Company Method of forming a metal gate for CMOS devices using a replacement gate process
US6541829B2 (en) * 1999-12-03 2003-04-01 Kabushiki Kaisha Toshiba Semiconductor device and method of manufacturing the same
US6956263B1 (en) * 1999-12-28 2005-10-18 Intel Corporation Field effect transistor structure with self-aligned raised source/drain extensions
US6407435B1 (en) * 2000-02-11 2002-06-18 Sharp Laboratories Of America, Inc. Multilayer dielectric stack and method
JP3490046B2 (ja) * 2000-05-02 2004-01-26 シャープ株式会社 半導体装置及びその製造方法
KR100365411B1 (ko) * 2000-06-30 2002-12-18 주식회사 하이닉스반도체 절연층상의 실리콘 금속 산화물 전계 효과 트랜지스터의제조 방법
US6358800B1 (en) * 2000-09-18 2002-03-19 Vanguard International Semiconductor Corporation Method of forming a MOSFET with a recessed-gate having a channel length beyond photolithography limit
US6313008B1 (en) 2001-01-25 2001-11-06 Chartered Semiconductor Manufacturing Inc. Method to form a balloon shaped STI using a micro machining technique to remove heavily doped silicon
US6787424B1 (en) * 2001-02-09 2004-09-07 Advanced Micro Devices, Inc. Fully depleted SOI transistor with elevated source and drain
US6573134B2 (en) * 2001-03-27 2003-06-03 Sharp Laboratories Of America, Inc. Dual metal gate CMOS devices and method for making the same
KR20030050995A (ko) * 2001-12-20 2003-06-25 동부전자 주식회사 고집적 트랜지스터의 제조 방법
KR100476926B1 (ko) * 2002-07-02 2005-03-17 삼성전자주식회사 반도체 소자의 듀얼 게이트 형성방법
US7081409B2 (en) * 2002-07-17 2006-07-25 Samsung Electronics Co., Ltd. Methods of producing integrated circuit devices utilizing tantalum amine derivatives
KR100464270B1 (ko) * 2003-02-04 2005-01-03 동부아남반도체 주식회사 모스펫 소자 제조 방법
KR100499159B1 (ko) * 2003-02-28 2005-07-01 삼성전자주식회사 리세스 채널을 갖는 반도체장치 및 그 제조방법
JP2004296491A (ja) * 2003-03-25 2004-10-21 Sanyo Electric Co Ltd 半導体装置
US6930030B2 (en) * 2003-06-03 2005-08-16 International Business Machines Corporation Method of forming an electronic device on a recess in the surface of a thin film of silicon etched to a precise thickness
KR100529455B1 (ko) * 2003-07-23 2005-11-17 동부아남반도체 주식회사 부분 공핍형 ｓｏｉ 모스 트랜지스터 및 그 제조 방법
US7037770B2 (en) 2003-10-20 2006-05-02 International Business Machines Corporation Method of manufacturing strained dislocation-free channels for CMOS
JP4567969B2 (ja) * 2003-10-28 2010-10-27 東部エレクトロニクス株式会社 半導体素子のトランジスタ製造方法
US7138320B2 (en) * 2003-10-31 2006-11-21 Advanced Micro Devices, Inc. Advanced technique for forming a transistor having raised drain and source regions
US6943087B1 (en) * 2003-12-17 2005-09-13 Advanced Micro Devices, Inc. Semiconductor on insulator MOSFET having strained silicon channel
US6974730B2 (en) * 2003-12-17 2005-12-13 Taiwan Semiconductor Manufacturing Co., Ltd. Method for fabricating a recessed channel field effect transistor (FET) device
US7033869B1 (en) * 2004-01-13 2006-04-25 Advanced Micro Devices Strained silicon semiconductor on insulator MOSFET
US7091069B2 (en) * 2004-06-30 2006-08-15 International Business Machines Corporation Ultra thin body fully-depleted SOI MOSFETs
US7390709B2 (en) * 2004-09-08 2008-06-24 Intel Corporation Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrode
JP2006120718A (ja) * 2004-10-19 2006-05-11 Toshiba Corp 半導体装置およびその製造方法
US7858481B2 (en) * 2005-06-15 2010-12-28 Intel Corporation Method for fabricating transistor with thinned channel
US8338887B2 (en) * 2005-07-06 2012-12-25 Infineon Technologies Ag Buried gate transistor
US7531404B2 (en) * 2005-08-30 2009-05-12 Intel Corporation Semiconductor device having a metal gate electrode formed on an annealed high-k gate dielectric layer
JP4664777B2 (ja) * 2005-09-07 2011-04-06 株式会社東芝 半導体装置
US8101485B2 (en) * 2005-12-16 2012-01-24 Intel Corporation Replacement gates to enhance transistor strain
US7776745B2 (en) 2006-02-10 2010-08-17 Stmicroelectronics S.A. Method for etching silicon-germanium in the presence of silicon
JP2007243105A (ja) * 2006-03-13 2007-09-20 Sony Corp 半導体装置およびその製造方法
DE102006019934B4 (de) 2006-04-28 2009-10-29 Advanced Micro Devices, Inc., Sunnyvale Verfahren zur Ausbildung eines Feldeffekttransistors
US7435636B1 (en) * 2007-03-29 2008-10-14 Micron Technology, Inc. Fabrication of self-aligned gallium arsenide MOSFETs using damascene gate methods
US7384842B1 (en) 2008-02-14 2008-06-10 International Business Machines Corporation Methods involving silicon-on-insulator trench memory with implanted plate
US7632727B2 (en) 2008-05-12 2009-12-15 Globalfoundries Inc. Method of forming stepped recesses for embedded strain elements in a semiconductor device
US7964487B2 (en) * 2008-06-04 2011-06-21 International Business Machines Corporation Carrier mobility enhanced channel devices and method of manufacture
JP2009302317A (ja) * 2008-06-13 2009-12-24 Renesas Technology Corp 半導体装置およびその製造方法
JP2010021295A (ja) * 2008-07-09 2010-01-28 Nec Electronics Corp 半導体装置およびその製造方法
US7804130B1 (en) * 2008-08-26 2010-09-28 Taiwan Semiconductor Manufacturing Co., Ltd. Self-aligned V-channel MOSFET
KR20100079968A (ko) * 2008-12-31 2010-07-08 주식회사 하이닉스반도체 반도체 장치 및 그의 제조방법
DE102009021485B4 (de) * 2009-05-15 2017-10-05 Globalfoundries Dresden Module One Llc & Co. Kg Halbleiterbauelement mit Metallgate und einem siliziumenthaltenden Widerstand, der auf einer Isolationsstruktur gebildet ist sowie Verfahren zu dessen Herstellung
US8124427B2 (en) 2009-10-22 2012-02-28 International Business Machines Corporation Method of creating an extremely thin semiconductor-on-insulator (ETSOI) layer having a uniform thickness
US8334197B2 (en) * 2009-12-16 2012-12-18 Taiwan Semiconductor Manufacturing Company, Ltd. Method of fabricating high-k/metal gate device
US20110147831A1 (en) * 2009-12-23 2011-06-23 Steigerwald Joseph M Method for replacement metal gate fill
JP5640379B2 (ja) * 2009-12-28 2014-12-17 ソニー株式会社 半導体装置の製造方法
US8048810B2 (en) * 2010-01-29 2011-11-01 Taiwan Semiconductor Manufacturing Company, Ltd. Method for metal gate N/P patterning
US8330227B2 (en) * 2010-02-17 2012-12-11 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated semiconductor structure for SRAM and fabrication methods thereof
DE102010002412B4 (de) * 2010-02-26 2012-04-26 Globalfoundries Dresden Module One Limited Liability Company & Co. Kg Transistor mit vergrabener Metallgateelektrodenstruktur mit großem ε
US8835294B2 (en) * 2010-03-16 2014-09-16 Taiwan Semiconductor Manufacturing Company, Ltd. Method for improving thermal stability of metal gate
KR101675458B1 (ko) * 2010-07-27 2016-11-14 삼성전자 주식회사 산 확산을 이용하는 반도체 소자의 제조 방법
DE102010038737B4 (de) * 2010-07-30 2017-05-11 Globalfoundries Dresden Module One Llc & Co. Kg Verfahren zur Herstellung von Transistoren mit Metallgateelektrodenstrukturen und eingebetteten verformungsinduzierenden Halbleiterlegierungen
TWI562313B (en) 2010-09-06 2016-12-11 shu lu Chen Electrical switch using a recessed channel gated resistor structure and method for three dimensional integration of semiconductor device
US8629014B2 (en) * 2010-09-20 2014-01-14 International Business Machines Corporation Replacement metal gate structures for effective work function control
US8709897B2 (en) * 2010-11-30 2014-04-29 Taiwan Semiconductor Manufacturing Company, Ltd. High performance strained source-drain structure and method of fabricating the same
KR101692362B1 (ko) * 2011-06-22 2017-01-05 삼성전자 주식회사 식각 정지 절연막을 이용한 반도체 장치의 제조 방법
KR20130020221A (ko) * 2011-08-19 2013-02-27 삼성전자주식회사 반도체 소자 및 그 제조 방법
US20130082332A1 (en) * 2011-09-30 2013-04-04 Globalfoundries Singapore Pte. Ltd. Method for forming n-type and p-type metal-oxide-semiconductor gates separately
US9337110B2 (en) * 2011-10-19 2016-05-10 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device having metal gate electrode and method of fabrication thereof
US8900954B2 (en) * 2011-11-04 2014-12-02 International Business Machines Corporation Blanket short channel roll-up implant with non-angled long channel compensating implant through patterned opening
US8546212B2 (en) * 2011-12-21 2013-10-01 United Microelectronics Corp. Semiconductor device and fabricating method thereof
US9006094B2 (en) * 2012-04-18 2015-04-14 International Business Machines Corporation Stratified gate dielectric stack for gate dielectric leakage reduction
US8836049B2 (en) * 2012-06-13 2014-09-16 United Microelectronics Corp. Semiconductor structure and process thereof
US8772146B2 (en) * 2012-08-28 2014-07-08 Samsung Electronics Co., Ltd. Semiconductor device and method for fabricating the same
CN104008974A (zh) * 2013-02-26 2014-08-27 中国科学院微电子研究所 半导体器件及其制造方法
CN104377132A (zh) * 2013-08-13 2015-02-25 中国科学院微电子研究所 半导体器件及其制造方法
US9450078B1 (en) * 2015-04-03 2016-09-20 Advanced Ion Beam Technology, Inc. Forming punch-through stopper regions in finFET devices

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FR2995135A1 (fr) 2014-03-07
WO2014037411A1 (fr) 2014-03-13

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