FR3028065B1 - Procede de commande d'une unite de traitement ameliorant la gestion des taches a executer et unite de traitement correspondante - Google Patents

Procede de commande d'une unite de traitement ameliorant la gestion des taches a executer et unite de traitement correspondante

Info

Publication number
FR3028065B1
FR3028065B1 FR1460431A FR1460431A FR3028065B1 FR 3028065 B1 FR3028065 B1 FR 3028065B1 FR 1460431 A FR1460431 A FR 1460431A FR 1460431 A FR1460431 A FR 1460431A FR 3028065 B1 FR3028065 B1 FR 3028065B1
Authority
FR
France
Prior art keywords
processing unit
tasks
management
executed
controlling
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1460431A
Other languages
English (en)
Other versions
FR3028065A1 (fr
Inventor
Christophe Arnal
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Rousset SAS
Original Assignee
STMicroelectronics Rousset SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics Rousset SAS filed Critical STMicroelectronics Rousset SAS
Priority to FR1460431A priority Critical patent/FR3028065B1/fr
Priority to US14/840,208 priority patent/US20160124776A1/en
Publication of FR3028065A1 publication Critical patent/FR3028065A1/fr
Application granted granted Critical
Publication of FR3028065B1 publication Critical patent/FR3028065B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G06F9/5038—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering the execution order of a plurality of tasks, e.g. taking priority or time dependency constraints into consideration
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
    • G06F9/4818—Priority circuits therefor
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Bus Control (AREA)
FR1460431A 2014-10-30 2014-10-30 Procede de commande d'une unite de traitement ameliorant la gestion des taches a executer et unite de traitement correspondante Expired - Fee Related FR3028065B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR1460431A FR3028065B1 (fr) 2014-10-30 2014-10-30 Procede de commande d'une unite de traitement ameliorant la gestion des taches a executer et unite de traitement correspondante
US14/840,208 US20160124776A1 (en) 2014-10-30 2015-08-31 Process for controlling a processing unit improving the management of the tasks to be executed, and corresponding processing unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1460431A FR3028065B1 (fr) 2014-10-30 2014-10-30 Procede de commande d'une unite de traitement ameliorant la gestion des taches a executer et unite de traitement correspondante

Publications (2)

Publication Number Publication Date
FR3028065A1 FR3028065A1 (fr) 2016-05-06
FR3028065B1 true FR3028065B1 (fr) 2017-12-22

Family

ID=53008572

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1460431A Expired - Fee Related FR3028065B1 (fr) 2014-10-30 2014-10-30 Procede de commande d'une unite de traitement ameliorant la gestion des taches a executer et unite de traitement correspondante

Country Status (2)

Country Link
US (1) US20160124776A1 (fr)
FR (1) FR3028065B1 (fr)

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55123736A (en) * 1979-03-16 1980-09-24 Hitachi Ltd Interrupt control system
US5958036A (en) * 1997-09-08 1999-09-28 Lucent Technologies Inc. Circuit for arbitrating interrupts with programmable priority levels
US6574693B1 (en) * 1999-10-11 2003-06-03 Ati International Srl Method and apparatus for gating interrupts in a computing system
US7206884B2 (en) * 2004-02-11 2007-04-17 Arm Limited Interrupt priority control within a nested interrupt system
JP4756603B2 (ja) * 2006-10-10 2011-08-24 ルネサスエレクトロニクス株式会社 データプロセッサ
US8352804B2 (en) * 2010-05-20 2013-01-08 Infineon Technologies Ag Systems and methods for secure interrupt handling

Also Published As

Publication number Publication date
US20160124776A1 (en) 2016-05-05
FR3028065A1 (fr) 2016-05-06

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