FR3070221B1 - Transistors mos en parallele - Google Patents

Transistors mos en parallele Download PDF

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Publication number
FR3070221B1
FR3070221B1 FR1757701A FR1757701A FR3070221B1 FR 3070221 B1 FR3070221 B1 FR 3070221B1 FR 1757701 A FR1757701 A FR 1757701A FR 1757701 A FR1757701 A FR 1757701A FR 3070221 B1 FR3070221 B1 FR 3070221B1
Authority
FR
France
Prior art keywords
parallel
mos transistors
insulating trenches
transistors
separated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1757701A
Other languages
English (en)
Other versions
FR3070221A1 (fr
Inventor
Francois Tailliet
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Rousset SAS
Original Assignee
STMicroelectronics Rousset SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics Rousset SAS filed Critical STMicroelectronics Rousset SAS
Priority to FR1757701A priority Critical patent/FR3070221B1/fr
Priority to US16/059,654 priority patent/US10892321B2/en
Publication of FR3070221A1 publication Critical patent/FR3070221A1/fr
Application granted granted Critical
Publication of FR3070221B1 publication Critical patent/FR3070221B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113—Isolations within a component, i.e. internal isolations
    • H10D62/115—Dielectric isolations, e.g. air gaps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/213—Channel regions of field-effect devices
    • H10D62/221—Channel regions of field-effect devices of FETs
    • H10D62/235—Channel regions of field-effect devices of FETs of IGFETs
    • H10D62/292—Non-planar channels of IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0151—Manufacturing their isolation regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H10W10/0143—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations comprising concurrently refilling multiple trenches having different shapes or dimensions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/17—Isolation regions comprising dielectric materials formed using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0128—Manufacturing their channels

Landscapes

  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

L'invention concerne une puce électronique comprenant : des premiers transistors (8) connectés en parallèle et séparés les uns des autres par des premières tranchées isolantes (S2) ; et des seconds transistors (4) séparés les uns des autres par des secondes tranchées isolantes (S1), les premières tranchées isolantes ayant une largeur maximale inférieure aux largeurs maximales de toutes les secondes tranchées isolantes.
FR1757701A 2017-08-16 2017-08-16 Transistors mos en parallele Expired - Fee Related FR3070221B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR1757701A FR3070221B1 (fr) 2017-08-16 2017-08-16 Transistors mos en parallele
US16/059,654 US10892321B2 (en) 2017-08-16 2018-08-09 MOS transistors in parallel

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1757701 2017-08-16
FR1757701A FR3070221B1 (fr) 2017-08-16 2017-08-16 Transistors mos en parallele

Publications (2)

Publication Number Publication Date
FR3070221A1 FR3070221A1 (fr) 2019-02-22
FR3070221B1 true FR3070221B1 (fr) 2020-05-15

Family

ID=60923581

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1757701A Expired - Fee Related FR3070221B1 (fr) 2017-08-16 2017-08-16 Transistors mos en parallele

Country Status (2)

Country Link
US (1) US10892321B2 (fr)
FR (1) FR3070221B1 (fr)

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4379305A (en) 1980-05-29 1983-04-05 General Instrument Corp. Mesh gate V-MOS power FET
JP3157357B2 (ja) 1993-06-14 2001-04-16 株式会社東芝 半導体装置
JP2001185721A (ja) * 1999-12-22 2001-07-06 Nec Corp 半導体装置
JP2002118253A (ja) * 2000-10-11 2002-04-19 Sony Corp 半導体装置およびその製造方法
JP5000125B2 (ja) * 2005-11-15 2012-08-15 ルネサスエレクトロニクス株式会社 半導体装置
KR101446331B1 (ko) * 2008-02-13 2014-10-02 삼성전자주식회사 반도체 소자의 제조 방법
US8329587B2 (en) 2009-10-05 2012-12-11 Applied Materials, Inc. Post-planarization densification
DE102010000888B4 (de) * 2010-01-14 2019-03-28 Robert Bosch Gmbh Verfahren zum Ausbilden von Aussparungen in einem Halbleiterbauelement und mit dem Verfahren hergestelltes Bauelement
US8987831B2 (en) * 2012-01-12 2015-03-24 Taiwan Semiconductor Manufacturing Company, Ltd. SRAM cells and arrays
FR3070222A1 (fr) 2017-08-16 2019-02-22 Stmicroelectronics (Rousset) Sas Puce comprenant deux transistors mos en parallele

Also Published As

Publication number Publication date
US10892321B2 (en) 2021-01-12
US20190058034A1 (en) 2019-02-21
FR3070221A1 (fr) 2019-02-22

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