HU201190B - Method and circuit arrangement for converting digital signals into analog signals - Google Patents

Abstract

The present invention relates to a method for converting digital signals into an analog signal, wherein the digital signals are transmitted to a microprocessor (29) via a logic unit and, depending on the magnitude of the digital signals, input values of 1 and 0 such that the cycle time is set to one cycle. The total time of the states 1 is proportional to the magnitude of the digital signals, then the bit (31) controls an analog switch (32) such that if the bit (31) content is 0, the filter (33a, 33b, ... 33k) inputs are zero or, if the content of the bit (31) is connected to the reference voltage of the input of the filter (33a. 33b ... 33k), the analog signal proportional to the magnitude of the digital signal at the output of the filter (33a. 33b, ... 33k) displayed. The invention also relates to a switching arrangement for converting digital signals into an analog signal which is connected to a microprocessor (29) via a microcomputer (1) via a microcomputer (1), preferably a storage logic unit (28), which outputs a microprocessor (29) to a bit (31). ) and one output of bit (31) per bit and each of the outputs of the bit (31) is 30 35 o 0) o CM Explained by: 16 pages. Figure 8 -1-

Description

The scope of the description is 16 pages. Figure 8

-1HU 201190 Β

- an analog switch (32), and a filter (33a, 33b, ... 33k) is connected to the analog switch (32).

The method of the present invention is that the content of the bit store (31) is written according to the most significant (n) bit in every second elementary cycle within the cycle time (T), with the following (n-1) following each position in the fourth cycle. bit, in the other 2 ^{m +,} -th cycles it is entered according to the (nm) -th position bit, or the content of the bit store (31) is determined by the sum of each elementary cycle, whereby the sum of the digital signal is added to the result obtained in the previous cycle and Bittar (31) then writing one is if the result of the addition is larger than 2 ^n, or equal to 2 ⁿ instead, while if the result is less than 2 ^n, then (31) 0 written in the Bittar, furthermore, if 1 is written to the bit store (31), the result is reduced by 2 ⁿ and the operation is repeated for each elementary cycle. The circuit arrangement according to the invention consists in connecting a memory (30) controlling a minimum interference level to the input of the microprocessor (29), and the bit store (31) forming a unit with the analog switch (32) having a reference voltage source (35). ) is bound. (Figure 7)

-2HU 201190 Β

The present invention relates to a process for converting digital signals to analog signals, which involves transmitting the digital signals to a microprocessor via a logic unit, and then entering values 1 and 0 into a bitmap depending on the size of the digital signals such that the total time then controls an analog switch with the bit signal, so that if the bit content is 0, the filter input is set to zero voltage, or if the bit content is 1, the filter input is switched to a reference voltage proportional to the digital signal output an analogue signal is displayed. The invention further relates to a circuit arrangement for converting digital signals to an analog signal which is connected to a microprocessor via a microcomputer logic unit, preferably a storage logic unit, the outputs of which microprocessor are bit-encoded and one bit of each bit bit - there is one analog switch, and one filter is connected to the analog switch.

In such converters, a microprocessor alternately switches a switch to zero and a reference voltage, and for a unit of time, the time associated with the reference voltage is proportional to the digital value.

Figure 1 illustrates a typical design of a multichannel device for controlling continuous and intermittent industrial processes. A microcomputer, which consists of a microprocessor, memory, real-time clock and other electronic units, is connected to the following units:

- 2 signal receiving and transducing units of analog signals consisting of a measuring point converter and an A / D converter and connected to its input by analog signals from the industrial process;

- a signal receiving unit 3 for two-state signals, to which 9 binary signals from the industrial process are connected;

- a signal converter and signal output unit 4 of analog signals comprising a D / A converter and analog amplifiers and output of which is analog signals 10 controlling the industrial process;

- 5 output units of binary signals with output signals for operating process relays, semiconductor relays, solenoid valves 11:

- 6 control units including displays, buttons, switches;

- 7 communication units with input / output signals to connect to a parent computer and / or multiprocessor network system.

In a known embodiment of the signal converter and signal output unit 4 of the analog signals (Fig. 2), an 8-16 bit 12a, 12b, ... I2k memory, 13a, 13b, ... 13k D / A converter, 14a for each microcomputer 1 , 14b, ... 14k output amplifier with an output connected to the controlled process (eg 4-20 mA) 10a. 10b, ... lOk analog signals are displayed.

Known solutions of the D / A converter 13 are illustrated in Figures 3, 4 and 5.

In the arrangement of Fig. 3, current generators 15 are connected to the output of the storage 12. The magnitude of the current of each current generator increases by 2 powers. (I; 21; 2 ^Z I; ... 2 ”I, where is the number of data bits in the repository.) The sum of the currents at the summing output 16 is the output signal of the D / A converter 13.

In the arrangement of Figure 4, a switch controller 17 is connected to the output of the magazine 12. The resistor ladder 18, consisting of R and 2R resistors, has a current of 1, 21, ... 2 ⁿ I respectively. Switches 19 operated by the switch controller 17 connect the currents to ground or to the amplifier input 20. Amplifier 20 is an operational amplifier fed back with resistor R. The output voltage of the operational amplifier 20 is the output signal of the D / A converter 13.

5, a digital value / pulse width converter 21 is connected to the output of the magazine 12. In a known embodiment of the digital value / pulse width converter 21, there are two counters. The content of the magazine is written to one counter when the content of the other counter is zero. The counter output controls a switch which switches the input of a filter 22 to a reference voltage for a time proportional to the digital value, otherwise it is zero. The output voltage of the filter 22 is the output signal of the D / A converter 13.

In another known embodiment of the signal converter and signal output unit 4 of the analog signals (FIG. 6), the memory 23 connected to the microcomputer 1 contains the digital value of each output signal. Each output channel has a single 25 D / A converter, preferably of the configuration shown in Figures 3 or 4. At the input of the D / A converter 25, the controller 24 turns on the digital value defining each output in turn. Simultaneously, as a result of the output signal from the controller 24, the channel converter 26 connects to the output of the selected channel amplifier 27a, 27b, ... 27k to the output of the D / A converter 25. The coupled state 24 maintains the coupled state for a predetermined time, preferably for a period of time during which the output signal reaches a steady state. Controller 24 then connects the digital value of the next channel to the input of the D / A converter 25 and channel switch 26 connects the output of the D / A converter 25 to the next input of the analog holding amplifiers 27a, 27b, ... 27k. The controller 24 performs the procedure on all channels and reconnects the first channel to the 25 D / A converter. The analog signal 10a, 10b, ... 10k of the analog holding amplifiers 27a, 27b, ... 27k is connected to the controlled process. The analog brackets 27a, 27b, ... 27k are preferably configured such that, when connected to the output of the D / A converter 25, the value of the new analog output quickly adjusts, and after the channel inverter 26 is broken, the output signal remains constant for a long time.

Of the multi-analogue 4 transducer and signal output units used to control industrial processes, the analogue output signal of each of the fast 13 D / A converters per channel quickly follows the change in digital value. The cost of these, as the 13 D / A converter is relatively expensive, is unfavorably high. If the separate fast 13 D / A converter per channel is not included in the converter and output unit 4, the change in the digital signal will slowly follow the change in the analog output.

The ever-decreasing cost of microprocessors and memory circuits makes it economical to replace analog circuits (such as the D / A converter shown in Figure 4).

HU 201190 Β batteries. Another option is the use of fast CMOS integrated circuits as analog switches.

The invention is based on the discovery that the change in analogue signals follows the change of the digital signal quickly and at the same time the disturbance signal resulting from the change of the bit state 1-0 on the analogue output is small if it is true that bit 1 proportional to or close to the size of the digital signal.

The essence of the method according to the invention is to write the contents of the bit store in the cycle time according to the largest bit in the second elementary cycle, in every fourth cycle according to the (nl) bit following the position value, every 2 ^{m + 1} bit. or the bit content is determined in each elementary cycle by the result of an addition, whereby the sum of the digital signal is added to the result produced in the previous cycle and 1 is added to the bit store if the result of the addition is greater than 2 ⁿ or equal to 2 ⁿ , while if the result is less than 2 ⁿ , then the bit is written 0, and if the bit is written 1, the result is reduced by 2 ⁿ and the operation is it is repeated in each elementary cycle. The point of the circuit arrangement according to the invention is that the microprocessor input is connected to a memory having a minimum level of interference control, and the bitstream forms a unit with the analog switch to which a reference voltage source is connected.

The invention will be described in more detail with reference to the following exemplary embodiments:

Figure 7 is a block diagram of an embodiment of a circuit arrangement according to the invention,

Figure 8 illustrates a method of controlling an analog switch according to the location values of an input digital value,

Figure 9 illustrates another method of controlling the analog switch based on a cyclical summation of the input digital value.

The structure of the analog signal converter and signal transducer 4 according to the invention is illustrated in Figure 7. The logic unit 28 with microcomputer 1, the microprocessor 29 for digital / analog conversion and the memory 30 for minimizing interference, the bit 31 for the microprocessor 29, the analog switch 32b for the bit 31, It consists of a 33k filter, 34a, 34b, ... 34k output amplifiers connected to the latter. A reference voltage source 35 is connected to the reference voltage signal input of the analog switch 32.

The inputs of the filters 33a, 33b, ... 33k are set to zero by the corresponding analog switch 32 when the corresponding bit in the bitstream 31 is set to zero and by the reference bit when the corresponding bit is 1. 34a. 34b. ... 34k output amplifiers 10a, 10b, ... 10k output signals are analog signals connected to the controlled process.

The minimum interference signal output control memory 30 includes a program executed by the microprocessor to read data from the logic unit 28, generates data to be written to bit 31 and data for the next computation cycle, and the new bit content is written to bit 31 .

In the switching arrangement according to the invention, the bit store 31 and the analog switch 32 are not separate units. If the supply voltage of the storage is U _re f = 5 V reference voltage, the output voltage of the storage can be considered as the output signal of the analog switch 32.

The microprocessor 29 controls the contents of the bit store 31 such that the average time of the bit value 1 for a given cycle time is proportional to the digital value in the stored logic unit 28 and the distribution of single and zero values within the cycle time is as uniform as possible. The cycle preferably consists of 2 ⁿ elementary cycles, where n is the number of bits in the digital value.

In the method shown in Figure 8, within the cycle time of the elementary cycle is distributed in that each second elementary cycles of the digital value is largest (n-th) location value, every four elementary cycles of the digital value (nl) th place value, each 2 ^{m + 1} cycle is assigned to the digital value (nm) location. 8, the output signal of the analog switch 32 is illustrated in FIG. 8 for a four-bit digital value.

In the method shown in Fig. 9, the microprocessor 29 generates the bitrate 31 for an elementary cycle as follows:

1. adding the digital value to the result of the previous calculation;

2. if the result of the addition is less than 2 ⁿ , a zero is written to the 31 bits;

3. if the result of the addition is greater than 2 ⁿ or equal to 2 ⁿ , write 1 in the 31 bit store and subtract 2 ⁿ from the result of the addition;

4. proceeding with step 1).

9, the output signal of switch 32 is illustrated in FIG. 9 for a 4-bit digital value.

In both methods, bit 31 is preferably written simultaneously for eight outputs.

If the analog signal 10a, 10b, ... 10k is a 4-20 mA current signal, the control mode can be changed for both the control modes of FIGS. 8 and 9. In four consecutive elementary cycles, the output signal is written to bit 31 according to the control mode described above. A loop is then inserted when each bit is written to bit 1, and then, in another four elementary cycles, the data created according to the control mode described above is written to bit 31. With modified control mode, the complete cycle will consist of 5/4 · 2 ⁿ elementary cycles. The analog signal output will have 4 mA for the zero digital value and 20 mA for the 2 ⁿ digital value.

The transducer and signal transducer unit of the analog signals of the present invention makes it possible to output multiple analog signals in a much simpler and less expensive way than known solutions. Input digital signals are converted to analog signals at medium speed and with sufficient accuracy.

The invention is not limited to the solutions described in the embodiments, but encompasses all the solutions protected by the claims, in particular the claims.

Claims (4)

PATENT CLAIMS A method for converting digital signals into an analog signal, the process of transmitting the digital signals to a microprocessor via a logic unit, and then entering 1 and 0 in a bitmap depending on the size of the digital signals such that the total time of states 1 per cycle time then controls an analog switch with the bitrate so that if the bitrate content is 0, the filter input is zero, or if the bitrate content is 1, the filter input is switched to a reference signal proportional to the digital signal is characterized in that the content of the bit store (31) is written according to the highest (n) bit in every second elementary cycle within the cycle time (T), in the following (nl) bit in every fourth cycle, for the other 2 ^{m + 1} cycle the (nm) hel enter the value corresponding to the value of y, or determine the content of the bit store (31) by the result of one addition in each elementary cycle, whereby the sum of the digital signal is added to the result obtained in the previous elementary cycle and 1 is added to the bit store (31) is greater than 2 ⁿ or equal to 2 ⁿ , while if the result is less than 2 ⁿ , write 0 to the bitstream (31), and if 1 is written to the bitstream (31), the result is ²ⁿ is reduced and the operation is repeated for each elementary cycle. Method according to claim 1, characterized in that after every four elementary cycles an analog switch (32) is applied to a reference voltage in a fifth elementary cycle. 3. A switching arrangement for converting digital signals to an analog signal, which in a switching arrangement is connected to a microprocessor via a microcomputer logic unit, preferably a storage logic unit, whose microprocessor outputs are connected to a bitmap and one bit of each bit and one of the an analog switch, while a filter is connected to the analog switches, characterized in that a signal (30) controlling a minimum interference signal is connected to the input of the microprocessor (29), and the bit store (31) forms a unit with the analog switch (32), the power input of which is connected to a reference voltage source (35). Circuit arrangement according to claim 3, characterized in that an output amplifier (34a, 34b, ... 34k) is connected to the filters (33a, 33b, ... 33k), which is an output amplifier (34a, 34b). , ... 34k) outputs are analog signal outputs of the circuit layout.