IES62313B2 - A process control system - Google Patents

Abstract

A process control system (1) has a number of process controllers (3). A data controller (11) in a network (7) stores event data immediately it is generated by the process controllers. A monitor device (10) monitors this to determine failure of any process controller and there can be an immediate back-up by automatic retrieval of necessary parameter values from separate parameter input devices (15, 16). All processing of the process controllers (3) is caried out directly using a large high speed memory (9) for a very fast response.

Description

A process control system w system which processes this The invention relates to a process control receives real time process control data, data and generates output signals to control process devices. The invention relates particularly to such a system where there must be control of many different processes. Examples of such situations are weather forecast computation systems where real time forecast data is received from satellites. Another example is control of sub-processes in a large chemical process plant, real time data being received from temperature, pressure, and position sensors and switches.

British Patent Specification No. GB-B-2153118 (N.V. Phillips) describes a processor systems having a number of data processors. While this system appears to provide a good deal of flexibility, there is a need for an improved process control system which provides near-instantaneous generation of output signals in response to rapidly changing real time data inputs.

Accordingly, one object of the invention is to provide a process control system which can carry out many different processes in response to receipt of real time data which changes at a high frequency.

Another object of the invention is to provide for good process control back-up in the event of circuit failure.

A still further object is to provide the opportunity for geographically widespread process control in an effective and inexpensive manner.

According to the invention, there is provided a process control system comprising:- '1 I + a plurality of process controllers and a system monitor device, each comprising:- an input/output interface connected to a process control real time data link, to a 5 local area network link which interconnects all parts of the system, and to process devices for implementing processes to be controlled, a timer interrupt circuit, 10 a microprocessor control circuit, a high speed dynamic read/write memory having a capacity in excess of 8MB, and a disk array, a data controller having an interface connected to 15 the network link a microprocessor control circuit, and a disk array having a capacity in excess of 200MB; and a parameter input device for reception of process control parameter values and having an interface 20 • • connected to the network link, a microprocessor control circuit and a disk array, wherein:the data controller is programmed to initially define separate memory location structures on its disk array for system messages and event log data, 25 and to automatically write received messages and event log data to the relevant structure when they are received via the interface and network link; the parameter input device is programmed to:receive process control parameter values for a plurality of processes, store said values in its disk array, and automatically transmit said values as messages to the data controller via the network link within a pre-set time after receipt; the microprocessor control circuit of each process controller is programmed to:store an indication of the processes with which it is associated, automatically retrieve all parameter values for said processes from the data controller message structure and to write said values to the read/write access memory, and carry out a process control loop for each process in turn, each loop comprising the steps of capturing real time data in the memory and processing the data according to the parameter values in which storage of all data during processing is in the read/write memory, and transmit processed data as process control signals to the process devices and in parallel to transmit the data as event log data to the data controller and wherein the step of capturing the real time data involves relaying the data using direct memory access techniques from the input/output interface to the high speed dynamic read/write memory; the timer interrupt circuit of each process controller is configured to interrupt the process control loops in a time driven manner, and the microprocessor control circuit is programmed to automatically poll the data controller for existence of messages in the message structure, and 10 to retrieve fresh parameter values to its read/write memory; and the monitor device is programmed to automatically monitor and capture all log data writes of the data controller.

In one embodiment, the monitor device is programmed to:- monitor reception at the data controller of all polling signals from the process controllers; determine intervals between polling signals 20 for each process controller and determine if any such interval exceeds a pre-set duration; and automatically retrieve parameter values for processes associated with any controller for 25 which there is an excessive interval and to carry out process control loops for said processes to provide a back-up.

Preferably, the data controller further comprises a timer circuit associated with each process controller of the system, each timer circuit being automatically reset on detection of a polling signal from its associated process controller, and subsequently counting-down to provide the interval information for the monitor device.

In another embodiment, the parameter input device is programmed to automatically transmit parameter values for processes to a remote system upon receipt of a valid request, said system having a connection to the real time data supply link to carry out process control remotely.

Preferably, the message and log data structures are predefined and reserved cache memory storage areas not being less than 200 K Bytes in size and being manipulated by a paged memory address decoder using LIFO algorithms.

In another embodiment, polling by each process controller of the data controller to access the message structure involves determining if an updated data segment has been appended to the data manage queue of the message structure.

The invention will be more clearly understood from the following description of some embodiments thereof, given by way of example only with reference to the accompanying drawings in which:Fig 1 is a diagrammatic representation of a process control system of the invention; Fig 2 is a flow chart illustrating operation of a process controller; and Fig 3 is a flow chart showing operation of a monitor device of the system.

Referring to the drawings, there is shown a process control system of the invention, indicated generally by the reference numeral 1. The system 1 is shown connected to a serial real time data supply link 2. The link 2 5 supplies real time input data which is required for various processes to be carried out. This data could be received from sensors mounted at various locations in a chemical production plant for example, or it could be real time currency market data supplied by an organisation 10 such as Reuters. Common characteristics of such data are the extremely high frequency of data updates and the need to process the data in real time.

The system 1 comprises a number of process controllers 3. Each process controller 3 comprises an input/output interface 4 which is connected by a port 5 to the link 2. In connected addition, to at at there is a pair devices . k baud, the baud. audio process 14,440 9600k and signals .

The of ports 6 which are One port 6 is parallel other being serial and process devices may be outputs to provide process Alternatively, the process equipment in a manufacturing operating operating simply screens control output devices may be items of production plant. The interface 4 is also connected to a local area network link, namely a cable 7. The cable 7 interconnects all of the main parts of the system 1. Each process controller 3 also comprises a microprocessor control circuit 8, which is connected to a high speed dynamic read/write memory array 9 having a capacity in excess of 8MB, but preferably being approximately 30MB. The desired capacity is in the range of 30-50MB. A fixed disk array is also connected to the microprocessor control circuit 8.

The network cable 7 connects the various process controllers 3 to a system monitor device 10. The monitor system device 10 comprises the components 5, 6, 8 and 9 of the process controllers 3. However, the microprocessor control circuit is configured to read automated technical parameters from a differently programmed memory source to determine its system monitor device functionality. The system 1 also comprises a data controller 11 having various microprocessor control circuits, RAM, ROM as it is in this embodiment a highpowered microcomputer. The controller 11 is connected by an on-board disk controller to a set of fixed disk drives 12. The disk drive array 12 stores a pre-defined memory location structure 13 for storage of messages and a structure 14 which is also pre-defined for storage of event log data. The structures are pre-defined and reserved cache memory storage areas not being less than 200 k Bytes in size and being manipulated by a paged memory address decoder using LIFO algorithms.

Finally, the system 1 comprises a pair of parameter interface devices 15 and 16 which in this embodiment are microcomputers having the necessary interfaces for connection with the local area network cable 7.

The various parts of the system 1 are optimally configured to automatically perform rapid data transfers and other technical steps which ensure that there is a very fast response time to changes in received real time data, that there is versatility, and that there is adequate back-up in the event of hardware failures. As shown in Fig 2, an important aspect is a process control loop 20 which is carried out by each of the process controllers 3. This loop is repeated for each of a plurality of processes associated with each process controller. The associated processes are determined by the monitor device 10 which could be regarded also as a supervisor device in addition to being a monitor device. The processes are each defined by inputting a set of parameter values at a parameter input device 15 or 16. Each set of values defines the operation of a particular process and is automatically transmitted from each parameter interface device 15 and 16 to the data controller 11 via the network cable 7. The data controller 11 directs storage of this data in the fixed disk array 12. During initialisation and initial program load of the system 1, the monitor device 10 automatically retrieves the sets of parameter values and 10 transmits the appropriate sets to the process controllers to define the associated processes.

The process control loop 20 involves a step 21 whereby real time data received at the input port 5 is captured by relaying the data using direct memory access techniques 15 from the i/o device to the high speed dynamic read/write memory array 9 without using the system bus and operating at effective speeds in excess of 100 MHz. The parameter values for the processor are similarly stored in a reserved segment of the memory 9 to reduce memory 20 retrieval times and these are read in step 22. The microprocessor control circuit 8 then processes the received real time data according to the parameter values, in which the memory 9 is used for all storage of data.

Therefore, there are minimal redundant cycles in the 25 search and fetch routines due to optimal pipelining techniques. Commonly available microprocessors such as that marketed under the trade name Intel DX2 486™ operating at 66MHz can provide a near-instantaneous response by operating in this manner. If the resulting 30 processed data is such as to trigger a process control event as determined by the decision step 24, the control circuit 8 then carries out a number of steps very quickly and automatically. These include in step 25 transmitting an output signal on one of the ports 6. This output 35 signal may simply be used for activation of a video display unit and output of an audible sound from a sound emitter, or it may additionally involve control of an item of manufacturing equipment. In addition, the control circuit 8 directs writing of the processed data to its associated disk in step 26. As a parallel synchronous step to steps 25 and 26, the signal is transmitted on the network cable 7, being addressed to the data controller 11. The data controller 11 is programmed to automatically recognise a process control output signal as an event for which data should be written to the event log data structure 14.

At frequent (sub-second) intervals operation of the microprocessor control circuit 8 is interrupted by an onboard timer interrupt circuit which is constructed to interrupt the process control loop 20 in a time-driven manner. Upon receipt of the interrupt signal, the control circuit 8 automatically polls the data controller 11 in step 41 to determine if an updated data segment has been appended to the data manage queue of the message structure 13. A poll time flag in the message structure 13 is used in step 42 to determine if an updated data segment has been appended. The message is retrieved in step 43. This is an important aspect of operation of the process controller 3 as each parameter input device 15 and 16 is programmed to automatically receive updated parameter values for processes, to store them locally in a nonvolatile storage device and to automatically transmit them on the network cable 7 at a speed in excess of 4 MB/sec to the data controller 11, which automatically writes them to the message structure 13. After retrieving the message, the microprocessor control circuit 8 writes the parameter values to the memory 9.

Therefore, this sequence of steps helps to ensure that each process controller 3 is very quickly up to date with the latest parameter values for carrying out its associated processes. The steps are indicated by the numerals 42 to 44 and return to the process control loop 20 is indicated by the arrow 45.

In addition to automatically transmitting the initialisation parameter values to the different process controllers 3, the monitor device 10 is programmed to monitor the on-going processing operations. As shown by the flow chart 50, in step 51 the monitor device 10 automatically captures log file write operations by repeatedly polling the data controller on receipt of a timer-driven interrupt. Polling frequency is determined by the reconfigurable timing event for its operation. This involves capturing all the latest additions to the event log data structure. This log data is written to the disk on the monitor device 10, but in addition it is also processed. This processing involves the monitor device 10 automatically determining in step 52 the frequency with which the process controllers poll the data controller 11 to retrieve fresh messages. Step 53 is carried out with the help of timer circuits in the data controller, one of the timer circuits is re-set. This then counts down to provide the necessary information for the monitor device 10. As determined by the step 53, if there is an excessive delay (ie above a pre-set level) in step 54 the monitor device 10 transmits a message to the data controller, the latter automatically writing the message to the message structure 13. This message indicates that a certain process controller has failed or has failed to respond indicating a process locked situation due to excessive processing demands necessitating additional capacity. The message also indicates that the monitor device 10 is taking over its operations. To do this, the monitor device 10 automatically retrieves the associated parameter values in step 55 from the relevant parameter input device 15 or 16 via the network cable 7. The monitor device 10 then carries out the process control loops 20 and the parameter update loop 40 upon receipt of the timer-driven interrupt signals.

Another aspect of operation of the system 1 is that the parameter input devices 15 and 16 are programmed to automatically transmit parameter values of specified processes to a remote system upon receipt of a valid request signal. A valid request signal could only be received from a remote system which has the necessary stored password data and also which has access to the same real time supply link 2. Upon receipt of the parameter value data, the remote system can immediately initiate control of some of the processes being handled by the system 1, provided it is in a position to access the necessary process devices using the ports 6. A practical example of the advantages of these technical features is the fact that a financial institution having systems in geographically widespread sites can distribute the processing among different sites with a very low communication cost. This feature can of course only be carried out if all the sites have access to the same real time data.

It will be appreciated that the system of the invention provides for extremely fast generation of output control signals to provide a very fast response to changes in received real time data. In many process control situations a delay of a few seconds can be crucial. An example is control of a safety valve in chemical process control. It will also be appreciated that the system is capable of handling failures in an extremely quick and efficient manner by use of the monitor device 10.

The invention is not limited to the hereinbefore described, but may be varied in and detail. embodiments construction

Claims (5)

1. A process control system comprising:a plurality of process controllers and a system monitor device, each comprising:an input/output interface connected to a process control real time data link, to a local area network link which interconnects all parts of the system, and to process devices for implementing processes to be controlled, a timer interrupt circuit, a microprocessor control circuit, a high speed dynamic read/write memory having a capacity in excess of 8MB, and a disk array, a data controller having an interface connected to the network link a microprocessor control circuit, and a disk array having a capacity in excess of 200MB; and a parameter input device for reception of process control parameter values and having an interface connected to the network link, a microprocessor control circuit and a disk array, wherein:the data controller is programmed to initially define separate memory location structures on its disk array for system messages and event log data, and to automatically write received messages and event log data to the relevant structure when they are received via the interface and network link; the parameter input device is programmed to:5 receive process control parameter values for a plurality of processes, store said values in its disk array, and automatically transmit said values as messages to the data controller via the 10 network link within a pre-set time after receipt; the microprocessor control circuit of each process controller is programmed to:store an indication of the processes with 15 which it is associated, automatically retrieve all parameter values for said processes from the data controller message structure and to write said values to the read/write access memory, and 20 carry out a process control loop for each process in turn, each loop comprising the steps of capturing real time data in the memory and processing the data according to the parameter values in which storage of all 25 data during processing is in the read/write memory, and transmit processed data as process control signals to the process devices and in parallel to transmit the data as event log data to the data controller and wherein the step of capturing the real time data involves relaying the data using direct memory access techniques from the input/output interface to the high speed dynamic read/write memory; the timer interrupt circuit of each process controller is configured to interrupt the process control loops in a time driven manner, and the microprocessor control circuit is programmed to automatically poll the data controller for existence of messages in the message structure, and to retrieve fresh parameter values to its read/write memory; and the monitor device is programmed to automatically monitor and capture all log data writes of the data controller.

2. A process control system as claimed in claim 1 wherein the monitor device is programmed to:monitor reception at the data controller of all polling signals from the process controllers; determine intervals between polling signals for each process controller and determine if any such interval exceeds a pre-set duration; and automatically retrieve parameter values for processes associated with any controller for which there is an excessive interval and to carry out process control loops for said processes to provide a back-up.

3. A process control system as claimed in claim 2 wherein the data controller further comprises a 5 timer circuit associated with each process controller of the system, each timer circuit being automatically reset on detection of a polling signal from its associated process controller, and subsequently counting-down to provide the interval 10 information for the monitor device, and preferably the parameter input device is programmed to automatically transmit parameter values for processes to a remote system upon receipt of a valid request, said system having a connection to 15 the real time data supply link to carry out process control remotely, and preferably the message and log data structures are pre-defined and reserved cache memory storage areas not being less than 200 K Bytes in size and being manipulated by a paged 20 memory address decoder using LIFO algorithms.

4. A process control system as claimed in any preceding claim wherein polling by each process controller of the data controller to access the message structure involves determining if an 25 updated data segment has been appended to the data manage queue of the message structure.

5. A process control system substantially as hereinbefore described, with reference to and as illustrated in the accompanying drawings.