IL314256A - Multi later printed circuit board rf modules and methods for manufacture - Google Patents

Multi later printed circuit board rf modules and methods for manufacture

Info

Publication number
IL314256A
IL314256A IL314256A IL31425624A IL314256A IL 314256 A IL314256 A IL 314256A IL 314256 A IL314256 A IL 314256A IL 31425624 A IL31425624 A IL 31425624A IL 314256 A IL314256 A IL 314256A
Authority
IL
Israel
Prior art keywords
printed circuit
circuit board
multi layer
circuit boards
dielectric
Prior art date
Application number
IL314256A
Other languages
Hebrew (he)
Other versions
IL314256B1 (en
Inventor
BEN LULU Ohad
Asher Kadosh Gay
Berger Alon
Original Assignee
Elta Systems Ltd
BEN LULU Ohad
Asher Kadosh Gay
Berger Alon
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Elta Systems Ltd, BEN LULU Ohad, Asher Kadosh Gay, Berger Alon filed Critical Elta Systems Ltd
Priority to IL314256A priority Critical patent/IL314256B1/en
Publication of IL314256A publication Critical patent/IL314256A/en
Publication of IL314256B1 publication Critical patent/IL314256B1/en

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B15/00Layered products comprising a layer of metal
    • B32B15/20Layered products comprising a layer of metal comprising aluminium or copper
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01Dielectrics
    • H05K2201/0137Materials
    • H05K2201/015Fluoropolymer, e.g. polytetrafluoroethylene [PTFE]

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Description

MULTI LAYER PRINTED CIRCUIT BOARD RF MODULES AND METHODS FOR MANUFACTURE THEREOF TECHNOLOGICAL FIELD The present disclosure relates to the field of RF electronic modules based on multi layer printed circuit boards.
BACKGROUND Radio Frequency (RF) electronic modules, particularly those based on multi-layer printed circuit boards (PCBs), play a crucial role in modern electronics, offering advanced functionality in compact forms. These modules are integral in various applications, from wireless communication to radar systems. The multi-layer design of these PCBs allows for more complex circuits and better signal integrity, especially important in RF applications where signal loss and interference can significantly impact performance. However, a significant challenge in designing these modules is the limited density of components they can accommodate. As the demand for more compact and powerful devices grows, packing more components into a smaller area becomes increasingly difficult. This limitation arises due to several factors, such as the need to maintain signal integrity, avoid interference between components, and ensure adequate heat dissipation. The challenge intensifies in RF modules, where the precision and quality of signal transmission and reception are paramount. Engineers must carefully balance the need for miniaturization with the physical and technical constraints that govern PCB design and component density, often leading to intricate design solutions to maximize functionality within limited space.
GENERAL DESCRIPTION In a first aspect of the presently disclosed subject matter, there is provided a multi layer printed circuit board (PCB), for use in a radiofrequency module. The multi layer PCB includes a layer stack. The layer stack includes a plurality of printed circuit boards and a plurality of dielectric sheets (lamination cores). The plurality of dielectric sheets includes dielectric sheets made from virgin polytetrafluorethylene. The virgin polytetrafluorethylene has a dielectric constant comprised between 1.8 and 2.7. Each dielectric sheet is sandwiched between two printed circuit boards, electrically insulating the two printed circuit boards from each other. The plurality of printed circuit boards and plurality of dielectric sheets are bonded together by a fusion bonding process. According to some embodiments, the multi layer PCB includes at least one copper clad. The at least one copper clad is formed on a periphery of the layer stack, and is configured to reduce external RF noise. According to some embodiments, the multi layer PCB includes one or more copper clads foiled on a surface of at least some of the plurality printed circuit boards. The one or more copper clads are configured for forming electrical wiring traces. According to some embodiments, the fusion bonding process is free of bond plies, so that a bonding between the printed circuit boards, and the dielectric sheets of virgin polytetrafluorethylene, is monolithic. According to some embodiments, at least some of the plurality of dielectric sheets of virgin polytetrafluorethylene include low Z-expansion virgin polytetrafluorethylene. Applications that can benefit the incorporation of the multi layer PCB as disclosed herein include RF heterodyne transceivers, RF power amplifies, and RF filter banks. In a second aspect of the presently disclosed subject matter, there is provided a method for manufacturing a multi-layer printed circuit board (PCB) for use in a radiofrequency module. The method includes fusion bonding of at least two printed circuit boards, sandwiching at least one dielectric sheet of virgin polytetrafluorethylene. According to some embodiments, the fusion bonding comprises fusion bonding at least one copper clad. According to some embodiments, the method includes etching a pattern in the at least one dielectric sheet of virgin polytetrafluorethylene. The pattern is configured for directing a flow of gelatinous virgin polytetrafluorethylene. According to some embodiments, the method includes drilling vias.
In the present disclosure, the term “vPTFE” may refer to virgin polytetrafluorethylene. Virgin polytetrafluorethylene refers to polytetrafluorethylene not combined/mixed/augmented with filling material(s).
BRIEF DESCRIPTION OF THE DRAWINGS In order to better understand the subject matter that is disclosed herein and to exemplify how it may be carried out in practice, embodiments will now be described, by way of non-limiting example only, with reference to the accompanying drawings, in which: Fig. 1 schematically illustrates a multi layer printed circuit board (PCB), according to embodiments of the present disclosure.
Fig. 2 shows a flowchart schematically illustrating a method for manufacturing a multi layer printed circuit board, according to embodiments of the present disclosure.
Fig. 3 schematically illustrates RF applications, that implement multi layer printed circuit boards according to embodiments of the present disclosure.
DETAILED DESCRIPTION OF EMBODIMENTS Fig. 1 schematically illustrates a multi layer printed circuit board (PCB) 100 , according to embodiments of the present disclosure. The multi layer PCB 100 may include a layer stack, that is, a plurality of layers. The plurality of layers may include a plurality of printed circuit boards 110 . The plurality of layers may include a plurality of lamination cores. In other words, the plurality of layers may include a plurality of dielectric sheets. The plurality of dielectric sheets may include dielectric sheets made of virgin polytetrafluorethylene 120 (vPTFE). The vPTFE may have a low relative dielectric constant (u0001u0002). In some embodiments, the u0001u0002 may be between 1.and 2.7. Dielectric sheets having a low u0001u0002 be beneficial to the multi layer PCB 100 , by reducing crosstalk between the plurality of printed circuit boards 110 . A parasitic capacitive coupling between the plurality of printed circuit boards 110may be reduced, thus, reducing the crosstalk.
The reduced parasitic capacitive coupling may enable reducing the height of the multi layer PCB 100 . That is, reducing the dimension in the direction perpendicular to the surface of the printed circuit boards 110and the dielectric sheets. Reducing the height of the multi layer PCB 100may enable better thermal management of the multi layer PCB 100 , by enabling better interfacing to heat dissipation apparatus, such as heat sinks and heat pipes. Reducing the height of the multi layer PCB 100may also be advantageous in space-critical applications, such as avionics modules. Each lamination core may be sandwiched between two printed circuit boards, electrically insulating the two printed circuit boards from each other. In other words, between any two printed circuit boards 110 , there may be at least one sheet of dielectric. The plurality of printed circuit boards and plurality of lamination cores may be bonded together by a fusion bonding process. In some embodiments, the multi layer PCB 100 may include at least one copper clad 130 . The at least one copper clad 130 may be formed on a periphery of the layer stack. The at least one copper clad 130 may be configured to reduce external RF noise. In some embodiments, the at least one copper clad 130 may be configured to provide a ground plane for the multi layer PCB 100 . In some embodiments, the multi layer PCB 100 may include a plurality of copper clads, that may be formed inside the multi layer PCB 100 (i.e., not on a periphery of the layer stack). The plurality of copper clads may be configured to provide ground planes for the multi layer PCB 100 , to provide power buses for the multi layer PCB 100 , and/or to reduce crosstalk between the plurality of printed circuit boards 110 . In some embodiments, each lamination core may have a corresponding copper clad. In some embodiments, the multi layer PCB 100 may include one or more copper clads foiled on a surface of at least some of the plurality of printed circuit boards 110 . The one or more copper clads may be configured for forming electrical wiring traces. In some embodiments, the fusion bonding process may be free of bond plies. Bond plies may be sheets of material configured to provide bonding between different materials (e.g., sheets of adhesive). A bonding between the printed circuit boards and the dielectric sheets of vPTFE 120 may thus be monolithic. This may be an advantage, as a bond ply may have undesirable properties (e.g., high dielectric constant, high variance of the dielectric constant, and/or chemical reactivity) In some embodiments, at least some of the plurality of dielectric sheets of vPTFE 120 may include low Z-expansion virgin polytetrafluorethylene. A Z-expansion vPTFE may refer to a quality that the coefficient of thermal expansion (CTE) of the vPTFE, in the direction perpendicular to the surface of the sheet of vPTFE, may be low. A low Z-expansion virgin polytetrafluorethylene may be beneficial to the multi layer PCB 100by reducing mechanical stresses, that electrical connections electrically connecting between printed circuit boards, may experience while the multi layer PCB 100may be used. In some embodiments, the multi layer PCB 100may include via holes, such as via hole 140 . Via holes 140 may provide channels where electrical leads, electrically connecting between printed circuit boards, may be positioned. In some embodiments, the electrical leads may include pads 150 . Pads 150 may be tubes made of electrically conductive material. The multi layer printed circuit board 100 may be used for implementing radiofrequency (RF) modules. Examples of radiofrequency modules include a RF heterodyne transceiver, a RF power amplifier, and a RF filter bank. Fig. 2 shows a flowchart schematically illustrating a method 200 for manufacturing a multi layer printed circuit board 250 , according to embodiments of the present disclosure. The multi layer printed circuit board 250 may be used to implement a radiofrequency module. The method 200 may include fusion bonding 240 of at least two printed circuit boards 210 . The printed circuit boards 210 may sandwich the at least one dielectric sheet 215 . The dielectric sheet 215 may be composed of virgin polytetrafluorethylene. In some embodiments, the fusion bonding 240 may include fusion bonding at least one copper clad 220 . In other words, the at least two printed circuit boards 210 and the dielectric sheet 215 may be fusion bonded with at least one copper clad 220 . In some embodiments, the method 200 may include drilling vias 233 . Vias may provide channels, where electrical connections between two or more printed circuit boards may be disposed. In some embodiments, drilling vias 233may be performed by at least one of machining (e.g., by a drill or by an end mill), punching, and/or laser machining. In some embodiments, electrical pads 225 may be inserted into the vias and may be 30 electrically connected (e.g., soldered) to electronical components disposed on the at least two printed circuit boards 210 . In some embodiments, the method 200 may include etching a pattern 235 in the at least one dielectric sheet 215 of virgin polytetrafluorethylene. The pattern may include recesses, slits, and/or holes. The pattern may be configured to provide a space for thermal expansion. This may provide an advantage of preventing deformation of the at least one dielectric sheet 215 . The deformation of the dielectric sheet 215may be unwanted because it may cause misalignment of electronical components. The misalignment may degrade the function of the multi layer printed circuit board 250 . Examples may include signal distortion, shifting of resonance frequencies, short circuits (due to unwanted electrical contacts) and failure of electrical connections (due to stressing of electrical contacts or leads). In some embodiments, etching a pattern 235may include applying chemicals to the at least one dielectric sheet 215 , in order to remove polytetrafluorethylene from predetermined positions. In some embodiments, the chemicals may include photo- chemicals, i.e., chemicals configured to be chemically reactive in the presence of light having sufficient photon energies (e.g., ultra-violet light). Etching a pattern 235 may include applying light to the at least one dielectric sheet 215 . Etching a pattern 235 may be aided by different subtractive-manufacturing techniques. In some embodiments, etching a pattern 235 may include at least one of machining of the at least one dielectric sheet 215 (e.g., by a mill, by a slitting saw, and/or laser machining) and/or melting of polytetrafluorethylene at predetermined positions. Melting of polytetrafluorethylene at predetermined positions may include, for example, passing a hot wire or a heated tip through the at least one dielectric sheet 215 . In some embodiments, etching a pattern 235may include die-stamping the at least one dielectric sheet 215 . In some embodiments, the pattern may be configured for directing a flow of gelatinous virgin polytetrafluorethylene. In other words, the pattern may control the flow of the gelatinous (molten) virgin polytetrafluorethylene. This may provide an advantage of preventing material reaching unwanted positions, that may result in manufacturing overheads to remedy (e.g., time and labor in removing the material). Examples include clogging vias and covering of electrical surfaces that may be configured to be exposed after the fusion bonding 240(e.g., contacts that may be connected to external circuitry and/or antenna surfaces). In some embodiments, at least two dielectric sheets 215 may be sandwiched by the printed circuit boards 210 . The pattern may be configured for making the bonding area between the at least two dielectric sheets 215more uniform. That is, the electrical transport properties in the vicinity of the bonding area, may be more uniform than the electrical transport properties of the dielectric material outside of the bonding area vicinity. In some embodiments, the method 200 may include aligning the at least two printed circuit boards 237 . Aligning the at least two printed circuit boards 237 may be required in order to precisely position the at least two printed circuit boards 210 (relative to each other). As indicated hereinabove, misalignment of the at least two printed circuit boards 210may degrade the function of the multi layer printed circuit board 250 . In some embodiments, the method 200 may include more than one cycle. That is, the step of fusion bonding 240 may be repeated, where additional PCBs, lamination cores, and/or copper clads may be added to an intermediate multi-layer PCB. The steps of drilling 233 , etching 235 , and/or aligning 237 may also be repeated, if needed. Including more than one cycle may be desired, for example, if different PCBs, lamination cores, and/or copper clads may require different processing steps and/or parameters. For example, the multi layer PCB 100(schematically illustrated in Fig. 1 ) may include via holes that may not traverse the multi layer PCB 100 , such as via hole 145 . It may be beneficial to split the manufacturing of the multi layer PCB 100to a plurality of cycles. Multi layer PCB 100 may be manufactured by four cycles. One cycle to manufacture the intermediate multi-layer PCB 160 , one cycle to manufacture the intermediate multi-layer PCB 163 , one cycle to manufacture the intermediate multi-layer PCB 165 , and one cycle to manufacture the (final) multi-layer PCB 100 from the intermediate multi-layer PCBs 160 163 165 . Referring to Fig. 3 , several applications, that may benefit from incorporation of a multi layer printed circuit board according to embodiments of the present disclosure, are schematically illustrated. 30 The applications may include an RF filtering module 310 . For example, the filtering module 310 may include a plurality of filters (e.g., a filter bank) configured for passing (or blocking) a plurality of predefined frequency bands. The applications may include an RF amplifying module 320 . For example, the RF amplifying module 320 may include signal amplifiers 323 and/or power amplifiers 327 . The applications may include an RF signal mixing module 330 . The RF signal mixing module 330 may be used, for example, to shift frequency bands of signals. The applications may include a RF modulator and demodulator (modem) 340 . The modem 340 may be used to convert encoding of information, encoded in RF signals, from one encoding (modulation) scheme to another encoding scheme, e.g., from QAM to FSK, or from analog to digital. In other words, the modem 340 may encode and decode RF signals. The modem 340 may utilize the RF signal mixing module 330 . The applications may include an antenna module 350 . The antenna module 350 may provide initial signal-processing of incoming signals, and/or may provide final signal-processing of outgoing signals. For example, the antenna module 350 may include an RF filtering module 310 and an RF amplifying module 320 . The applications may include an RF transceiver 360 . For example, a heterodyne transceiver. The RF transceiver 360 may include the antenna module 350 (that may include an RF filtering module 310 ) in order to receive and filter signals. The antenna module 350 may also transmit signals generated in the RF transceiver 360 . The RF transceiver 360 may include an RF amplifying module 320 , in order to amplify the (filtered) received signals, so as the amplified signals may be processable. The RF transceiver 360 may include a modem 340 . The modem 340 may include a frequency synthesizer that may include a tunable oscillator 345 . The modem 340 may include an RF signal mixing module 330 . The RF signal mixing module 330 may combine signals generated by the frequency synthesizer with the (filtered and amplified) received signals, thereby provide an intermediate-frequency signal. The intermediate-frequency signal may be analog, may be digital, or may include both analog and digital portions. The intermediate-frequency signal may encode information to be processed, e.g., an audio stream, a video stream, and/or a computer-readable binary stream. The modem 340 may decode information encoded by the intermediate-frequency signal, for example, the modem 340 may convert from analog modulation to digital modulation and vice versa. In some embodiments, the RF transceiver 360may include a digital signal processor 370 , in order to process information decoded by the modem 340 , thereby obtaining processed information. The modem 340 may encode processed information in order to prepare the processed information for transmission by the antenna module 350 . Having described and illustrated the principles of the disclosed technology with reference to the illustrated embodiments, it will be recognized that the illustrated embodiments can be modified in arrangement and detail without departing from such principles. The technologies from any example can be combined with the technologies described in any one or more of the other examples.

Claims (12)

- 10 - CLAIMS:
1. A multi layer printed circuit board (PCB) for use in a radiofrequency module, the multi layer PCB comprising a layer stack including: (a) a plurality of printed circuit boards; (b) a plurality of dielectric sheets of virgin polytetrafluorethylene having a dielectric constant comprised between 1.8 and 2.7; wherein each dielectric sheet is sandwiched between two printed circuit boards electrically insulating said two printed circuit boards from each other; wherein said plurality of printed circuit boards and plurality of dielectric sheets are bonded together by a fusion bonding process.
2. The multi layer printed circuit board according to any of the preceding claims, comprising at least one copper clad formed on a periphery of the layer stack configured to reduce external RF noise.
3. The multi layer printed circuit board according to any of the preceding claims, further comprising one or more copper clads foiled on a surface of at least some of said plurality printed circuit boards configured for forming electrical wiring traces.
4. The multi layer printed circuit board according to any of the preceding claims, wherein the fusion bonding process is free of bond plies so that a bonding between said printed circuit boards and said dielectric sheets of virgin polytetrafluorethylene is monolithic.
5. The multi layer printed circuit board according to any of the preceding claims, wherein said at least some of said plurality of dielectric sheets of virgin polytetrafluorethylene comprise low Z-expansion virgin polytetrafluorethylene.
6. A RF heterodyne transceiver implemented on a multi layer printed circuit board according to any one of the preceding claims. - 11 -
7. A RF power amplifier implemented on a multi layer printed circuit board according to any one of claims 1 to 5.
8. A RF filter bank implemented on a multi layer printed circuit board according to any one of claims 1 to 5.
9. A method for manufacturing a multi-layer printed circuit board (PCB) for use in a radiofrequency module, the method comprising fusion bonding of at least two printed circuit boards sandwiching at least one dielectric sheet of virgin polytetrafluorethylene.
10. The method according to claim 9, wherein said fusion bonding comprises fusion bonding at least one copper clad.
11. The method according to any of claims 9 to 10, comprising etching a pattern in said at least one dielectric sheet of virgin polytetrafluorethylene, said pattern being configured for directing a flow of gelatinous virgin polytetrafluorethylene.
12. The method according to any of claims 9 to 11, comprising drilling vias. For the Applicants, REINHOLD COHN AND PARTNERS By:
IL314256A 2024-07-11 2024-07-11 Multi later printed circuit board rf modules and methods for manufacture IL314256B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
IL314256A IL314256B1 (en) 2024-07-11 2024-07-11 Multi later printed circuit board rf modules and methods for manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IL314256A IL314256B1 (en) 2024-07-11 2024-07-11 Multi later printed circuit board rf modules and methods for manufacture

Publications (2)

Publication Number Publication Date
IL314256A true IL314256A (en) 2026-02-01
IL314256B1 IL314256B1 (en) 2026-05-01

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Family Applications (1)

Application Number Title Priority Date Filing Date
IL314256A IL314256B1 (en) 2024-07-11 2024-07-11 Multi later printed circuit board rf modules and methods for manufacture

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030203174A1 (en) * 2001-09-14 2003-10-30 Tonoga, Inc. Low signal loss bonding ply for multilayer circuit boards
KR101343984B1 (en) * 2013-05-14 2013-12-31 주식회사 이노디스 Polytetrafluoroethylene fusion device
CN107379701A (en) * 2017-07-08 2017-11-24 周丽 A kind of pure polytetrafluoroethylene (PTFE) copper coated foil plate of high-performance
CN108449890A (en) * 2018-03-27 2018-08-24 广东生益科技股份有限公司 A kind of production method of the multi-layer PCB containing PTFE
CN208540262U (en) * 2018-06-29 2019-02-22 南京大学 A PTFE-based PCB copper clad laminate

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030203174A1 (en) * 2001-09-14 2003-10-30 Tonoga, Inc. Low signal loss bonding ply for multilayer circuit boards
KR101343984B1 (en) * 2013-05-14 2013-12-31 주식회사 이노디스 Polytetrafluoroethylene fusion device
CN107379701A (en) * 2017-07-08 2017-11-24 周丽 A kind of pure polytetrafluoroethylene (PTFE) copper coated foil plate of high-performance
CN108449890A (en) * 2018-03-27 2018-08-24 广东生益科技股份有限公司 A kind of production method of the multi-layer PCB containing PTFE
CN208540262U (en) * 2018-06-29 2019-02-22 南京大学 A PTFE-based PCB copper clad laminate

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
POLYFLON COMPANY, TAKING ADVANTAGE OF PURE PTFE’S QUALITIES IN MICROWAVE SUBSTRATES A TECHNICAL DISCUSSION, 18 September 2020 (2020-09-18) *
VITALY BENSMAN, FUSION BONDING FOR PTFE-BASE MULTILAYER PCB, 10 July 2023 (2023-07-10) *

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Publication number Publication date
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