IL34072A - Circuit for code conversion in pulse code modulation systems - Google Patents

Description

CIRCUIT FOR CODE CONVERSION IN CODE MODULATION SYSTEMS invention relates to a circuit for code conversion in PCM in which the coded input signals are in a different code from the one used in the In telecommunication transmission ary values of signal waves are represented in groups of impulses in the form of a The simplest form of a code a binary code which can be represented by the series 22c where each of the coefficients c is either 0 or The ing end will develop a voltage amplitude from the coded In order to expand the dynamic the nal amplitude height is often compressed at the mitter end in accordance a given rule and expanded again at the receiving in accordance with the same This is then called The advantage of this procedure is that it permits the by means of a series consisting of a few of a ratio of 1 t between the smallest and the largest For it has already been proposed to represent this dynamic range with six terms by means of a companding characteristic curve divided into 13 At the transmitter the conversion of an tude value to a code value called and at the receiving the conversion of a code value into an amplitude value is called When the simplest form of code obviously causes the smallest penditure inasmuch as one switch is assi ned to each only when the value of the coefficient is The rents which arrive at each switch must correspond to the values and can then be With an equal current for each the switch lets may interconnected by means of a whereby each outlet current would be divided by a factor of 2 with respect to the switch current preceding In this decoding method the received code word controls all the switches neously so that upon receipt of the last code signal the decoded amplitude is the more compressed code is used for the it becomes necessary to first expand the code word at the receiving end and then to the expanded code word into an amplitude The purpose of the present invention is to provide a circuit for code conversion such as to transform the compressed and coded amplitude values received into expanded and coded amplitude According to the this is achieved by providin a capable of storing the incoming code word and constructed of and a storage device consisting of bit registers and adjusted to the value of the most frequent amplitude height of a parallel fed binary at least the cells of the converter which store the Information through the voltage value transmitted in code being connected individually the bit registers of the storage device through a signal Reference to the drawing help clarify the 1 is a block diagram of a PCM receiving device with code converter and 2 is a true table for conversion of code words into code 3 the circuit diagram of the code The block diagram in 1 depicts a sliding gister actuated by the incoming coded PCM operating as a in which each cell Z and V has its own The puts of cells Y and Z are transferred to a signal converter which in transfers the ation from six inputs to ten These ten outputs and cell V of the converter SCH are dividually connected to the bit registers of the 2 V of the storage device Each bit register is connected to an input of a set of weights GS serving to switch on a current corresponding to the transmitted code The output of the resistance box GS is connected to a converter which converts the current a PAM voltage The construction and operation of converter as well as the storage device do not require any The resistance box GS for ample a in which there is a chain composed of a number of equal eac connecting pole leading through another resistor and a switch to a voltage The latter resistors are of set of signal converter CW is required to produce an 11 bit word from the incoming 7 bit This will be clear by reference to the true table in One of of the set of 11 bits is used for the mission of the preliminary so that the amplitude is transmitted in 6 bits and converted into 10 The 6 bit code has been known for quite some time and a good example of it is thoroughly described in German Patent the three bits marked C D mine the and the remaining three bits marked and which are in fact the octave determination determine fine structure within the in the signal converter the octave determination group Z carried along a path established by the octave number BCD into the 10 bit For a code word an octave number is fed into the bit registers and while the bit register gets an additional value of A code word with octave number 000 fed into bit registers 21 and 22 whereas the tional information in bit register would appear only with octave number Thus the signal converter must check whether the code shows a 1 at one of either C or in which case it will induce the bit registe with one higher exponent produce the Figi is block diagram of the sliding register SCH and storage device SP well as the wirin diagram for the signal converter The signal converter Since the proposed signal converter purely interlinks diverse a description of a few examples should be With a code word indicating octave number the cells C and D of the converter are put into stable such produce a 1 at the Q outputs and a 0 at the outputs Q ANDogate Ul carries at its output the signal information which will actuate the bit register S10 over the into a stable position so that a critical circuit is established at output as and U7 are prepared by the information Q in cells C and D for transmission of an The octave determinatio and Z transfers the information through the previously prepared and to a further set of with inverted outputs U30 to is known that in signal circuits only with verted outputs are type of when operating together with the output of anothe with inverted produces an quently the to U39 are to be considered as and the signal 1 in one of the positions of the octave determination group connects the appropriate bit register or S9 BO as would be expected from the table in a signal is fed to position whereas the information from Y and Z is fed to sitions 27 and insufficientOCRQuality

Claims (3)

WHAT IS CLAIMED ISt

1. A circuit for code conversion in PCM systems in which the coded input signals are in a different code from the one used in the decoder, characterized by providing a series-parallel converter capable of storing the incoming code words and constructed of cells, and a storage device consisting of bit registers and adjusted to the value of the most frequent amplitude height of a parallel fed binary signal, at least the cells of the series-parallel converter which store the information through the voltage value transmitted in code being connected individually with the bit registers of the storage device through^signal converter, A

2. A circui, according to Claim 1, further characterized in that the storage device is constructed to register a simple binary code output*

3. A circuit according to claim 2, further characterized in that the code converter determines from the first part of the incoming code word the bit registers for storing the balance of the code word. A circuit according to Claim 1, further characterized in that the code converter consists exclusively of AND-gates with inverted outputs* 5· A circuit for code conversion substantially as described with reference to and as Illustrated in the drawings. P.O.Box 1169, Tel-Aviv Attorneys for Applicants