IN2014DN05705A - - Google Patents

Info

Publication number
IN2014DN05705A
IN2014DN05705A IN5705DEN2014A IN2014DN05705A IN 2014DN05705 A IN2014DN05705 A IN 2014DN05705A IN 5705DEN2014 A IN5705DEN2014 A IN 5705DEN2014A IN 2014DN05705 A IN2014DN05705 A IN 2014DN05705A
Authority
IN
India
Prior art keywords
exception
data
registers
processing
processing circuitry
Prior art date
Application number
Other languages
English (en)
Inventor
Thomas Christopher Grocutt
Richard Roy Grisenthwaite
Original Assignee
Advanced Risc Mach Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US13/368,419 external-priority patent/US9477834B2/en
Priority claimed from GB201217531A external-priority patent/GB201217531D0/en
Application filed by Advanced Risc Mach Ltd filed Critical Advanced Risc Mach Ltd
Publication of IN2014DN05705A publication Critical patent/IN2014DN05705A/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
    • G06F21/52—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems during program execution, e.g. stack integrity ; Preventing unwanted data erasure; Buffer overflow
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/60—Protecting data
    • G06F21/64—Protecting data integrity, e.g. using checksums, certificates or signatures
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/74—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information operating in dual or compartmented mode, i.e. at least one secure mode
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2221/00—Indexing scheme relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F2221/21—Indexing scheme relating to G06F21/00 and subgroups addressing additional information or applications relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F2221/2105—Dual mode as a secondary aspect

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Bioethics (AREA)
  • General Health & Medical Sciences (AREA)
  • Storage Device Security (AREA)
  • Executing Machine-Instructions (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Advance Control (AREA)
  • Medicines Containing Antibodies Or Antigens For Use As Internal Diagnostic Agents (AREA)
IN5705DEN2014 2012-02-08 2013-01-17 IN2014DN05705A (fr)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US13/368,419 US9477834B2 (en) 2012-02-08 2012-02-08 Maintaining secure data isolated from non-secure access when switching between domains
GB201217531A GB201217531D0 (en) 2012-10-01 2012-10-01 ARMv7-M Asset Protection Proposal
GB1220771.8A GB2499287A (en) 2012-02-08 2012-11-19 Exception handling in data processing with different security domains
PCT/GB2013/050102 WO2013117899A1 (fr) 2012-02-08 2013-01-17 Traitement d'exceptions dans un appareil de traitement de données ayant un domaine sécurisé et un domaine moins sécurisé

Publications (1)

Publication Number Publication Date
IN2014DN05705A true IN2014DN05705A (fr) 2015-04-10

Family

ID=47521366

Family Applications (1)

Application Number Title Priority Date Filing Date
IN5705DEN2014 IN2014DN05705A (fr) 2012-02-08 2013-01-17

Country Status (10)

Country Link
EP (1) EP2812836B1 (fr)
JP (2) JP6134742B2 (fr)
KR (1) KR102075367B1 (fr)
CN (2) CN104115155B (fr)
GB (2) GB2499287A (fr)
IL (1) IL233521A (fr)
IN (1) IN2014DN05705A (fr)
MY (1) MY167888A (fr)
TW (1) TWI569164B (fr)
WO (1) WO2013117899A1 (fr)

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US9268970B2 (en) 2014-03-20 2016-02-23 Analog Devices, Inc. System and method for security-aware master
GB2531844B (en) * 2014-10-31 2019-06-26 Hewlett Packard Development Co Hardware-protective data processing systems and methods using an application executing in a secure domain
CN107924441A (zh) 2015-08-25 2018-04-17 株式会社Seltech 具有虚拟机管理器的系统
GB2547912B (en) * 2016-03-02 2019-01-30 Advanced Risc Mach Ltd Register access control
GB2549774B (en) * 2016-04-28 2019-04-10 Imagination Tech Ltd Method for handling exceptions in exception-driven system
GB2552966B (en) * 2016-08-15 2019-12-11 Arm Ip Ltd Methods and apparatus for protecting domains of a device from unauthorised accesses
US11392438B2 (en) * 2017-02-09 2022-07-19 Arm Limited Responding to unresponsive processing circuitry
GB2562102B (en) * 2017-05-05 2019-09-04 Advanced Risc Mach Ltd An apparatus and method for managing use of capabilities
CN107436752B (zh) * 2017-07-20 2020-12-01 龙芯中科技术有限公司 异常现场恢复方法、装置及计算机可读存储介质
GB2577878B (en) * 2018-10-08 2020-11-11 Advanced Risc Mach Ltd Transition disable indicator
GB2578135B (en) * 2018-10-18 2020-10-21 Advanced Risc Mach Ltd Range checking instruction
JP6877475B2 (ja) * 2019-03-11 2021-05-26 日立Astemo株式会社 電子制御装置及びスタック使用方法
US11216277B2 (en) * 2019-09-26 2022-01-04 Arm Limited Apparatus and method of capturing a register state
GB2589895B (en) 2019-12-11 2022-03-16 Advanced Risc Mach Ltd Intermodal calling branch instruction
GB2589897B (en) * 2019-12-11 2022-03-23 Advanced Risc Mach Ltd Domain transition disable configuration parameter
GB2589896B (en) * 2019-12-11 2022-07-27 Advanced Risc Mach Ltd An apparatus and method for handling exceptions
CN114490448B (zh) * 2020-11-13 2025-01-28 华为技术有限公司 一种切换执行环境的方法及其相关设备
WO2026062369A1 (fr) * 2024-09-18 2026-03-26 Apple Inc. Désactivation sélective d'autorisations

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JP2990140B2 (ja) * 1998-01-09 1999-12-13 日本電気アイシーマイコンシステム株式会社 割り込み制御回路
JP3716604B2 (ja) * 1998-03-24 2005-11-16 富士電機機器制御株式会社 情報処理装置
WO2000019299A1 (fr) * 1998-09-25 2000-04-06 Hughes Electronics Corporation Appareil generant un environnement pour traitement de securisation
US6363474B1 (en) * 1999-06-30 2002-03-26 Bull Hn Information Systems Inc. Process switching register replication in a data processing system
GB2369464B (en) * 2000-11-27 2005-01-05 Advanced Risc Mach Ltd A data processing apparatus and method for saving return state
EP1331539B1 (fr) * 2002-01-16 2016-09-28 Texas Instruments France Mode protégé pour procésseurs permettre l'utilisation d'unités de gestion de mémoire et d'interruptions
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GB2396930B (en) * 2002-11-18 2005-09-07 Advanced Risc Mach Ltd Apparatus and method for managing access to a memory
JP2004280801A (ja) * 2003-02-24 2004-10-07 Matsushita Electric Ind Co Ltd プロセッサおよびこのプロセッサ用のプログラムを生成するコンパイラ装置
WO2006052703A2 (fr) * 2004-11-04 2006-05-18 Board Of Trustees Of Michigan State University Bit de securite
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GB2448149B (en) * 2007-04-03 2011-05-18 Advanced Risc Mach Ltd Protected function calling
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Also Published As

Publication number Publication date
JP6189039B2 (ja) 2017-08-30
CN103310163B (zh) 2018-01-05
TW201346625A (zh) 2013-11-16
JP2013161479A (ja) 2013-08-19
IL233521A0 (en) 2014-08-31
CN103310163A (zh) 2013-09-18
CN104115155A (zh) 2014-10-22
CN104115155B (zh) 2016-12-28
GB2501343A (en) 2013-10-23
JP2015506525A (ja) 2015-03-02
GB201220769D0 (en) 2013-01-02
EP2812836B1 (fr) 2016-01-06
TWI569164B (zh) 2017-02-01
IL233521A (en) 2017-11-30
KR102075367B1 (ko) 2020-02-11
MY167888A (en) 2018-09-26
EP2812836A1 (fr) 2014-12-17
KR20140123545A (ko) 2014-10-22
GB201220771D0 (en) 2013-01-02
WO2013117899A1 (fr) 2013-08-15
GB2499287A (en) 2013-08-14
JP6134742B2 (ja) 2017-05-24

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