IT1022912B - Procedimento per fabbricare un dispositivo a semiconduttori - Google Patents

Procedimento per fabbricare un dispositivo a semiconduttori

Info

Publication number
IT1022912B
IT1022912B IT28472/74A IT2847274A IT1022912B IT 1022912 B IT1022912 B IT 1022912B IT 28472/74 A IT28472/74 A IT 28472/74A IT 2847274 A IT2847274 A IT 2847274A IT 1022912 B IT1022912 B IT 1022912B
Authority
IT
Italy
Prior art keywords
procedure
manufacturing
semiconductor device
semiconductor
Prior art date
Application number
IT28472/74A
Other languages
English (en)
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Application granted granted Critical
Publication of IT1022912B publication Critical patent/IT1022912B/it

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/40Encapsulations, e.g. protective coatings characterised by their materials
    • H10W74/47Encapsulations, e.g. protective coatings characterised by their materials comprising organic materials, e.g. plastics or resins
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/928Front and rear surface processing
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/942Masking
    • Y10S438/948Radiation resist
    • Y10S438/951Lift-off
IT28472/74A 1973-10-17 1974-10-16 Procedimento per fabbricare un dispositivo a semiconduttori IT1022912B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19732352138 DE2352138A1 (de) 1973-10-17 1973-10-17 Verfahren zum herstellen einer halbleiteranordnung

Publications (1)

Publication Number Publication Date
IT1022912B true IT1022912B (it) 1978-04-20

Family

ID=5895702

Family Applications (1)

Application Number Title Priority Date Filing Date
IT28472/74A IT1022912B (it) 1973-10-17 1974-10-16 Procedimento per fabbricare un dispositivo a semiconduttori

Country Status (7)

Country Link
US (1) US3984588A (it)
JP (1) JPS5080084A (it)
CA (1) CA1021469A (it)
DE (1) DE2352138A1 (it)
FR (1) FR2248614B1 (it)
GB (1) GB1447843A (it)
IT (1) IT1022912B (it)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3837826A1 (de) * 1988-11-08 1990-05-10 Nokia Unterhaltungselektronik Verfahren zum beschichten einer substratplatte fuer eine fluessigkristallzelle
US5772104A (en) * 1996-08-26 1998-06-30 Peerless Of America Incorporated Methods of brazing and preparing articles for brazing, and coating composition for use in such methods

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3020156A (en) * 1957-05-10 1962-02-06 Mycalex Corp Of America Method of coating metal on dielectric material
US3222173A (en) * 1961-05-15 1965-12-07 Vitramon Inc Method of making an electrical unit
US3443944A (en) * 1963-10-23 1969-05-13 United Aircraft Corp Method of depositing conductive patterns on a substrate
US3518751A (en) * 1967-05-25 1970-07-07 Hughes Aircraft Co Electrical connection and/or mounting arrays for integrated circuit chips
US3775117A (en) * 1971-07-13 1973-11-27 Siemens Ag Process for selective metallization of insulating material bodies
GB1384028A (en) * 1972-08-21 1974-02-12 Hughes Aircraft Co Method of making a semiconductor device
US3936531A (en) * 1973-05-01 1976-02-03 Union Carbide Corporation Masking process with thermal destruction of edges of mask

Also Published As

Publication number Publication date
FR2248614B1 (it) 1978-11-24
JPS5080084A (it) 1975-06-28
FR2248614A1 (it) 1975-05-16
CA1021469A (en) 1977-11-22
GB1447843A (en) 1976-09-02
DE2352138A1 (de) 1975-04-30
US3984588A (en) 1976-10-05

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