IT1088852B - Struttura passivante per un dispositivo simeconduttore - Google Patents

Struttura passivante per un dispositivo simeconduttore

Info

Publication number
IT1088852B
IT1088852B IT28304/77A IT2830477A IT1088852B IT 1088852 B IT1088852 B IT 1088852B IT 28304/77 A IT28304/77 A IT 28304/77A IT 2830477 A IT2830477 A IT 2830477A IT 1088852 B IT1088852 B IT 1088852B
Authority
IT
Italy
Prior art keywords
simeconductor
passivating structure
passivating
simeconductor device
Prior art date
Application number
IT28304/77A
Other languages
English (en)
Original Assignee
Rca Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US05/737,850 external-priority patent/US4097889A/en
Priority claimed from US05/737,849 external-priority patent/US4091407A/en
Application filed by Rca Corp filed Critical Rca Corp
Application granted granted Critical
Publication of IT1088852B publication Critical patent/IT1088852B/it

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/131Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
    • H10W74/137Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations being directly on the semiconductor body
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326Deposition processes
    • H10P14/6328Deposition from the gas or vapour phase
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69Inorganic materials
    • H10P14/694Inorganic materials composed of nitrides
    • H10P14/6943Inorganic materials composed of nitrides containing silicon
    • H10P14/69433Inorganic materials composed of nitrides containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/425Barrier, adhesion or liner layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/44Conductive materials thereof
    • H10W20/4403Conductive materials thereof based on metals, e.g. alloys, metal silicides
    • H10W20/4432Conductive materials thereof based on metals, e.g. alloys, metal silicides the principal metal being a noble metal, e.g. gold
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/40Encapsulations, e.g. protective coatings characterised by their materials
    • H10W74/43Encapsulations, e.g. protective coatings characterised by their materials comprising oxides, nitrides or carbides, e.g. ceramics or glasses
IT28304/77A 1976-11-01 1977-10-05 Struttura passivante per un dispositivo simeconduttore IT1088852B (it)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US05/737,850 US4097889A (en) 1976-11-01 1976-11-01 Combination glass/low temperature deposited Siw Nx Hy O.sub.z
US05/737,849 US4091407A (en) 1976-11-01 1976-11-01 Combination glass/low temperature deposited Siw Nx Hy O.sub.z

Publications (1)

Publication Number Publication Date
IT1088852B true IT1088852B (it) 1985-06-10

Family

ID=27113266

Family Applications (1)

Application Number Title Priority Date Filing Date
IT28304/77A IT1088852B (it) 1976-11-01 1977-10-05 Struttura passivante per un dispositivo simeconduttore

Country Status (3)

Country Link
JP (1) JPS5356973A (it)
DE (1) DE2747474A1 (it)
IT (1) IT1088852B (it)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USRE32351E (en) * 1978-06-19 1987-02-17 Rca Corporation Method of manufacturing a passivating composite comprising a silicon nitride (SI1 3N4) layer and a phosphosilicate glass (PSG) layer for a semiconductor device layer
US4273805A (en) * 1978-06-19 1981-06-16 Rca Corporation Passivating composite for a semiconductor device comprising a silicon nitride (Si1 3N4) layer and phosphosilicate glass (PSG) layer
JPS5642377A (en) * 1979-09-14 1981-04-20 Fujitsu Ltd Ultraviolet ray erasable type rewritable read-only memory
US4543271A (en) * 1984-07-02 1985-09-24 Hughes Aircraft Company Silicon oxynitride material and photochemical process for forming same
JPH02221643A (ja) * 1989-02-21 1990-09-04 Toyo Umpanki Co Ltd 荷役車両
JP2814009B2 (ja) * 1990-06-05 1998-10-22 三菱電機株式会社 半導体装置の製造方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5342391B2 (it) * 1973-05-10 1978-11-10
JPS5161781A (it) * 1974-11-27 1976-05-28 Hitachi Ltd

Also Published As

Publication number Publication date
JPS5636575B2 (it) 1981-08-25
JPS5356973A (en) 1978-05-23
DE2747474A1 (de) 1978-05-03

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