IT1161869B - Dispositivo a semiconduttori e procedimento per la sua fabbricazione - Google Patents
Dispositivo a semiconduttori e procedimento per la sua fabbricazioneInfo
- Publication number
- IT1161869B IT1161869B IT19414/83A IT1941483A IT1161869B IT 1161869 B IT1161869 B IT 1161869B IT 19414/83 A IT19414/83 A IT 19414/83A IT 1941483 A IT1941483 A IT 1941483A IT 1161869 B IT1161869 B IT 1161869B
- Authority
- IT
- Italy
- Prior art keywords
- procedure
- manufacture
- semiconductor device
- semiconductor
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/40—Leadframes
- H10W70/421—Shapes or dispositions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/01—Manufacture or treatment
- H10W74/016—Manufacture or treatment using moulds
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57016233A JPS58134453A (ja) | 1982-02-05 | 1982-02-05 | リ−ドフレ−ム |
| JP57016232A JPS58134452A (ja) | 1982-02-05 | 1982-02-05 | 半導体装置およびその製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| IT8319414A0 IT8319414A0 (it) | 1983-02-03 |
| IT1161869B true IT1161869B (it) | 1987-03-18 |
Family
ID=26352512
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IT19414/83A IT1161869B (it) | 1982-02-05 | 1983-02-03 | Dispositivo a semiconduttori e procedimento per la sua fabbricazione |
Country Status (7)
| Country | Link |
|---|---|
| KR (1) | KR900001989B1 (it) |
| DE (1) | DE3303165C2 (it) |
| GB (1) | GB2115220B (it) |
| HK (1) | HK70787A (it) |
| IT (1) | IT1161869B (it) |
| MY (1) | MY8700616A (it) |
| SG (1) | SG36287G (it) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60140742A (ja) * | 1983-12-06 | 1985-07-25 | フエアチアイルド カメラ アンド インストルメント コーポレーシヨン | リードフレーム及びその実装方法 |
| US4677526A (en) * | 1984-03-01 | 1987-06-30 | Augat Inc. | Plastic pin grid array chip carrier |
| JP2634516B2 (ja) * | 1991-10-15 | 1997-07-30 | 三菱電機株式会社 | 反転型icの製造方法、反転型ic、icモジュール |
| US6225685B1 (en) * | 2000-04-05 | 2001-05-01 | Advanced Micro Devices, Inc. | Lead frame design for reduced wire sweep having a defined gap between tie bars and lead pins |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3926746A (en) * | 1973-10-04 | 1975-12-16 | Minnesota Mining & Mfg | Electrical interconnection for metallized ceramic arrays |
| US4089575A (en) * | 1976-09-27 | 1978-05-16 | Amp Incorporated | Connector for connecting a circuit element to the surface of a substrate |
| JPS5479563A (en) * | 1977-12-07 | 1979-06-25 | Kyushu Nippon Electric | Lead frame for semiconductor |
| DE3061383D1 (en) * | 1979-02-19 | 1983-01-27 | Fujitsu Ltd | Semiconductor device and method for manufacturing the same |
| US4195193A (en) * | 1979-02-23 | 1980-03-25 | Amp Incorporated | Lead frame and chip carrier housing |
| US4289922A (en) * | 1979-09-04 | 1981-09-15 | Plessey Incorporated | Integrated circuit package and lead frame |
-
1983
- 1983-01-31 DE DE3303165A patent/DE3303165C2/de not_active Expired - Fee Related
- 1983-02-01 GB GB08302730A patent/GB2115220B/en not_active Expired
- 1983-02-03 IT IT19414/83A patent/IT1161869B/it active
- 1983-02-04 KR KR1019830000433A patent/KR900001989B1/ko not_active Expired
-
1987
- 1987-04-23 SG SG362/87A patent/SG36287G/en unknown
- 1987-10-01 HK HK707/87A patent/HK70787A/xx not_active IP Right Cessation
- 1987-12-30 MY MY616/87A patent/MY8700616A/xx unknown
Also Published As
| Publication number | Publication date |
|---|---|
| GB8302730D0 (en) | 1983-03-02 |
| KR840003921A (ko) | 1984-10-04 |
| GB2115220A (en) | 1983-09-01 |
| HK70787A (en) | 1987-10-09 |
| IT8319414A0 (it) | 1983-02-03 |
| GB2115220B (en) | 1985-11-06 |
| DE3303165A1 (de) | 1983-09-22 |
| DE3303165C2 (de) | 1993-12-09 |
| SG36287G (en) | 1987-07-24 |
| KR900001989B1 (ko) | 1990-03-30 |
| MY8700616A (en) | 1987-12-31 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| TA | Fee payment date (situation as of event date), data collected since 19931001 |
Effective date: 19970225 |