IT1194368B - Elemento circuitale elettrico - Google Patents

Elemento circuitale elettrico

Info

Publication number
IT1194368B
IT1194368B IT8322493A IT2249383A IT1194368B IT 1194368 B IT1194368 B IT 1194368B IT 8322493 A IT8322493 A IT 8322493A IT 2249383 A IT2249383 A IT 2249383A IT 1194368 B IT1194368 B IT 1194368B
Authority
IT
Italy
Prior art keywords
electric circuit
circuit element
electric
circuit
Prior art date
Application number
IT8322493A
Other languages
English (en)
Other versions
IT8322493A0 (it
Inventor
David Frank Brown
Michael John Anstey
Original Assignee
Brown David F
Anstey Michael J
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Brown David F, Anstey Michael J filed Critical Brown David F
Publication of IT8322493A0 publication Critical patent/IT8322493A0/it
Application granted granted Critical
Publication of IT1194368B publication Critical patent/IT1194368B/it

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H10W70/657—Shapes or dispositions of interconnections on sidewalls or bottom surfaces of the package substrates, interposers or redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/401—Package configurations characterised by multiple insulating or insulated package substrates, interposers or RDLs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07551—Connecting or disconnecting of bond wires characterised by changes in properties of the bond wires during the connecting
    • H10W72/07554—Connecting or disconnecting of bond wires characterised by changes in properties of the bond wires during the connecting changes in dispositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/547—Dispositions of multiple bond wires
IT8322493A 1982-08-10 1983-08-09 Elemento circuitale elettrico IT1194368B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB8222947 1982-08-10

Publications (2)

Publication Number Publication Date
IT8322493A0 IT8322493A0 (it) 1983-08-09
IT1194368B true IT1194368B (it) 1988-09-22

Family

ID=10532209

Family Applications (1)

Application Number Title Priority Date Filing Date
IT8322493A IT1194368B (it) 1982-08-10 1983-08-09 Elemento circuitale elettrico

Country Status (10)

Country Link
US (1) US4638348A (it)
EP (1) EP0115514B1 (it)
JP (1) JPS59501564A (it)
AT (1) AT398254B (it)
CA (1) CA1211859A (it)
CH (1) CH659541A5 (it)
DE (1) DE3367699D1 (it)
GB (1) GB2127217B (it)
IT (1) IT1194368B (it)
WO (1) WO1984000851A1 (it)

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US5089878A (en) * 1989-06-09 1992-02-18 Lee Jaesup N Low impedance packaging
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US5148265A (en) 1990-09-24 1992-09-15 Ist Associates, Inc. Semiconductor chip assemblies with fan-in leads
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US5854534A (en) * 1992-08-05 1998-12-29 Fujitsu Limited Controlled impedence interposer substrate
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US5528463A (en) * 1993-07-16 1996-06-18 Dallas Semiconductor Corp. Low profile sockets and modules for surface mountable applications
US5502667A (en) * 1993-09-13 1996-03-26 International Business Machines Corporation Integrated multichip memory module structure
US5561622A (en) * 1993-09-13 1996-10-01 International Business Machines Corporation Integrated memory cube structure
US5929517A (en) 1994-12-29 1999-07-27 Tessera, Inc. Compliant integrated circuit package and method of fabricating the same
US5514907A (en) * 1995-03-21 1996-05-07 Simple Technology Incorporated Apparatus for stacking semiconductor chips
US5648684A (en) * 1995-07-26 1997-07-15 International Business Machines Corporation Endcap chip with conductive, monolithic L-connect for multichip stack
US6861290B1 (en) * 1995-12-19 2005-03-01 Micron Technology, Inc. Flip-chip adaptor package for bare die
US5825084A (en) * 1996-08-22 1998-10-20 Express Packaging Systems, Inc. Single-core two-side substrate with u-strip and co-planar signal traces, and power and ground planes through split-wrap-around (SWA) or split-via-connections (SVC) for packaging IC devices
RU2133523C1 (ru) * 1997-11-03 1999-07-20 Закрытое акционерное общество "Техно-ТМ" Трехмерный электронный модуль
KR19990058460A (ko) * 1997-12-30 1999-07-15 김영환 스택 칩 패키지
US6121679A (en) * 1998-03-10 2000-09-19 Luvara; John J. Structure for printed circuit design
US6310303B1 (en) 1998-03-10 2001-10-30 John J. Luvara Structure for printed circuit design
US6552264B2 (en) 1998-03-11 2003-04-22 International Business Machines Corporation High performance chip packaging and method
US6072233A (en) 1998-05-04 2000-06-06 Micron Technology, Inc. Stackable ball grid array package
USRE43112E1 (en) 1998-05-04 2012-01-17 Round Rock Research, Llc Stackable ball grid array package
US6121576A (en) * 1998-09-02 2000-09-19 Micron Technology, Inc. Method and process of contact to a heat softened solder ball array
RU2134466C1 (ru) * 1998-12-08 1999-08-10 Таран Александр Иванович Носитель кристалла ис
US6572387B2 (en) 1999-09-24 2003-06-03 Staktek Group, L.P. Flexible circuit connector for stacked chip module
US6608763B1 (en) 2000-09-15 2003-08-19 Staktek Group L.P. Stacking system and method
US6462408B1 (en) * 2001-03-27 2002-10-08 Staktek Group, L.P. Contact member stacking system and method
US20030002267A1 (en) * 2001-06-15 2003-01-02 Mantz Frank E. I/O interface structure
US6573461B2 (en) 2001-09-20 2003-06-03 Dpac Technologies Corp Retaining ring interconnect used for 3-D stacking
US6573460B2 (en) * 2001-09-20 2003-06-03 Dpac Technologies Corp Post in ring interconnect using for 3-D stacking
US7335995B2 (en) * 2001-10-09 2008-02-26 Tessera, Inc. Microelectronic assembly having array including passive elements and interconnects
US6897565B2 (en) * 2001-10-09 2005-05-24 Tessera, Inc. Stacked packages
US6977440B2 (en) * 2001-10-09 2005-12-20 Tessera, Inc. Stacked packages
US7081373B2 (en) 2001-12-14 2006-07-25 Staktek Group, L.P. CSP chip stack with flex circuit
US6765288B2 (en) * 2002-08-05 2004-07-20 Tessera, Inc. Microelectronic adaptors, assemblies and methods
AU2003265417A1 (en) * 2002-08-16 2004-03-03 Tessera, Inc. Microelectronic packages with self-aligning features
US7294928B2 (en) * 2002-09-06 2007-11-13 Tessera, Inc. Components, methods and assemblies for stacked packages
US7071547B2 (en) * 2002-09-11 2006-07-04 Tessera, Inc. Assemblies having stacked semiconductor chips and methods of making same
KR20050054959A (ko) * 2002-09-25 2005-06-10 코닌클리즈케 필립스 일렉트로닉스 엔.브이. 커넥터, 칩 카드 판독기, 이동 전화기 및 ｐｄａ
US6856010B2 (en) * 2002-12-05 2005-02-15 Staktek Group L.P. Thin scale outline package
US6840794B2 (en) * 2003-03-31 2005-01-11 Intel Corporation Apparatus and methods for cooling a processor socket
US20040207990A1 (en) * 2003-04-21 2004-10-21 Rose Andrew C. Stair-step signal routing
US7061121B2 (en) 2003-11-12 2006-06-13 Tessera, Inc. Stacked microelectronic assemblies with central contacts
US7545029B2 (en) * 2006-08-18 2009-06-09 Tessera, Inc. Stack microelectronic assemblies
US7763983B2 (en) * 2007-07-02 2010-07-27 Tessera, Inc. Stackable microelectronic device carriers, stacked device carriers and methods of making the same
US9429983B1 (en) 2013-09-12 2016-08-30 Advanced Processor Architectures, Llc System clock distribution in a distributed computing environment
US9645603B1 (en) 2013-09-12 2017-05-09 Advanced Processor Architectures, Llc System clock distribution in a distributed computing environment
US11042211B2 (en) 2009-08-07 2021-06-22 Advanced Processor Architectures, Llc Serially connected computing nodes in a distributed computing system
US8555096B2 (en) 2009-08-07 2013-10-08 Advanced Processor Architectures, Llc Method and apparatus for selectively placing components into a sleep mode in response to loss of one or more clock signals or receiving a command to enter sleep mode
CN113838812B (zh) * 2020-06-23 2025-06-10 桑迪士克科技股份有限公司 高速存储卡的侧面接触垫

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US3404215A (en) * 1966-04-14 1968-10-01 Sprague Electric Co Hermetically sealed electronic module
US3614541A (en) * 1969-04-08 1971-10-19 North American Rockwell Package for an electronic assembly
JPS4919023B1 (it) * 1970-01-02 1974-05-14
DE2124887C3 (de) * 1971-05-19 1980-04-17 Philips Patentverwaltung Gmbh, 2000 Hamburg Elektrisches Bauelement, vorzugsweise Halbleiterbauelement, mit Folienkontaktierung
JPS5619040B2 (it) * 1974-05-16 1981-05-02
JPS5810857B2 (ja) * 1975-05-28 1983-02-28 株式会社東芝 デンシカイロソウチ
JPS5914894B2 (ja) * 1978-08-03 1984-04-06 日本碍子株式会社 セラミツクパツケ−ジ
JPS55115351A (en) * 1979-02-26 1980-09-05 Fujitsu Ltd Ic stem
JPS55124248A (en) * 1979-03-20 1980-09-25 Nec Corp Leadless package
DE3030763A1 (de) * 1979-08-17 1981-03-26 Amdahl Corp., Sunnyvale, Calif. Packung fuer eine integrierte schaltung in plaettchenform
JPS56126948A (en) * 1980-03-12 1981-10-05 Hitachi Ltd Highly integrated semiconductor
US4320438A (en) * 1980-05-15 1982-03-16 Cts Corporation Multi-layer ceramic package
GB2056772B (en) * 1980-08-12 1983-09-01 Amdahl Corp Integrated circuit package and module
JPS57115850A (en) * 1981-01-10 1982-07-19 Nec Corp Chip carrier for semiconductor ic
GB2095039B (en) * 1981-02-10 1984-09-19 Brown David F Circuit assembly
FR2501414A1 (fr) * 1981-03-06 1982-09-10 Thomson Csf Microboitier d'encapsulation de pastilles de semi-conducteur, testable apres soudure sur un substrat

Also Published As

Publication number Publication date
AT398254B (de) 1994-11-25
CA1211859A (en) 1986-09-23
GB2127217B (en) 1986-05-08
ATA904383A (de) 1994-02-15
CH659541A5 (fr) 1987-01-30
WO1984000851A1 (en) 1984-03-01
JPS59501564A (ja) 1984-08-30
EP0115514A1 (en) 1984-08-15
US4638348A (en) 1987-01-20
IT8322493A0 (it) 1983-08-09
GB2127217A (en) 1984-04-04
GB8321375D0 (en) 1983-09-07
DE3367699D1 (en) 1987-01-02
EP0115514B1 (en) 1986-11-12

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Legal Events

Date Code Title Description
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19970829