IT1209258B - Disposizione circuitale atta a gestire lo scambio di dati tra una coppia di elaboratori, operanti secondo il principio master-slave, ed un elaboratore di supporto. - Google Patents

Disposizione circuitale atta a gestire lo scambio di dati tra una coppia di elaboratori, operanti secondo il principio master-slave, ed un elaboratore di supporto.

Info

Publication number
IT1209258B
IT1209258B IT8024284A IT2428480A IT1209258B IT 1209258 B IT1209258 B IT 1209258B IT 8024284 A IT8024284 A IT 8024284A IT 2428480 A IT2428480 A IT 2428480A IT 1209258 B IT1209258 B IT 1209258B
Authority
IT
Italy
Prior art keywords
manage
couple
processors
master
exchange
Prior art date
Application number
IT8024284A
Other languages
English (en)
Other versions
IT8024284A0 (it
Inventor
Corti Mariagrazia
Landi Mario
Original Assignee
Sits Soc It Telecom Siemens
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sits Soc It Telecom Siemens filed Critical Sits Soc It Telecom Siemens
Priority to IT8024284A priority Critical patent/IT1209258B/it
Publication of IT8024284A0 publication Critical patent/IT8024284A0/it
Priority to FR8113480A priority patent/FR2489556A1/fr
Priority to BR8104670A priority patent/BR8104670A/pt
Priority to GB8125467A priority patent/GB2084770A/en
Priority to DE19813133715 priority patent/DE3133715A1/de
Application granted granted Critical
Publication of IT1209258B publication Critical patent/IT1209258B/it

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2097—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements maintaining the standby controller/processing unit updated
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/0407—Selecting arrangements for multiplex systems for time-division multiplexing using a stored program control
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2023—Failover techniques
    • G06F11/2025—Failover techniques using centralised failover control functionality

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Software Systems (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Multi Processors (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Hardware Redundancy (AREA)
IT8024284A 1980-08-26 1980-08-26 Disposizione circuitale atta a gestire lo scambio di dati tra una coppia di elaboratori, operanti secondo il principio master-slave, ed un elaboratore di supporto. IT1209258B (it)

Priority Applications (5)

Application Number Priority Date Filing Date Title
IT8024284A IT1209258B (it) 1980-08-26 1980-08-26 Disposizione circuitale atta a gestire lo scambio di dati tra una coppia di elaboratori, operanti secondo il principio master-slave, ed un elaboratore di supporto.
FR8113480A FR2489556A1 (fr) 1980-08-26 1981-07-09 Disposition de circuit apte a gerer l'echange de donnees entre un couple d'ordinateurs, operant suivant le principe maitre-asservi, et un ordinateur de support
BR8104670A BR8104670A (pt) 1980-08-26 1981-07-21 Disposicao de circuito
GB8125467A GB2084770A (en) 1980-08-26 1981-08-20 Data exchange between a pair of computers operating according to the masterslave principle and a support computer
DE19813133715 DE3133715A1 (de) 1980-08-26 1981-08-26 "schaltunganordnung zwischen einem hilfsrechner und einem paar von rechnern"

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT8024284A IT1209258B (it) 1980-08-26 1980-08-26 Disposizione circuitale atta a gestire lo scambio di dati tra una coppia di elaboratori, operanti secondo il principio master-slave, ed un elaboratore di supporto.

Publications (2)

Publication Number Publication Date
IT8024284A0 IT8024284A0 (it) 1980-08-26
IT1209258B true IT1209258B (it) 1989-07-16

Family

ID=11212939

Family Applications (1)

Application Number Title Priority Date Filing Date
IT8024284A IT1209258B (it) 1980-08-26 1980-08-26 Disposizione circuitale atta a gestire lo scambio di dati tra una coppia di elaboratori, operanti secondo il principio master-slave, ed un elaboratore di supporto.

Country Status (5)

Country Link
BR (1) BR8104670A (it)
DE (1) DE3133715A1 (it)
FR (1) FR2489556A1 (it)
GB (1) GB2084770A (it)
IT (1) IT1209258B (it)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1255618B (it) * 1992-09-30 1995-11-09 Sits Soc It Telecom Siemens Unita' di controllo e di elaborazione duplicata per apparati di telecomunicazioni
DE4241319A1 (de) * 1992-12-09 1994-06-16 Ant Nachrichtentech Rechnersystem
JPH07152788A (ja) * 1993-06-28 1995-06-16 At & T Global Inf Solutions Internatl Inc 並列検索方法及びその方法を用いた並列演算処理コンピューターシステム

Also Published As

Publication number Publication date
FR2489556A1 (fr) 1982-03-05
IT8024284A0 (it) 1980-08-26
GB2084770A (en) 1982-04-15
DE3133715A1 (de) 1982-04-08
BR8104670A (pt) 1982-04-06

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