IT1215558B - Procedimento di programmazione per memorie rom e tecnolgia mos con ossido di gate e giunzioni sottili. - Google Patents

Procedimento di programmazione per memorie rom e tecnolgia mos con ossido di gate e giunzioni sottili.

Info

Publication number
IT1215558B
IT1215558B IT8720872A IT2087287A IT1215558B IT 1215558 B IT1215558 B IT 1215558B IT 8720872 A IT8720872 A IT 8720872A IT 2087287 A IT2087287 A IT 2087287A IT 1215558 B IT1215558 B IT 1215558B
Authority
IT
Italy
Prior art keywords
gate oxide
mos technology
programming procedure
rom memories
thin junctions
Prior art date
Application number
IT8720872A
Other languages
English (en)
Other versions
IT8720872A0 (it
Inventor
Sergiogalbiati Alessandro Comi
Original Assignee
Sgs Microelettronica Spa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sgs Microelettronica Spa filed Critical Sgs Microelettronica Spa
Priority to IT8720872A priority Critical patent/IT1215558B/it
Publication of IT8720872A0 publication Critical patent/IT8720872A0/it
Priority to DE88201013T priority patent/DE3880890T2/de
Priority to EP88201013A priority patent/EP0294865B1/en
Priority to US07/198,877 priority patent/US4837181A/en
Priority to JP63141887A priority patent/JP2520695B2/ja
Application granted granted Critical
Publication of IT1215558B publication Critical patent/IT1215558B/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
    • G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
IT8720872A 1987-06-11 1987-06-11 Procedimento di programmazione per memorie rom e tecnolgia mos con ossido di gate e giunzioni sottili. IT1215558B (it)

Priority Applications (5)

Application Number Priority Date Filing Date Title
IT8720872A IT1215558B (it) 1987-06-11 1987-06-11 Procedimento di programmazione per memorie rom e tecnolgia mos con ossido di gate e giunzioni sottili.
DE88201013T DE3880890T2 (de) 1987-06-11 1988-05-20 Programmierverfahren für ROM-Speicher unter Verwendung der MOS-Technologie mit dünnen Gateoxid und mit Übergängen.
EP88201013A EP0294865B1 (en) 1987-06-11 1988-05-20 Rom memory programming procedure using mos technology with thin gate oxide and junctions
US07/198,877 US4837181A (en) 1987-06-11 1988-05-27 ROM memory programming procedure using MOS technology with thin gate oxide and junctions
JP63141887A JP2520695B2 (ja) 1987-06-11 1988-06-10 Ｒｏｍのプログラミング方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT8720872A IT1215558B (it) 1987-06-11 1987-06-11 Procedimento di programmazione per memorie rom e tecnolgia mos con ossido di gate e giunzioni sottili.

Publications (2)

Publication Number Publication Date
IT8720872A0 IT8720872A0 (it) 1987-06-11
IT1215558B true IT1215558B (it) 1990-02-14

Family

ID=11173353

Family Applications (1)

Application Number Title Priority Date Filing Date
IT8720872A IT1215558B (it) 1987-06-11 1987-06-11 Procedimento di programmazione per memorie rom e tecnolgia mos con ossido di gate e giunzioni sottili.

Country Status (5)

Country Link
US (1) US4837181A (it)
EP (1) EP0294865B1 (it)
JP (1) JP2520695B2 (it)
DE (1) DE3880890T2 (it)
IT (1) IT1215558B (it)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5019878A (en) * 1989-03-31 1991-05-28 Texas Instruments Incorporated Programmable interconnect or cell using silicided MOS transistors
US5068696A (en) * 1989-03-31 1991-11-26 Texas Instruments Incorporated Programmable interconnect or cell using silicided MOS transistors
US5091328A (en) * 1989-11-21 1992-02-25 National Semiconductor Corporation Method of late programming MOS devices
US5242848A (en) * 1990-01-22 1993-09-07 Silicon Storage Technology, Inc. Self-aligned method of making a split gate single transistor non-volatile electrically alterable semiconductor memory device
US5572054A (en) * 1990-01-22 1996-11-05 Silicon Storage Technology, Inc. Method of operating a single transistor non-volatile electrically alterable semiconductor memory device
US5486487A (en) * 1990-03-30 1996-01-23 Sgs-Thomson Microelectronics S.R.L. Method for adjusting the threshold of a read-only memory to achieve low capacitance and high breakdown voltage
KR100274555B1 (ko) * 1991-06-26 2000-12-15 윌리엄 비. 켐플러 절연 게이트 전계 효과 트랜지스터 구조물 및 이의 제조 방법
US5248626A (en) * 1992-08-28 1993-09-28 The United States Of America As Represented By The Secretary Of The Navy Method for fabricating self-aligned gate diffused junction field effect transistor
US5592012A (en) * 1993-04-06 1997-01-07 Sharp Kabushiki Kaisha Multivalued semiconductor read only storage device and method of driving the device and method of manufacturing the device
KR0147592B1 (ko) * 1994-06-24 1998-08-01 김광호 마스크-롬의 제조방법
US5401691A (en) * 1994-07-01 1995-03-28 Cypress Semiconductor Corporation Method of fabrication an inverse open frame alignment mark
US5796149A (en) * 1994-09-09 1998-08-18 Nippon Steel Corporation Semiconductor memory using different concentration impurity diffused layers
US5644154A (en) * 1995-03-27 1997-07-01 Microchip Technology Incorporated MOS read-only semiconductor memory with selected source/drain regions spaced away from edges of overlying gate electrode regions and method therefor
CN100377321C (zh) * 2004-06-28 2008-03-26 中芯国际集成电路制造(上海)有限公司 用于高电压操作的金属氧化物半导体器件及其制造方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5293278A (en) * 1976-01-30 1977-08-05 Matsushita Electronics Corp Manufacture for mos type semiconductor intergrated circuit
JPS5447489A (en) * 1977-09-21 1979-04-14 Hitachi Ltd Production of mos semiconductor device
US4385432A (en) * 1978-05-18 1983-05-31 Texas Instruments Incorporated Closely-spaced double level conductors for MOS read only
JPS54143076A (en) * 1978-04-28 1979-11-07 Fujitsu Ltd Semiconductor device and its manufacture
JPS5662353A (en) * 1979-10-29 1981-05-28 Toshiba Corp Semiconductor device and its manufacturing method
JPS577162A (en) * 1980-06-17 1982-01-14 Toshiba Corp Nonvolatile semiconductor memory and manufacture therefor
JPS5710265A (en) * 1980-06-23 1982-01-19 Nec Corp Field effect transistor
US4356042A (en) * 1980-11-07 1982-10-26 Mostek Corporation Method for fabricating a semiconductor read only memory
US4364165A (en) * 1981-05-28 1982-12-21 General Motors Corporation Late programming using a silicon nitride interlayer
JPS58170051A (ja) * 1982-03-31 1983-10-06 Fujitsu Ltd Ｒｏｍを有する半導体装置の製造方法
US4513494A (en) * 1983-07-19 1985-04-30 American Microsystems, Incorporated Late mask process for programming read only memories
US4649629A (en) * 1985-07-29 1987-03-17 Thomson Components - Mostek Corp. Method of late programming a read only memory

Also Published As

Publication number Publication date
EP0294865A1 (en) 1988-12-14
IT8720872A0 (it) 1987-06-11
JPS645054A (en) 1989-01-10
DE3880890T2 (de) 1993-11-25
US4837181A (en) 1989-06-06
DE3880890D1 (de) 1993-06-17
EP0294865B1 (en) 1993-05-12
JP2520695B2 (ja) 1996-07-31

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Effective date: 19970628