IT1246467B - Macchina a stati finiti per sistemi affidabili di computazione e regolazione - Google Patents
Macchina a stati finiti per sistemi affidabili di computazione e regolazioneInfo
- Publication number
- IT1246467B IT1246467B IT02181690A IT2181690A IT1246467B IT 1246467 B IT1246467 B IT 1246467B IT 02181690 A IT02181690 A IT 02181690A IT 2181690 A IT2181690 A IT 2181690A IT 1246467 B IT1246467 B IT 1246467B
- Authority
- IT
- Italy
- Prior art keywords
- state machine
- finite state
- regulation systems
- reliable computation
- computation
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0751—Error or fault detection not based on redundancy
- G06F11/0763—Error or fault detection not based on redundancy by bit configuration check, e.g. of formats or tags
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/085—Error detection or correction by redundancy in data representation, e.g. by using checking codes using codes with inherent redundancy, e.g. n-out-of-m codes
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/28—Error detection; Error correction; Monitoring by checking the correct order of processing
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Quality & Reliability (AREA)
- Debugging And Monitoring (AREA)
- Hardware Redundancy (AREA)
- Alarm Systems (AREA)
- Jib Cranes (AREA)
Priority Applications (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| IT02181690A IT1246467B (it) | 1990-10-22 | 1990-10-22 | Macchina a stati finiti per sistemi affidabili di computazione e regolazione |
| EP91117649A EP0482495B1 (en) | 1990-10-22 | 1991-10-16 | Finite-state machine for reliable computing and adjustment systems |
| DE69129727T DE69129727T2 (de) | 1990-10-22 | 1991-10-16 | Endlicher Automat für zuverlässige Rechner- und Steuerungssysteme |
| JP3272972A JPH04273537A (ja) | 1990-10-22 | 1991-10-22 | 信頼性の高いコンピューティングおよび調整システムのための有限状態機械 |
| KR1019910018615A KR920008592A (ko) | 1990-10-22 | 1991-10-25 | 신뢰성 있는 연산 및 조정 시스템용 유한-상태 기계 |
| US08/042,856 US5526486A (en) | 1990-10-22 | 1993-04-05 | Apparatus for detecting undefined states of a finite state machine (FSM) and resetting the FSM upon detection |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| IT02181690A IT1246467B (it) | 1990-10-22 | 1990-10-22 | Macchina a stati finiti per sistemi affidabili di computazione e regolazione |
| US08/042,856 US5526486A (en) | 1990-10-22 | 1993-04-05 | Apparatus for detecting undefined states of a finite state machine (FSM) and resetting the FSM upon detection |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| IT9021816A0 IT9021816A0 (it) | 1990-10-22 |
| IT9021816A1 IT9021816A1 (it) | 1992-04-22 |
| IT1246467B true IT1246467B (it) | 1994-11-19 |
Family
ID=26328006
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IT02181690A IT1246467B (it) | 1990-10-22 | 1990-10-22 | Macchina a stati finiti per sistemi affidabili di computazione e regolazione |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US5526486A (it) |
| EP (1) | EP0482495B1 (it) |
| JP (1) | JPH04273537A (it) |
| IT (1) | IT1246467B (it) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2295700B (en) * | 1994-12-02 | 1999-04-21 | Westinghouse Brake & Signal | Data testing |
| FR2771564B1 (fr) * | 1997-11-21 | 2000-02-11 | Sextant Avionique | Dispositif pour l'initialisation a la mise sous tension d'un circuit integre digital |
| US6389586B1 (en) * | 1998-01-05 | 2002-05-14 | Synplicity, Inc. | Method and apparatus for invalid state detection |
| US7689875B2 (en) * | 2002-04-25 | 2010-03-30 | Microsoft Corporation | Watchdog timer using a high precision event timer |
| DE10229817B4 (de) * | 2002-06-28 | 2007-05-24 | Robert Bosch Gmbh | Verfahren und Vorrichtung zum Ablegen eines Computerprogramms in einen Programmspeicher eines Steuergeräts |
| FR2867286A1 (fr) * | 2004-03-02 | 2005-09-09 | St Microelectronics Sa | Machine d'etats a logique cablee protegee contre le deraillement par injection de faute |
| US7714631B2 (en) * | 2004-05-13 | 2010-05-11 | Thomson Licensing | Method and apparatus for synchronizing a clock generator in the presence of jittery clock sources |
| US20070101316A1 (en) * | 2005-09-12 | 2007-05-03 | Don Berndt | Software Architecture and Program for the Concurrent Execution of Finite State Machine-Encoded Processes, on Single or Multiple-Processor-Based Embedded Systems |
| KR20110049937A (ko) * | 2009-11-06 | 2011-05-13 | 삼성전자주식회사 | 디스플레이 드라이버, 이의 동작 방법, 및 이를 포함하는 디스플레이 장치 |
| US11017907B2 (en) * | 2013-12-31 | 2021-05-25 | Nuscale Power, Llc | Nuclear reactor protection systems and methods |
| US10324743B2 (en) | 2014-08-27 | 2019-06-18 | Red Hat Israel, Ltd. | Announcing virtual machine migration |
| CN110457158A (zh) * | 2019-08-16 | 2019-11-15 | 深圳市智微智能软件开发有限公司 | 基于有限状态机的看门狗实现方法、装置、设备及存储介质 |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3982111A (en) * | 1975-08-04 | 1976-09-21 | Bell Telephone Laboratories, Incorporated | Memory diagnostic arrangement |
| US4342083A (en) * | 1980-02-05 | 1982-07-27 | The Bendix Corporation | Communication system for a multiple-computer system |
| US4672609A (en) * | 1982-01-19 | 1987-06-09 | Tandem Computers Incorporated | Memory system with operation error detection |
| US4727548A (en) * | 1986-09-08 | 1988-02-23 | Harris Corporation | On-line, limited mode, built-in fault detection/isolation system for state machines and combinational logic |
| DE3639055C2 (de) * | 1986-11-14 | 1998-02-05 | Bosch Gmbh Robert | Verfahren zur Betriebsüberwachung und Fehlerkorrektur von Rechnern eines Mehrrechnersystems und Mehrrechnersystem |
| US4845712A (en) * | 1987-11-30 | 1989-07-04 | Tandem Computers Incorporated | State machine checker |
| US5113187A (en) * | 1991-03-25 | 1992-05-12 | Nec America, Inc. | CMI encoder circuit |
-
1990
- 1990-10-22 IT IT02181690A patent/IT1246467B/it active IP Right Grant
-
1991
- 1991-10-16 EP EP91117649A patent/EP0482495B1/en not_active Expired - Lifetime
- 1991-10-22 JP JP3272972A patent/JPH04273537A/ja active Pending
-
1993
- 1993-04-05 US US08/042,856 patent/US5526486A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| EP0482495A3 (en) | 1993-02-24 |
| JPH04273537A (ja) | 1992-09-29 |
| IT9021816A1 (it) | 1992-04-22 |
| US5526486A (en) | 1996-06-11 |
| EP0482495B1 (en) | 1998-07-08 |
| EP0482495A2 (en) | 1992-04-29 |
| IT9021816A0 (it) | 1990-10-22 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 0001 | Granted | ||
| TA | Fee payment date (situation as of event date), data collected since 19931001 |
Effective date: 19971030 |