IT1247641B - Trasferimento di dati in modo dma durante fasi di risveglio durante lo stato di attesa per interruzione di un microprocessore con riduzione di consumo - Google Patents

Trasferimento di dati in modo dma durante fasi di risveglio durante lo stato di attesa per interruzione di un microprocessore con riduzione di consumo

Info

Publication number
IT1247641B
IT1247641B IT08361890A IT8361890A IT1247641B IT 1247641 B IT1247641 B IT 1247641B IT 08361890 A IT08361890 A IT 08361890A IT 8361890 A IT8361890 A IT 8361890A IT 1247641 B IT1247641 B IT 1247641B
Authority
IT
Italy
Prior art keywords
during
interruption
wait
microprocessor
transfer
Prior art date
Application number
IT08361890A
Other languages
English (en)
Other versions
IT9083618A0 (it
IT9083618A1 (it
Inventor
Flavio Scarra
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to IT08361890A priority Critical patent/IT1247641B/it
Publication of IT9083618A0 publication Critical patent/IT9083618A0/it
Priority to EP91830166A priority patent/EP0458756A1/en
Priority to JP3125537A priority patent/JPH04229354A/ja
Publication of IT9083618A1 publication Critical patent/IT9083618A1/it
Application granted granted Critical
Publication of IT1247641B publication Critical patent/IT1247641B/it

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206Monitoring of events, devices or parameters that trigger a change in power modality
    • G06F1/3215Monitoring of peripheral devices
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G06F13/285Halt processor DMA

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Power Sources (AREA)
  • Microcomputers (AREA)
IT08361890A 1990-04-26 1990-04-26 Trasferimento di dati in modo dma durante fasi di risveglio durante lo stato di attesa per interruzione di un microprocessore con riduzione di consumo IT1247641B (it)

Priority Applications (3)

Application Number Priority Date Filing Date Title
IT08361890A IT1247641B (it) 1990-04-26 1990-04-26 Trasferimento di dati in modo dma durante fasi di risveglio durante lo stato di attesa per interruzione di un microprocessore con riduzione di consumo
EP91830166A EP0458756A1 (en) 1990-04-26 1991-04-23 Data transfer in DMA mode during a wake up phase of a microprocessor in a wait for interrupt condition for reducing power consumption
JP3125537A JPH04229354A (ja) 1990-04-26 1991-04-26 電力消費節減のためにインタラプト待ち状態のマイクロプロセッサのウェイクアップフェーズ間にdmaモードでのデータトランスファー

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT08361890A IT1247641B (it) 1990-04-26 1990-04-26 Trasferimento di dati in modo dma durante fasi di risveglio durante lo stato di attesa per interruzione di un microprocessore con riduzione di consumo

Publications (3)

Publication Number Publication Date
IT9083618A0 IT9083618A0 (it) 1990-04-26
IT9083618A1 IT9083618A1 (it) 1991-10-26
IT1247641B true IT1247641B (it) 1994-12-28

Family

ID=11323222

Family Applications (1)

Application Number Title Priority Date Filing Date
IT08361890A IT1247641B (it) 1990-04-26 1990-04-26 Trasferimento di dati in modo dma durante fasi di risveglio durante lo stato di attesa per interruzione di un microprocessore con riduzione di consumo

Country Status (3)

Country Link
EP (1) EP0458756A1 (it)
JP (1) JPH04229354A (it)
IT (1) IT1247641B (it)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5511203A (en) * 1994-02-02 1996-04-23 Advanced Micro Devices Power management system distinguishing between primary and secondary system activity
US6202104B1 (en) 1998-07-28 2001-03-13 Siemens Aktiengesellschaft Processor having a clock driven CPU with static design
JP2006127300A (ja) * 2004-10-29 2006-05-18 Hitachi Global Storage Technologies Netherlands Bv ホストと記憶デバイスとの間における通信方法、記憶デバイス、ホスト、記憶デバイスとホストを備えるシステム
US7529956B2 (en) 2006-07-17 2009-05-05 Microsoft Corporation Granular reduction in power consumption
US7925799B2 (en) * 2007-04-27 2011-04-12 Ricoh Company, Ltd. Serial ATA interface control circuit and power management method wherein start and completion of data transfer is monitored during DMA operations using memory control unit

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3758945A (en) * 1972-01-07 1973-09-18 York Stone & Supply Co Masonry flute rake
JPS5775335A (en) * 1980-10-27 1982-05-11 Hitachi Ltd Data processor
US4851987A (en) * 1986-01-17 1989-07-25 International Business Machines Corporation System for reducing processor power consumption by stopping processor clock supply if a desired event does not occur
EP0368144B1 (en) * 1988-11-10 1996-02-07 Motorola, Inc. Digital computing system with low power mode

Also Published As

Publication number Publication date
IT9083618A0 (it) 1990-04-26
EP0458756A1 (en) 1991-11-27
IT9083618A1 (it) 1991-10-26
JPH04229354A (ja) 1992-08-18

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Legal Events

Date Code Title Description
0001 Granted
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19970429