IT1298816B1 - Circuito di commutazione con tensione di uscita variabile fra una tensione di riferimento ed una tensione negativa - Google Patents

Circuito di commutazione con tensione di uscita variabile fra una tensione di riferimento ed una tensione negativa

Info

Publication number
IT1298816B1
IT1298816B1 IT98MI000638A ITMI980638A IT1298816B1 IT 1298816 B1 IT1298816 B1 IT 1298816B1 IT 98MI000638 A IT98MI000638 A IT 98MI000638A IT MI980638 A ITMI980638 A IT MI980638A IT 1298816 B1 IT1298816 B1 IT 1298816B1
Authority
IT
Italy
Prior art keywords
voltage
switching circuit
variable output
negative
output voltage
Prior art date
Application number
IT98MI000638A
Other languages
English (en)
Inventor
Marco Maccarrone
Stefano Commodaro
Andrea Ghilardelli
Stefano Ghezzi
Original Assignee
Sgs Thomson Microelectronics
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sgs Thomson Microelectronics filed Critical Sgs Thomson Microelectronics
Priority to IT98MI000638A priority Critical patent/IT1298816B1/it
Priority to US09/275,255 priority patent/US6031761A/en
Publication of ITMI980638A1 publication Critical patent/ITMI980638A1/it
Application granted granted Critical
Publication of IT1298816B1 publication Critical patent/IT1298816B1/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
IT98MI000638A 1998-03-27 1998-03-27 Circuito di commutazione con tensione di uscita variabile fra una tensione di riferimento ed una tensione negativa IT1298816B1 (it)

Priority Applications (2)

Application Number Priority Date Filing Date Title
IT98MI000638A IT1298816B1 (it) 1998-03-27 1998-03-27 Circuito di commutazione con tensione di uscita variabile fra una tensione di riferimento ed una tensione negativa
US09/275,255 US6031761A (en) 1998-03-27 1999-03-24 Switching circuit having an output voltage varying between a reference voltage and a negative voltage

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT98MI000638A IT1298816B1 (it) 1998-03-27 1998-03-27 Circuito di commutazione con tensione di uscita variabile fra una tensione di riferimento ed una tensione negativa

Publications (2)

Publication Number Publication Date
ITMI980638A1 ITMI980638A1 (it) 1999-09-27
IT1298816B1 true IT1298816B1 (it) 2000-02-02

Family

ID=11379517

Family Applications (1)

Application Number Title Priority Date Filing Date
IT98MI000638A IT1298816B1 (it) 1998-03-27 1998-03-27 Circuito di commutazione con tensione di uscita variabile fra una tensione di riferimento ed una tensione negativa

Country Status (2)

Country Link
US (1) US6031761A (it)
IT (1) IT1298816B1 (it)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6816077B1 (en) * 2001-03-02 2004-11-09 Elesys North America Inc. Multiple sensor vehicle occupant detection for air bag deployment control
US7436299B2 (en) 2001-03-02 2008-10-14 Elesys North America Inc. Vehicle occupant detection using relative impedance measurements
WO2003025944A1 (en) * 2001-09-18 2003-03-27 Kilopass Technologies, Inc. Semiconductor memory cell and memory array using a breakdown phenomena in an ultra-thin dielectric
US6992925B2 (en) * 2002-04-26 2006-01-31 Kilopass Technologies, Inc. High density semiconductor memory cell and memory array using a single transistor and having counter-doped poly and buried diffusion wordline
US6940751B2 (en) * 2002-04-26 2005-09-06 Kilopass Technologies, Inc. High density semiconductor memory cell and memory array using a single transistor and having variable gate oxide breakdown
US7031209B2 (en) * 2002-09-26 2006-04-18 Kilopass Technology, Inc. Methods and circuits for testing programmability of a semiconductor memory cell and memory array using a breakdown phenomenon in an ultra-thin dielectric
US7042772B2 (en) * 2002-09-26 2006-05-09 Kilopass Technology, Inc. Methods and circuits for programming of a semiconductor memory cell and memory array using a breakdown phenomenon in an ultra-thin dielectric
US6924664B2 (en) * 2003-08-15 2005-08-02 Kilopass Technologies, Inc. Field programmable gate array
US7064973B2 (en) * 2004-02-03 2006-06-20 Klp International, Ltd. Combination field programmable gate array allowing dynamic reprogrammability
US6972986B2 (en) * 2004-02-03 2005-12-06 Kilopass Technologies, Inc. Combination field programmable gate array allowing dynamic reprogrammability and non-votatile programmability based upon transistor gate oxide breakdown
US20050218929A1 (en) * 2004-04-02 2005-10-06 Man Wang Field programmable gate array logic cell and its derivatives
US8735297B2 (en) 2004-05-06 2014-05-27 Sidense Corporation Reverse optical proximity correction method
WO2005109516A1 (en) 2004-05-06 2005-11-17 Sidense Corp. Split-channel antifuse array architecture
US9123572B2 (en) 2004-05-06 2015-09-01 Sidense Corporation Anti-fuse memory cell
US7755162B2 (en) 2004-05-06 2010-07-13 Sidense Corp. Anti-fuse memory cell
US7164290B2 (en) * 2004-06-10 2007-01-16 Klp International, Ltd. Field programmable gate array logic unit and its cluster
US20050275427A1 (en) * 2004-06-10 2005-12-15 Man Wang Field programmable gate array logic unit and its cluster
US7135886B2 (en) * 2004-09-20 2006-11-14 Klp International, Ltd. Field programmable gate arrays using both volatile and nonvolatile memory cell properties and their control
US7193436B2 (en) * 2005-04-18 2007-03-20 Klp International Ltd. Fast processing path using field programmable gate array logic units
KR20110041309A (ko) * 2009-10-15 2011-04-21 삼성전자주식회사 네거티브 레벨 쉬프터

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0750314B1 (en) * 1995-06-19 2000-01-26 STMicroelectronics S.r.l. Negative word line voltage regulation circuit for electrically erasable semiconductor memory devices
US5943265A (en) * 1998-08-12 1999-08-24 Programmable Microelectronics Corp. Method and apparatus for switching nodes between multiple potentials

Also Published As

Publication number Publication date
ITMI980638A1 (it) 1999-09-27
US6031761A (en) 2000-02-29

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Legal Events

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