IT1320025B1 - Supporto del tipo a circuito stampato per circuiti elettroniciintegrati, procedimento per la sua fabbricazione, e componente - Google Patents

Supporto del tipo a circuito stampato per circuiti elettroniciintegrati, procedimento per la sua fabbricazione, e componente

Info

Publication number
IT1320025B1
IT1320025B1 IT2000TO000334A ITTO20000334A IT1320025B1 IT 1320025 B1 IT1320025 B1 IT 1320025B1 IT 2000TO000334 A IT2000TO000334 A IT 2000TO000334A IT TO20000334 A ITTO20000334 A IT TO20000334A IT 1320025 B1 IT1320025 B1 IT 1320025B1
Authority
IT
Italy
Prior art keywords
procedure
manufacture
component
support
printed circuit
Prior art date
Application number
IT2000TO000334A
Other languages
English (en)
Inventor
Giuseppe Pedretti
Carlo Arrigoni
Original Assignee
Viasystems S R L
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Viasystems S R L filed Critical Viasystems S R L
Priority to IT2000TO000334A priority Critical patent/IT1320025B1/it
Publication of ITTO20000334A0 publication Critical patent/ITTO20000334A0/it
Priority to PCT/IT2001/000177 priority patent/WO2001078140A2/en
Publication of ITTO20000334A1 publication Critical patent/ITTO20000334A1/it
Application granted granted Critical
Publication of IT1320025B1 publication Critical patent/IT1320025B1/it

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing of the conductive pattern
    • H05K3/241—Reinforcing of the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus
    • H05K3/242—Reinforcing of the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus characterised by using temporary conductors on the printed circuit for electrically connecting areas which are to be electroplated
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H10W70/635—Through-vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09036—Recesses or grooves in insulating substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/0959—Plated through-holes or plated blind vias filled with insulating material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/0228—Cutting, sawing, milling or shearing
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
    • H05K2203/0562—Details of resist
    • H05K2203/0571—Dual purpose resist, e.g. etch resist used as solder resist, solder resist used as plating resist
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/16—Inspection; Monitoring; Aligning
    • H05K2203/162—Testing a finished product, e.g. heat cycle testing of solder joints
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0052—Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061—Etching masks
    • H05K3/064—Photoresists
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Credit Cards Or The Like (AREA)
  • Wire Bonding (AREA)
IT2000TO000334A 2000-04-10 2000-04-10 Supporto del tipo a circuito stampato per circuiti elettroniciintegrati, procedimento per la sua fabbricazione, e componente IT1320025B1 (it)

Priority Applications (2)

Application Number Priority Date Filing Date Title
IT2000TO000334A IT1320025B1 (it) 2000-04-10 2000-04-10 Supporto del tipo a circuito stampato per circuiti elettroniciintegrati, procedimento per la sua fabbricazione, e componente
PCT/IT2001/000177 WO2001078140A2 (en) 2000-04-10 2001-04-09 Chip carrier, relative manufacturing process, and electronic component incorporating such a carrier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT2000TO000334A IT1320025B1 (it) 2000-04-10 2000-04-10 Supporto del tipo a circuito stampato per circuiti elettroniciintegrati, procedimento per la sua fabbricazione, e componente

Publications (3)

Publication Number Publication Date
ITTO20000334A0 ITTO20000334A0 (it) 2000-04-10
ITTO20000334A1 ITTO20000334A1 (it) 2001-10-10
IT1320025B1 true IT1320025B1 (it) 2003-11-12

Family

ID=11457657

Family Applications (1)

Application Number Title Priority Date Filing Date
IT2000TO000334A IT1320025B1 (it) 2000-04-10 2000-04-10 Supporto del tipo a circuito stampato per circuiti elettroniciintegrati, procedimento per la sua fabbricazione, e componente

Country Status (2)

Country Link
IT (1) IT1320025B1 (it)
WO (1) WO2001078140A2 (it)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1381260A1 (en) * 2002-07-11 2004-01-14 Ultratera Corporation Method of plating connecting layers on a conductor pattern of a printed circuit board (PCB)
US20040007386A1 (en) * 2002-07-11 2004-01-15 S & S Technology Corporation Structure of printed circuit board (PCB)
RU2244364C1 (ru) * 2003-04-09 2005-01-10 ЗАО "Синтез электронных компонентов" Способ изготовления микросхем
US7488620B2 (en) * 2005-12-29 2009-02-10 Sandisk Corporation Method of fabricating leadframe based flash memory cards including singulation by straight line cuts

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4551788A (en) * 1984-10-04 1985-11-05 Daniel Robert P Multi-chip carrier array
DE3817600C2 (de) * 1987-05-26 1994-06-23 Matsushita Electric Works Ltd Verfahren zur Herstellung einer Halbleitervorrichtung mit einem keramischen Substrat und einem integrierten Schaltungskreis
US5652185A (en) * 1995-04-07 1997-07-29 National Semiconductor Corporation Maximized substrate design for grid array based assemblies
US5783866A (en) * 1996-05-17 1998-07-21 National Semiconductor Corporation Low cost ball grid array device and method of manufacture thereof
US6140708A (en) * 1996-05-17 2000-10-31 National Semiconductor Corporation Chip scale package and method for manufacture thereof
US6177722B1 (en) * 1998-04-21 2001-01-23 Atmel Corporation Leadless array package

Also Published As

Publication number Publication date
ITTO20000334A0 (it) 2000-04-10
ITTO20000334A1 (it) 2001-10-10
WO2001078140A3 (en) 2002-02-07
WO2001078140A2 (en) 2001-10-18

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