IT7825058A0 - Apparecchiatura perfezionata per eseguire operazioni aritmetiche in calcolatori decimali. - Google Patents

Apparecchiatura perfezionata per eseguire operazioni aritmetiche in calcolatori decimali.

Info

Publication number
IT7825058A0
IT7825058A0 IT7825058A IT2505878A IT7825058A0 IT 7825058 A0 IT7825058 A0 IT 7825058A0 IT 7825058 A IT7825058 A IT 7825058A IT 2505878 A IT2505878 A IT 2505878A IT 7825058 A0 IT7825058 A0 IT 7825058A0
Authority
IT
Italy
Prior art keywords
calculators
decimal
arithmetic operations
performing arithmetic
improved equipment
Prior art date
Application number
IT7825058A
Other languages
English (en)
Other versions
IT1112643B (it
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of IT7825058A0 publication Critical patent/IT7825058A0/it
Application granted granted Critical
Publication of IT1112643B publication Critical patent/IT1112643B/it

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/491—Computations with decimal numbers radix 12 or 20.
    • G06F7/492—Computations with decimal numbers radix 12 or 20. using a binary weighted representation within each denomination
    • G06F7/493—Computations with decimal numbers radix 12 or 20. using a binary weighted representation within each denomination the representation being the natural binary coded representation, i.e. 8421-code
    • G06F7/494—Adding; Subtracting
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/491—Indexing scheme relating to groups G06F7/491 - G06F7/4917
    • G06F2207/4911—Decimal floating-point representation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/492—Indexing scheme relating to groups G06F7/492 - G06F7/496
    • G06F2207/4924—Digit-parallel adding or subtracting
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49942—Significance control
    • G06F7/49947—Rounding
    • G06F7/49963—Rounding to nearest

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Analysis (AREA)
  • Complex Calculations (AREA)
  • Digital Computer Display Output (AREA)
  • Executing Machine-Instructions (AREA)
IT25058/78A 1977-06-29 1978-06-28 Apparecchiatura perfezionata per eseguire operazioni aritmetiche in calcolatori decimali IT1112643B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/811,214 US4110831A (en) 1977-06-29 1977-06-29 Method and means for tracking digit significance in arithmetic operations executed on decimal computers

Publications (2)

Publication Number Publication Date
IT7825058A0 true IT7825058A0 (it) 1978-06-28
IT1112643B IT1112643B (it) 1986-01-20

Family

ID=25205910

Family Applications (1)

Application Number Title Priority Date Filing Date
IT25058/78A IT1112643B (it) 1977-06-29 1978-06-28 Apparecchiatura perfezionata per eseguire operazioni aritmetiche in calcolatori decimali

Country Status (6)

Country Link
US (1) US4110831A (it)
JP (1) JPS584369B2 (it)
DE (1) DE2826773A1 (it)
FR (1) FR2396360A1 (it)
GB (1) GB1579100A (it)
IT (1) IT1112643B (it)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2448188A1 (fr) * 1979-02-02 1980-08-29 Anvar Procede et ensemble de calcul, aleatoirement par exces ou par defaut, pour fournir des resultats de calcul avec le nombre de chiffres significatifs exacts
FR2455315B1 (fr) * 1979-04-23 1986-10-24 Anvar Procede pour fournir un resultat de calcul numerique avec le nombre de chiffres significatifs exacts dans ce resultat et dispositif de calcul numerique mettant en oeuvre ce procede
JPS56135236A (en) * 1980-03-24 1981-10-22 Casio Comput Co Ltd Numeric data displaying system
JP3421933B2 (ja) * 1994-10-31 2003-06-30 弘之 河▲崎▼ 演算処理装置及び電子計算機
US5809323A (en) * 1995-09-19 1998-09-15 International Business Machines Corporation Method and apparatus for executing fixed-point instructions within idle execution units of a superscalar processor
JP2000068834A (ja) 1998-08-20 2000-03-03 Hiroyuki Kawasaki 信号変換方法及び信号変換器
US7308686B1 (en) 1999-12-22 2007-12-11 Ubicom Inc. Software input/output using hard real time threads
EP1247195A4 (en) * 1999-12-22 2005-01-05 Ubicom Inc SYSTEM AND METHOD FOR MULTITHREADING WORKING ON COMMAND LEVEL IN AN EMBEDDED PROCESSOR WITH ZERO-TIME CONTEXT SWITCHING
US7120783B2 (en) * 1999-12-22 2006-10-10 Ubicom, Inc. System and method for reading and writing a thread state in a multithreaded central processing unit
US7047396B1 (en) * 2000-06-22 2006-05-16 Ubicom, Inc. Fixed length memory to memory arithmetic and architecture for a communications embedded processor system
US7010612B1 (en) 2000-06-22 2006-03-07 Ubicom, Inc. Universal serializer/deserializer
US7822950B1 (en) 2003-01-22 2010-10-26 Ubicom, Inc. Thread cancellation and recirculation in a computer processor for avoiding pipeline stalls
JP5549743B2 (ja) * 2010-12-07 2014-07-16 富士通株式会社 １０進絶対値加算器

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3842250A (en) * 1973-08-29 1974-10-15 Sperry Rand Corp Circuit for implementing rounding in add/subtract logic networks
US3885141A (en) * 1974-02-06 1975-05-20 Bell Telephone Labor Inc Modular pipeline multiplier to generate a rounded product

Also Published As

Publication number Publication date
IT1112643B (it) 1986-01-20
GB1579100A (en) 1980-11-12
FR2396360B1 (it) 1983-03-18
JPS5412236A (en) 1979-01-29
US4110831A (en) 1978-08-29
DE2826773A1 (de) 1979-01-11
JPS584369B2 (ja) 1983-01-26
FR2396360A1 (fr) 1979-01-26

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