IT7826896A0 - Circuito di tempificazione. - Google Patents

Circuito di tempificazione.

Info

Publication number
IT7826896A0
IT7826896A0 IT7826896A IT2689678A IT7826896A0 IT 7826896 A0 IT7826896 A0 IT 7826896A0 IT 7826896 A IT7826896 A IT 7826896A IT 2689678 A IT2689678 A IT 2689678A IT 7826896 A0 IT7826896 A0 IT 7826896A0
Authority
IT
Italy
Prior art keywords
timing circuit
timing
circuit
Prior art date
Application number
IT7826896A
Other languages
English (en)
Original Assignee
Rca Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rca Corp filed Critical Rca Corp
Publication of IT7826896A0 publication Critical patent/IT7826896A0/it

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/199—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division with reset of the frequency divider or the counter, e.g. for assuring initial synchronisation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03J—TUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
    • H03J5/00—Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner
    • H03J5/02—Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner with variable tuning element having a number of predetermined settings and adjustable to a desired one of these settings
    • H03J5/0245—Discontinuous tuning using an electrical variable impedance element, e.g. a voltage variable reactive diode, in which no corresponding analogue value either exists or is preset, i.e. the tuning information is only available in a digital form
    • H03J5/0272—Discontinuous tuning using an electrical variable impedance element, e.g. a voltage variable reactive diode, in which no corresponding analogue value either exists or is preset, i.e. the tuning information is only available in a digital form the digital values being used to preset a counter or a frequency divider in a phase locked loop, e.g. frequency synthesizer
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
    • H03M1/129—Means for adapting the input signal to the range the converter can handle, e.g. limiting, pre-scaling ; Out-of-range indication
    • H03M1/1295—Clamping, i.e. adjusting the DC level of the input signal to a predetermined value
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
    • H03M1/0626—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by filtering
    • H03M1/0631—Smoothing

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Analogue/Digital Conversion (AREA)
  • Electric Clocks (AREA)
  • Superheterodyne Receivers (AREA)
IT7826896A 1977-08-22 1978-08-21 Circuito di tempificazione. IT7826896A0 (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB3516777 1977-08-22

Publications (1)

Publication Number Publication Date
IT7826896A0 true IT7826896A0 (it) 1978-08-21

Family

ID=10374624

Family Applications (1)

Application Number Title Priority Date Filing Date
IT7826896A IT7826896A0 (it) 1977-08-22 1978-08-21 Circuito di tempificazione.

Country Status (8)

Country Link
US (2) US4182994A (it)
JP (2) JPS5445510A (it)
DE (2) DE2836724A1 (it)
FI (1) FI782483A7 (it)
FR (2) FR2401559A1 (it)
GB (2) GB2003300B (it)
IT (1) IT7826896A0 (it)
SE (1) SE7808664L (it)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2511563B1 (fr) * 1981-08-14 1986-05-16 Trt Telecom Radio Electr Dispositif de verrouillage de phase pour fournir a sa sortie des signaux dont la frequence peut varier sur une large gamme
US4438404A (en) 1982-01-04 1984-03-20 Tektronix, Inc. Signal sampling system
US4598317A (en) * 1984-01-23 1986-07-01 Rca Corporation Ramp comparator arrangement useful in an on-screen channel indicator system of a television receiver
US4679005A (en) * 1985-01-23 1987-07-07 Sony Corporation Phase locked loop with frequency offset
US4600889A (en) * 1985-03-13 1986-07-15 Motorola, Inc. Coherent oscillator
US4654542A (en) * 1985-07-01 1987-03-31 Gte Laboratories Incorporated Staircase ramp voltage generating apparatus with energy reuse
PL149642B1 (en) * 1986-04-08 1990-03-31 Digital frequency synthetizer
US4926131A (en) * 1987-06-25 1990-05-15 Schlumberger Industries, Inc. Triangle waveform generator for pulse-width amplitude multiplier
US5220206A (en) * 1990-06-29 1993-06-15 Analog Devices, Inc. Control apparatus with improved recovery from power reduction, and storage device therefor
US5157342A (en) * 1991-08-30 1992-10-20 The United States Of America As Represented By The Secretary Of The Navy Precision digital phase lock loop circuit
US5369376A (en) * 1991-11-29 1994-11-29 Standard Microsystems, Inc. Programmable phase locked loop circuit and method of programming same
KR960014676B1 (ko) * 1993-12-29 1996-10-19 양승택 위성통신용 저속 데이타 전용 단말 지구국의 송신 기준주파수 발진기(tro)
US5692023A (en) * 1994-11-04 1997-11-25 Lsi Logic Corporation Phase locked loop including distributed phase correction pulses for reducing output ripple
ES2182058T5 (es) * 1996-03-15 2011-05-24 E Guide, Inc. Método para visualizar programas de televisión y texto relacionado.
KR100643980B1 (ko) * 2000-08-02 2006-11-10 엘지전자 주식회사 Gsm 단말기의 타임 버스트 램프 특성 조정방법
US6392460B1 (en) * 2001-01-17 2002-05-21 Walter H. Vail Drive circuit for tattoo machine which provides improved operator control
CN102984630B (zh) 2011-09-06 2015-12-02 昂宝电子(上海)有限公司 用于音频放大系统中减少失真的系统和方法
JP2014179508A (ja) * 2013-03-15 2014-09-25 Tokyo Electron Ltd 基板処理装置及び基板処理方法
US9685919B2 (en) 2013-08-21 2017-06-20 On-Bright Electronics (Shanghai) Co., Ltd. Amplification systems and methods with output regulation
CN103441739B (zh) 2013-08-21 2015-04-22 昂宝电子(上海)有限公司 具有一个或多个通道的放大系统和方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1462279A (fr) * 1965-09-21 1966-04-15 Cit Alcatel Liaisons radio à fréquences porteuses aléatoires
CA1096519A (en) * 1976-10-27 1981-02-24 Rca Corporation Phase locked loop tuning system with a preset channel memory
GB1590444A (en) * 1976-10-27 1981-06-03 Rca Corp Phase locked loop tuning system with preset tuning

Also Published As

Publication number Publication date
GB2003300B (en) 1982-03-17
GB2003351B (en) 1982-03-03
FI782483A7 (fi) 1979-02-23
JPS5445510A (en) 1979-04-10
US4204173A (en) 1980-05-20
GB2003300A (en) 1979-03-07
FR2401557A1 (fr) 1979-03-23
FR2401559A1 (fr) 1979-03-23
SE7808664L (sv) 1979-02-23
DE2836723A1 (de) 1979-03-22
US4182994A (en) 1980-01-08
DE2836724A1 (de) 1979-03-01
GB2003351A (en) 1979-03-07
JPS5456349A (en) 1979-05-07

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