IT7920566A0 - Dispositivo per trasferire e controllare una parola parziale. - Google Patents

Dispositivo per trasferire e controllare una parola parziale.

Info

Publication number
IT7920566A0
IT7920566A0 IT7920566A IT2056679A IT7920566A0 IT 7920566 A0 IT7920566 A0 IT 7920566A0 IT 7920566 A IT7920566 A IT 7920566A IT 2056679 A IT2056679 A IT 2056679A IT 7920566 A0 IT7920566 A0 IT 7920566A0
Authority
IT
Italy
Prior art keywords
transferring
controlling
partial word
word
partial
Prior art date
Application number
IT7920566A
Other languages
English (en)
Other versions
IT1166666B (it
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of IT7920566A0 publication Critical patent/IT7920566A0/it
Application granted granted Critical
Publication of IT1166666B publication Critical patent/IT1166666B/it

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
    • G06F11/1056—Updating check bits on partial write, i.e. read/modify/write

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Detection And Correction Of Errors (AREA)
  • Memory System (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Multi Processors (AREA)
IT20566/79A 1978-03-16 1979-02-27 Dispositivo per trasferire e controllare una parola parziale IT1166666B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2811318A DE2811318C2 (de) 1978-03-16 1978-03-16 Einrichtung zur Übertragung und Speicherung eines Teilwortes

Publications (2)

Publication Number Publication Date
IT7920566A0 true IT7920566A0 (it) 1979-02-27
IT1166666B IT1166666B (it) 1987-05-06

Family

ID=6034533

Family Applications (1)

Application Number Title Priority Date Filing Date
IT20566/79A IT1166666B (it) 1978-03-16 1979-02-27 Dispositivo per trasferire e controllare una parola parziale

Country Status (6)

Country Link
US (1) US4204634A (it)
JP (1) JPS5918800B2 (it)
DE (1) DE2811318C2 (it)
FR (1) FR2420172A1 (it)
GB (1) GB2016751B (it)
IT (1) IT1166666B (it)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0619913B2 (ja) * 1984-03-30 1994-03-16 パイオニア株式会社 ビデオフオ−マツト信号に担持されるデ−タのエラ−訂正方式
US4977536A (en) * 1984-12-10 1990-12-11 Canon Kabushiki Kaisha Document processor
US5144628A (en) * 1988-10-05 1992-09-01 Nec Corporation Microprogram controller in data processing apparatus
US5124987A (en) * 1990-04-16 1992-06-23 Storage Technology Corporation Logical track write scheduling system for a parallel disk drive array data storage subsystem
US5357622A (en) * 1990-09-27 1994-10-18 Dell U.S.A., L.P. Apparatus for queing and storing data writes into valid word patterns
JPH05225798A (ja) * 1991-08-14 1993-09-03 Internatl Business Mach Corp <Ibm> メモリシステム
US5721954A (en) * 1992-04-13 1998-02-24 At&T Global Information Solutions Company Intelligent SCSI-2/DMA processor
US5369651A (en) * 1992-06-30 1994-11-29 Intel Corporation Multiplexed byte enable bus for partial word writes to ECC protected memory
US6629168B1 (en) * 2000-06-15 2003-09-30 Hewlett-Packard Development Company, Lp. Byte-swapping for efficient use of memory
KR100855979B1 (ko) * 2007-02-13 2008-09-02 삼성전자주식회사 바이트 마스킹 동작을 위한 반도체 메모리 장치 및 패리티데이터 생성 방법
US8751905B2 (en) * 2011-09-16 2014-06-10 Avalanche Technology, Inc. Memory with on-chip error correction
GB2516831B (en) 2013-07-31 2020-10-21 Advanced Risc Mach Ltd Error code management in systems permitting partial writes
CN105355167B (zh) * 2015-11-13 2018-04-06 西安诺瓦电子科技有限公司 Led校正系数数据合并方法
US11314588B2 (en) * 2019-11-11 2022-04-26 Winbond Electronics Corp. Memory device and multi physical cells error correction method thereof

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3351915A (en) * 1964-12-30 1967-11-07 Bell Telephone Labor Inc Mask generating circuit
US3560942A (en) * 1968-07-15 1971-02-02 Ibm Clock for overlapped memories with error correction
US3573728A (en) * 1969-01-09 1971-04-06 Ibm Memory with error correction for partial store operation
DE2133323C3 (de) * 1971-07-05 1974-08-08 Ibm Deutschland Gmbh, 7000 Stuttgart Fehlererkennungs- und Korrekturschaltung für binäre Datensignale
US3809884A (en) * 1972-11-15 1974-05-07 Honeywell Inf Systems Apparatus and method for a variable memory cycle in a data processing unit
US3883854A (en) * 1973-11-30 1975-05-13 Ibm Interleaved memory control signal and data handling apparatus using pipelining techniques
US4005405A (en) * 1975-05-07 1977-01-25 Data General Corporation Error detection and correction in data processing systems
US4058851A (en) * 1976-10-18 1977-11-15 Sperry Rand Corporation Conditional bypass of error correction for dual memory access time selection
US4100403A (en) * 1977-04-25 1978-07-11 International Business Machines Corporation Method and means for discriminating between systematic and noise-induced error in data extracted from word organized memory arrays
US4157586A (en) * 1977-05-05 1979-06-05 International Business Machines Corporation Technique for performing partial stores in store-thru memory configuration
US4139149A (en) * 1977-08-31 1979-02-13 Ncr Corporation Display system

Also Published As

Publication number Publication date
FR2420172B1 (it) 1981-11-20
GB2016751B (en) 1982-01-20
GB2016751A (en) 1979-09-26
IT1166666B (it) 1987-05-06
JPS5918800B2 (ja) 1984-04-28
DE2811318C2 (de) 1983-02-17
FR2420172A1 (fr) 1979-10-12
JPS54127636A (en) 1979-10-03
US4204634A (en) 1980-05-27
DE2811318A1 (de) 1979-09-27

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