IT7925328A0 - Circuito mosfet divisore di fase e convertitore di livello di segnali di entrata ttl. - Google Patents

Circuito mosfet divisore di fase e convertitore di livello di segnali di entrata ttl.

Info

Publication number
IT7925328A0
IT7925328A0 IT7925328A IT2532879A IT7925328A0 IT 7925328 A0 IT7925328 A0 IT 7925328A0 IT 7925328 A IT7925328 A IT 7925328A IT 2532879 A IT2532879 A IT 2532879A IT 7925328 A0 IT7925328 A0 IT 7925328A0
Authority
IT
Italy
Prior art keywords
input signals
level converter
circuit phase
mosfet circuit
phase divider
Prior art date
Application number
IT7925328A
Other languages
English (en)
Other versions
IT1162577B (it
Inventor
Rainer Clemen
Gschwendtner Joerg
Werner Haug
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of IT7925328A0 publication Critical patent/IT7925328A0/it
Application granted granted Critical
Publication of IT1162577B publication Critical patent/IT1162577B/it

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits
    • H03K3/356017Bistable circuits using additional transistors in the input circuit
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408Address circuits
    • G11C11/4082Address Buffers; level conversion circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175Coupling arrangements; Interface arrangements
    • H03K19/0185Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507Interface arrangements
    • H03K19/01855Interface arrangements synchronous, i.e. using clock signals
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits
    • H03K3/356086Bistable circuits with additional means for controlling the main nodes

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Manipulation Of Pulses (AREA)
  • Static Random-Access Memory (AREA)
  • Electronic Switches (AREA)
IT25328/79A 1978-09-06 1979-08-29 Circuito mosfet divisore di fase e convertitore di livello di segnali di entrata ttl IT1162577B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19782838817 DE2838817A1 (de) 1978-09-06 1978-09-06 Ttl-kompatible adressverriegelungsschaltung mit feldeffekttransistoren und entsprechendes betriebsverfahren

Publications (2)

Publication Number Publication Date
IT7925328A0 true IT7925328A0 (it) 1979-08-29
IT1162577B IT1162577B (it) 1987-04-01

Family

ID=6048805

Family Applications (1)

Application Number Title Priority Date Filing Date
IT25328/79A IT1162577B (it) 1978-09-06 1979-08-29 Circuito mosfet divisore di fase e convertitore di livello di segnali di entrata ttl

Country Status (6)

Country Link
US (1) US4301381A (it)
EP (1) EP0009085B1 (it)
JP (1) JPS6028075B2 (it)
AT (1) ATE2366T1 (it)
DE (2) DE2838817A1 (it)
IT (1) IT1162577B (it)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56130885A (en) * 1980-03-18 1981-10-14 Fujitsu Ltd Address buffer circuit
JPS5769335U (it) * 1980-10-14 1982-04-26
US4496857A (en) * 1982-11-01 1985-01-29 International Business Machines Corporation High speed low power MOS buffer circuit for converting TTL logic signal levels to MOS logic signal levels
US4559608A (en) * 1983-01-21 1985-12-17 Harris Corporation Arithmetic logic unit
US4645954A (en) * 1985-10-21 1987-02-24 International Business Machines Corp. ECL to FET interface circuit for field effect transistor arrays
US5012246A (en) * 1990-01-31 1991-04-30 International Business Machines Corporation BiCMOS analog-to-digital converter with minimized metastability

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2420663B2 (de) * 1974-04-29 1977-02-10 Siemens AG, 1000 Berlin und 8000 München Regenerier- und bewerterschaltung und verfahren zu ihrer herstellung
US3969706A (en) * 1974-10-08 1976-07-13 Mostek Corporation Dynamic random access memory misfet integrated circuit
US4000413A (en) * 1975-05-27 1976-12-28 Intel Corporation Mos-ram
US4038567A (en) * 1976-03-22 1977-07-26 International Business Machines Corporation Memory input signal buffer circuit
JPS5914827B2 (ja) * 1976-08-23 1984-04-06 株式会社日立製作所 アドレス選択システム
JPS6012717B2 (ja) * 1976-09-10 1985-04-03 日本電気株式会社 絶縁ゲ−ト型電界効果トランジスタを用いた半導体回路

Also Published As

Publication number Publication date
ATE2366T1 (de) 1983-02-15
EP0009085B1 (de) 1983-01-26
JPS5538793A (en) 1980-03-18
JPS6028075B2 (ja) 1985-07-02
DE2838817A1 (de) 1980-03-20
EP0009085A1 (de) 1980-04-02
IT1162577B (it) 1987-04-01
DE2964606D1 (en) 1983-03-03
US4301381A (en) 1981-11-17

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