IT7928128A0 - Memoria perfezionata. - Google Patents

Memoria perfezionata.

Info

Publication number
IT7928128A0
IT7928128A0 IT7928128A IT2812879A IT7928128A0 IT 7928128 A0 IT7928128 A0 IT 7928128A0 IT 7928128 A IT7928128 A IT 7928128A IT 2812879 A IT2812879 A IT 2812879A IT 7928128 A0 IT7928128 A0 IT 7928128A0
Authority
IT
Italy
Prior art keywords
perfected
memory
perfected memory
Prior art date
Application number
IT7928128A
Other languages
English (en)
Other versions
IT1165432B (it
Inventor
Lee Hua-Tung
Original Assignee
Armonk New York U S A Internat
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Armonk New York U S A Internat filed Critical Armonk New York U S A Internat
Publication of IT7928128A0 publication Critical patent/IT7928128A0/it
Application granted granted Critical
Publication of IT1165432B publication Critical patent/IT1165432B/it

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C19/00Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/28Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
    • G11C19/287Organisation of a multiplicity of shift registers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/891Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D44/00, e.g. integration of charge-coupled devices [CCD] or charge injection devices [CID
IT28128/79A 1978-12-29 1979-12-18 Memoria perfezionata IT1165432B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/974,634 US4228526A (en) 1978-12-29 1978-12-29 Line-addressable serial-parallel-serial array

Publications (2)

Publication Number Publication Date
IT7928128A0 true IT7928128A0 (it) 1979-12-18
IT1165432B IT1165432B (it) 1987-04-22

Family

ID=25522282

Family Applications (1)

Application Number Title Priority Date Filing Date
IT28128/79A IT1165432B (it) 1978-12-29 1979-12-18 Memoria perfezionata

Country Status (5)

Country Link
US (1) US4228526A (it)
EP (1) EP0012840B1 (it)
JP (1) JPS5826117B2 (it)
DE (1) DE2964922D1 (it)
IT (1) IT1165432B (it)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL8104102A (nl) * 1981-09-04 1983-04-05 Philips Nv Ladingsgekoppelde inrichting.
US4720819A (en) * 1983-12-30 1988-01-19 Texas Instruments Incorporated Method and apparatus for clearing the memory of a video computer
JPS61227U (ja) * 1984-06-06 1986-01-06 富士電機株式会社 ブツシング変流器と導体との接続装置
JPH0770704B2 (ja) * 1989-05-25 1995-07-31 日本電気株式会社 電荷転送素子およびその駆動方法
US5519413A (en) * 1993-11-19 1996-05-21 Honeywell Inc. Method and apparatus for concurrently scanning and filling a memory
JP2020141029A (ja) * 2019-02-27 2020-09-03 株式会社東芝 固体撮像装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU461729B2 (en) * 1971-01-14 1975-06-05 Rca Corporation Charge coupled circuits
US3720922A (en) * 1971-03-17 1973-03-13 Rca Corp Charge coupled memory
US3967254A (en) * 1974-11-18 1976-06-29 Rca Corporation Charge transfer memory
US3944990A (en) * 1974-12-06 1976-03-16 Intel Corporation Semiconductor memory employing charge-coupled shift registers with multiplexed refresh amplifiers
US4024512A (en) * 1975-06-16 1977-05-17 Fairchild Camera And Instrument Corporation Line-addressable random-access memory
DE2620973A1 (de) * 1975-06-30 1977-01-27 Ibm Halbleiterschaltungsanordnung zur fet-substratvorspannungserzeugung
US4011548A (en) * 1975-07-02 1977-03-08 Burroughs Corporation Three phase charge-coupled device memory with inhibit lines
DE2543023C3 (de) * 1975-09-26 1981-07-09 Siemens AG, 1000 Berlin und 8000 München Speicheranordnung mit Bausteinen aus Ladungsverschiebespeichern
US4165541A (en) * 1977-12-12 1979-08-21 Fairchild Camera And Instrument Corporation Serial-parallel-serial charge-coupled device memory having interlacing and ripple clocking of the parallel shift registers
JPS54150945A (en) * 1978-05-18 1979-11-27 Matsushita Electric Ind Co Ltd Charge coupling element

Also Published As

Publication number Publication date
IT1165432B (it) 1987-04-22
JPS5826117B2 (ja) 1983-05-31
US4228526A (en) 1980-10-14
JPS5593590A (en) 1980-07-16
EP0012840B1 (de) 1983-02-23
EP0012840A2 (de) 1980-07-09
EP0012840A3 (en) 1980-09-17
DE2964922D1 (en) 1983-03-31

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