ITMI20001585A0 - Dispositivo circuitale per effettuare una decodifica gerarchica di riga in dispositivi di memoria non-volatile. - Google Patents

Dispositivo circuitale per effettuare una decodifica gerarchica di riga in dispositivi di memoria non-volatile.

Info

Publication number
ITMI20001585A0
ITMI20001585A0 IT2000MI001585A ITMI20001585A ITMI20001585A0 IT MI20001585 A0 ITMI20001585 A0 IT MI20001585A0 IT 2000MI001585 A IT2000MI001585 A IT 2000MI001585A IT MI20001585 A ITMI20001585 A IT MI20001585A IT MI20001585 A0 ITMI20001585 A0 IT MI20001585A0
Authority
IT
Italy
Prior art keywords
carrying
volatile memory
memory devices
circuit device
row decoding
Prior art date
Application number
IT2000MI001585A
Other languages
English (en)
Inventor
Osama Khouri
Guido Torelli
Rino Micheloni
Andrea Pierin
Stefano Gregori
Miriam Sangalli
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to IT2000MI001585A priority Critical patent/IT1318158B1/it
Publication of ITMI20001585A0 publication Critical patent/ITMI20001585A0/it
Priority to US09/905,163 priority patent/US6493268B1/en
Publication of ITMI20001585A1 publication Critical patent/ITMI20001585A1/it
Application granted granted Critical
Publication of IT1318158B1 publication Critical patent/IT1318158B1/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
IT2000MI001585A 2000-07-13 2000-07-13 Dispositivo circuitale per effettuare una decodifica gerarchica diriga in dispositivi di memoria non-volatile. IT1318158B1 (it)

Priority Applications (2)

Application Number Priority Date Filing Date Title
IT2000MI001585A IT1318158B1 (it) 2000-07-13 2000-07-13 Dispositivo circuitale per effettuare una decodifica gerarchica diriga in dispositivi di memoria non-volatile.
US09/905,163 US6493268B1 (en) 2000-07-13 2001-07-12 Circuit device for performing hierarchic row decoding in non-volatile memory devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT2000MI001585A IT1318158B1 (it) 2000-07-13 2000-07-13 Dispositivo circuitale per effettuare una decodifica gerarchica diriga in dispositivi di memoria non-volatile.

Publications (3)

Publication Number Publication Date
ITMI20001585A0 true ITMI20001585A0 (it) 2000-07-13
ITMI20001585A1 ITMI20001585A1 (it) 2002-01-13
IT1318158B1 IT1318158B1 (it) 2003-07-23

Family

ID=11445467

Family Applications (1)

Application Number Title Priority Date Filing Date
IT2000MI001585A IT1318158B1 (it) 2000-07-13 2000-07-13 Dispositivo circuitale per effettuare una decodifica gerarchica diriga in dispositivi di memoria non-volatile.

Country Status (2)

Country Link
US (1) US6493268B1 (it)
IT (1) IT1318158B1 (it)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7274618B2 (en) * 2005-06-24 2007-09-25 Monolithic System Technology, Inc. Word line driver for DRAM embedded in a logic process
US7499307B2 (en) * 2005-06-24 2009-03-03 Mosys, Inc. Scalable embedded DRAM array
US7626865B2 (en) 2006-06-13 2009-12-01 Micron Technology, Inc. Charge pump operation in a non-volatile memory device
KR100819099B1 (ko) * 2006-10-02 2008-04-03 삼성전자주식회사 가변저항 반도체 메모리 장치
US7668019B2 (en) * 2006-11-28 2010-02-23 Samsung Electronics Co., Ltd. Non-volatile memory device and erasing method thereof
CN101853700B (zh) * 2007-03-13 2014-11-05 考文森智财管理公司 或非快闪存储器及其字线驱动器电路
KR20090100110A (ko) * 2008-03-19 2009-09-23 삼성전자주식회사 저항체를 이용한 비휘발성 메모리 장치
US7952928B2 (en) * 2008-05-27 2011-05-31 Sandisk Il Ltd. Increasing read throughput in non-volatile memory

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3024687B2 (ja) 1990-06-05 2000-03-21 三菱電機株式会社 半導体記憶装置
JP2835215B2 (ja) 1991-07-25 1998-12-14 株式会社東芝 不揮発性半導体記憶装置
US5506816A (en) 1994-09-06 1996-04-09 Nvx Corporation Memory cell array having compact word line arrangement
EP0798735B1 (en) * 1996-03-29 2004-07-28 STMicroelectronics S.r.l. Row decoding circuit for a semiconductor non-volatile electrically programmable memory, and corresponding method
EP0822660A1 (en) 1996-07-31 1998-02-04 STMicroelectronics S.r.l. Low noise output buffer for semiconductor electronic circuits
JP3156618B2 (ja) 1997-01-30 2001-04-16 日本電気株式会社 不揮発性半導体記憶装置
JP2964982B2 (ja) 1997-04-01 1999-10-18 日本電気株式会社 不揮発性半導体記憶装置
JPH11354744A (ja) * 1998-06-09 1999-12-24 Matsushita Electric Ind Co Ltd 半導体メモリ装置
US6026047A (en) * 1998-11-03 2000-02-15 Samsung Electronics Co., Ltd. Integrated circuit memory device with hierarchical work line structure
JP3177966B2 (ja) * 1998-11-12 2001-06-18 日本電気株式会社 半導体記憶装置
US6088289A (en) * 1999-09-27 2000-07-11 Cypress Semiconductor Corp. Circuit and method for controlling a wordline and/or stabilizing a memory cell

Also Published As

Publication number Publication date
ITMI20001585A1 (it) 2002-01-13
IT1318158B1 (it) 2003-07-23
US6493268B1 (en) 2002-12-10

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