ITMI20121847A1 - Piastra a circuito stampato con ridotta emissione di radiazione elettro-magnetica - Google Patents

Piastra a circuito stampato con ridotta emissione di radiazione elettro-magnetica

Info

Publication number
ITMI20121847A1
ITMI20121847A1 IT001847A ITMI20121847A ITMI20121847A1 IT MI20121847 A1 ITMI20121847 A1 IT MI20121847A1 IT 001847 A IT001847 A IT 001847A IT MI20121847 A ITMI20121847 A IT MI20121847A IT MI20121847 A1 ITMI20121847 A1 IT MI20121847A1
Authority
IT
Italy
Prior art keywords
circuit plate
radiation emission
magnetic radiation
pressed circuit
reduced electro
Prior art date
Application number
IT001847A
Other languages
English (en)
Inventor
Piyush Bhatt
Gregory Edgington
Richard Moseley
Mario Rotigni
Original Assignee
Freescale Semiconductor Inc
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Freescale Semiconductor Inc, St Microelectronics Srl filed Critical Freescale Semiconductor Inc
Priority to IT001847A priority Critical patent/ITMI20121847A1/it
Priority to US14/050,872 priority patent/US9226386B2/en
Priority to EP13190224.9A priority patent/EP2728976B1/en
Priority to CN201310533924.3A priority patent/CN103796423B/zh
Priority to CN201320689311.4U priority patent/CN203661402U/zh
Publication of ITMI20121847A1 publication Critical patent/ITMI20121847A1/it

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
    • H05K1/0231—Capacitors or dielectric substances
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0254—High voltage adaptations; Electrical insulation details; Overvoltage or electrostatic discharge protection ; Arrangements for regulating voltages or for using plural voltages
    • H05K1/0262—Arrangements for regulating voltages or for using plural voltages
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298—Multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/0929—Conductive planes
    • H05K2201/09309—Core having two or more power planes; Capacitive laminate of two power planes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/0929—Conductive planes
    • H05K2201/09327—Special sequence of power, ground and signal layers in multilayer PCB
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/0929—Conductive planes
    • H05K2201/09336—Signal conductors in same plane as power plane
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/0929—Conductive planes
    • H05K2201/09345—Power and ground in the same plane; Power planes for two voltages in one plane

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)
IT001847A 2012-07-13 2012-10-30 Piastra a circuito stampato con ridotta emissione di radiazione elettro-magnetica ITMI20121847A1 (it)

Priority Applications (5)

Application Number Priority Date Filing Date Title
IT001847A ITMI20121847A1 (it) 2012-10-30 2012-10-30 Piastra a circuito stampato con ridotta emissione di radiazione elettro-magnetica
US14/050,872 US9226386B2 (en) 2012-07-13 2013-10-10 Printed circuit board with reduced emission of electro-magnetic radiation
EP13190224.9A EP2728976B1 (en) 2012-10-30 2013-10-25 Printed circuit board with reduced emission of electro-magnetic radiation
CN201310533924.3A CN103796423B (zh) 2012-10-30 2013-10-30 具有减少的电磁辐射的发射的印刷电路板
CN201320689311.4U CN203661402U (zh) 2012-10-30 2013-10-30 印刷电路板

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT001847A ITMI20121847A1 (it) 2012-10-30 2012-10-30 Piastra a circuito stampato con ridotta emissione di radiazione elettro-magnetica

Publications (1)

Publication Number Publication Date
ITMI20121847A1 true ITMI20121847A1 (it) 2014-05-01

Family

ID=47522785

Family Applications (1)

Application Number Title Priority Date Filing Date
IT001847A ITMI20121847A1 (it) 2012-07-13 2012-10-30 Piastra a circuito stampato con ridotta emissione di radiazione elettro-magnetica

Country Status (3)

Country Link
EP (1) EP2728976B1 (it)
CN (2) CN203661402U (it)
IT (1) ITMI20121847A1 (it)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ITMI20121847A1 (it) * 2012-10-30 2014-05-01 Freescale Semiconductor Inc Piastra a circuito stampato con ridotta emissione di radiazione elettro-magnetica
CN105208844A (zh) * 2015-09-24 2015-12-30 浪潮电子信息产业股份有限公司 一种屏蔽pcb板高速信号干扰的方法
CN107367648B (zh) * 2017-06-23 2023-07-04 中国电子科技集团公司第十三研究所 微波单片电路抗扰度测试夹具
JP7226899B2 (ja) * 2018-04-27 2023-02-21 ラピスセミコンダクタ株式会社 電子機器及び配線基板
CN115209613A (zh) * 2022-07-27 2022-10-18 摩尔线程智能科技(北京)有限责任公司 印刷电路板和包括印刷电路板的电子设备
US12402251B2 (en) * 2022-09-21 2025-08-26 Hewlett Packard Enterprise Development Lp Power via resonance suppression

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001058224A1 (en) * 2000-01-26 2001-08-09 The Industree B.V. Printed circuit board
US20030224546A1 (en) * 2002-05-30 2003-12-04 Chen Wenjun W. Method and apparatus for reducing noise in electrical power supplied to a semiconductor
US20050108671A1 (en) * 2003-11-13 2005-05-19 International Business Machines Corporation Method, apparatus and computer program product for implementing enhanced high frequency return current paths utilizing decoupling capacitors in a package design
US7047515B1 (en) * 2003-04-04 2006-05-16 Extreme Networks Method for selecting and placing bypass capacitors on multi-layer printed circuit boards
EP2466999A1 (en) * 2010-12-17 2012-06-20 Canon Kabushiki Kaisha Printed circuit board

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5354949B2 (ja) * 2007-06-19 2013-11-27 キヤノン株式会社 プリント回路板
ITMI20121847A1 (it) * 2012-10-30 2014-05-01 Freescale Semiconductor Inc Piastra a circuito stampato con ridotta emissione di radiazione elettro-magnetica

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001058224A1 (en) * 2000-01-26 2001-08-09 The Industree B.V. Printed circuit board
US20030224546A1 (en) * 2002-05-30 2003-12-04 Chen Wenjun W. Method and apparatus for reducing noise in electrical power supplied to a semiconductor
US7047515B1 (en) * 2003-04-04 2006-05-16 Extreme Networks Method for selecting and placing bypass capacitors on multi-layer printed circuit boards
US20050108671A1 (en) * 2003-11-13 2005-05-19 International Business Machines Corporation Method, apparatus and computer program product for implementing enhanced high frequency return current paths utilizing decoupling capacitors in a package design
EP2466999A1 (en) * 2010-12-17 2012-06-20 Canon Kabushiki Kaisha Printed circuit board

Also Published As

Publication number Publication date
CN103796423B (zh) 2018-08-24
EP2728976B1 (en) 2022-02-09
CN103796423A (zh) 2014-05-14
EP2728976A1 (en) 2014-05-07
CN203661402U (zh) 2014-06-18

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