ITRM20010522A1 - Sequenziale di "power-on-reset" condizionato e robusto a potenza ultrabassa per circuiti integrati. - Google Patents

Sequenziale di "power-on-reset" condizionato e robusto a potenza ultrabassa per circuiti integrati.

Info

Publication number
ITRM20010522A1
ITRM20010522A1 IT2001RM000522A ITRM20010522A ITRM20010522A1 IT RM20010522 A1 ITRM20010522 A1 IT RM20010522A1 IT 2001RM000522 A IT2001RM000522 A IT 2001RM000522A IT RM20010522 A ITRM20010522 A IT RM20010522A IT RM20010522 A1 ITRM20010522 A1 IT RM20010522A1
Authority
IT
Italy
Prior art keywords
power
sturdy
conditioned
sequential
ultra
Prior art date
Application number
IT2001RM000522A
Other languages
English (en)
Inventor
Giulio G Marotta
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Priority to IT2001RM000522A priority Critical patent/ITRM20010522A1/it
Publication of ITRM20010522A0 publication Critical patent/ITRM20010522A0/it
Priority to US10/229,920 priority patent/US6924676B2/en
Publication of ITRM20010522A1 publication Critical patent/ITRM20010522A1/it
Priority to US11/157,267 priority patent/US7034587B2/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/22—Modifications for ensuring a predetermined initial state when the supply voltage has been applied
    • H03K17/223—Modifications for ensuring a predetermined initial state when the supply voltage has been applied in field-effect transistor switches
IT2001RM000522A 2001-08-30 2001-08-30 Sequenziale di "power-on-reset" condizionato e robusto a potenza ultrabassa per circuiti integrati. ITRM20010522A1 (it)

Priority Applications (3)

Application Number Priority Date Filing Date Title
IT2001RM000522A ITRM20010522A1 (it) 2001-08-30 2001-08-30 Sequenziale di "power-on-reset" condizionato e robusto a potenza ultrabassa per circuiti integrati.
US10/229,920 US6924676B2 (en) 2001-08-30 2002-08-28 Conditioned and robust ultra-low power power-on reset sequencer for integrated circuits
US11/157,267 US7034587B2 (en) 2001-08-30 2005-06-21 Conditioned and robust ultra-low power power-on reset sequencer for integrated circuits

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT2001RM000522A ITRM20010522A1 (it) 2001-08-30 2001-08-30 Sequenziale di "power-on-reset" condizionato e robusto a potenza ultrabassa per circuiti integrati.

Publications (2)

Publication Number Publication Date
ITRM20010522A0 ITRM20010522A0 (it) 2001-08-30
ITRM20010522A1 true ITRM20010522A1 (it) 2003-02-28

Family

ID=11455752

Family Applications (1)

Application Number Title Priority Date Filing Date
IT2001RM000522A ITRM20010522A1 (it) 2001-08-30 2001-08-30 Sequenziale di "power-on-reset" condizionato e robusto a potenza ultrabassa per circuiti integrati.

Country Status (2)

Country Link
US (2) US6924676B2 (it)
IT (1) ITRM20010522A1 (it)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8103805B2 (en) * 2005-04-29 2012-01-24 Micron Technology, Inc. Configuration finalization on first valid NAND command
US7602222B2 (en) * 2005-09-30 2009-10-13 Mosaid Technologies Incorporated Power up circuit with low power sleep mode operation
JP5238943B2 (ja) * 2006-11-14 2013-07-17 セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー 高電圧回路のリセット回路
CN101291108B (zh) * 2007-04-19 2010-11-17 立锜科技股份有限公司 电荷泵启动电路与方法
US7489182B2 (en) * 2007-05-17 2009-02-10 Richtek Technology Corporation Charge pump start up circuit and method thereof
US7564279B2 (en) * 2007-10-18 2009-07-21 Micron Technology, Inc. Power on reset circuitry in electronic systems
US7919999B2 (en) * 2007-10-18 2011-04-05 Micron Technology, Inc. Band-gap reference voltage detection circuit
US9015460B2 (en) 2012-07-30 2015-04-21 Oracle International Corporation Hybrid hardwired/programmable reset sequence controller
US8981833B2 (en) * 2012-11-01 2015-03-17 Dust Networks, Inc Methods and circuits for providing stable current and voltage references based on currents flowing through ultra-thin dielectric layer components
TWI531949B (zh) * 2014-06-26 2016-05-01 矽創電子股份有限公司 電容電壓資訊感測電路及其相關抗雜訊觸控電路
TWI667881B (zh) * 2019-02-12 2019-08-01 新唐科技股份有限公司 上電清除電路

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS601980B2 (ja) 1979-05-23 1985-01-18 富士通株式会社 自動リセット回路
US4428022A (en) 1980-04-15 1984-01-24 Westinghouse Electric Corp. Circuit interrupter with digital trip unit and automatic reset
US4539489A (en) * 1983-06-22 1985-09-03 Motorola, Inc. CMOS Schmitt trigger circuit
US4885476A (en) 1989-03-06 1989-12-05 Motorola, Inc. Power-on reset circuit
US5180926A (en) * 1991-11-26 1993-01-19 Sequoia Semiconductor, Inc. Power-on reset architecture
FR2699755B1 (fr) * 1992-12-22 1995-03-10 Sgs Thomson Microelectronics Circuit de démarrage et de sécurité contre les coupures d'alimentation, pour circuit intégré.
US5801561A (en) 1995-05-01 1998-09-01 Intel Corporation Power-on initializing circuit
KR0153603B1 (ko) 1995-05-16 1998-12-15 김광호 반도체 장치의 파워-업 리세트신호 발생회로
US5602502A (en) * 1995-09-29 1997-02-11 Intel Corporation Circuit for detecting when a supply output voltage exceeds a predetermined level
US5686847A (en) * 1996-03-15 1997-11-11 Rockwell International Corporation Reduced sensitivity power-on reset circuitry
JP3520662B2 (ja) * 1996-04-09 2004-04-19 日産自動車株式会社 電子コントロールユニットの監視装置
JPH1186525A (ja) * 1997-09-09 1999-03-30 Mitsubishi Electric Corp パワーオンリセット回路
US6078201A (en) 1998-01-06 2000-06-20 Xilinx, Inc. Power-on reset circuit for dual supply voltages
US6204703B1 (en) * 1998-12-21 2001-03-20 Samsung Electronics Co., Ltd. Power on reset circuit with power noise immunity
US6077717A (en) * 1999-01-26 2000-06-20 Hewlett-Packard Company System and method for detecting NOR gates and NAND gates
JP3429213B2 (ja) 1999-02-26 2003-07-22 シャープ株式会社 集積回路
US6259286B1 (en) 1999-10-15 2001-07-10 Triscend Corporation Method and apparatus for a power-on-reset system
JP3987674B2 (ja) 2000-06-01 2007-10-10 富士通株式会社 半導体集積回路
JP2002042459A (ja) * 2000-07-26 2002-02-08 Mitsubishi Electric Corp 半導体集積回路装置
JP3904859B2 (ja) 2001-07-30 2007-04-11 シャープ株式会社 パワーオンリセット回路およびこれを備えたｉｃカード

Also Published As

Publication number Publication date
US7034587B2 (en) 2006-04-25
ITRM20010522A0 (it) 2001-08-30
US20050231245A1 (en) 2005-10-20
US6924676B2 (en) 2005-08-02
US20030058011A1 (en) 2003-03-27

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