ITRM20040445A1 - Processo per scavare trincee in un dispositivo ottico integrato. - Google Patents

Processo per scavare trincee in un dispositivo ottico integrato.

Info

Publication number
ITRM20040445A1
ITRM20040445A1 IT000445A ITRM20040445A ITRM20040445A1 IT RM20040445 A1 ITRM20040445 A1 IT RM20040445A1 IT 000445 A IT000445 A IT 000445A IT RM20040445 A ITRM20040445 A IT RM20040445A IT RM20040445 A1 ITRM20040445 A1 IT RM20040445A1
Authority
IT
Italy
Prior art keywords
excavating
trench
optical device
integrated optical
integrated
Prior art date
Application number
IT000445A
Other languages
English (en)
Inventor
Ilaria Gelmi
Giovanni Germani
Pietro Montanini
Marta Mottura
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to IT000445A priority Critical patent/ITRM20040445A1/it
Publication of ITRM20040445A1 publication Critical patent/ITRM20040445A1/it
Priority to US11/230,292 priority patent/US20060068554A1/en
Priority to US13/481,680 priority patent/US8486741B2/en

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/73Etching of wafers, substrates or parts of devices using masks for insulating materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/20Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/40Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
    • H10P76/405Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their composition, e.g. multilayer masks
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/40Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
    • H10P76/408Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes
IT000445A 2004-09-17 2004-09-17 Processo per scavare trincee in un dispositivo ottico integrato. ITRM20040445A1 (it)

Priority Applications (3)

Application Number Priority Date Filing Date Title
IT000445A ITRM20040445A1 (it) 2004-09-17 2004-09-17 Processo per scavare trincee in un dispositivo ottico integrato.
US11/230,292 US20060068554A1 (en) 2004-09-17 2005-09-19 Process for etching trenches in an integrated optical device
US13/481,680 US8486741B2 (en) 2004-09-17 2012-05-25 Process for etching trenches in an integrated optical device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT000445A ITRM20040445A1 (it) 2004-09-17 2004-09-17 Processo per scavare trincee in un dispositivo ottico integrato.

Publications (1)

Publication Number Publication Date
ITRM20040445A1 true ITRM20040445A1 (it) 2004-12-17

Family

ID=36099758

Family Applications (1)

Application Number Title Priority Date Filing Date
IT000445A ITRM20040445A1 (it) 2004-09-17 2004-09-17 Processo per scavare trincee in un dispositivo ottico integrato.

Country Status (2)

Country Link
US (2) US20060068554A1 (it)
IT (1) ITRM20040445A1 (it)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11901190B2 (en) * 2017-11-30 2024-02-13 Taiwan Semiconductor Manufacturing Company, Ltd. Method of patterning

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2610140B1 (fr) * 1987-01-26 1990-04-20 Commissariat Energie Atomique Circuit integre cmos et procede de fabrication de ses zones d'isolation electrique
FR2660440B1 (fr) * 1990-04-03 1992-10-16 Commissariat Energie Atomique Composant optique integre protege contre l'environnement et son procede de fabrication.
US5163220A (en) * 1991-10-09 1992-11-17 The Unites States Of America As Represented By The Secretary Of The Army Method of enhancing the electrical conductivity of indium-tin-oxide electrode stripes
DE69511810T2 (de) * 1994-09-28 2000-05-18 Nippon Telegraph And Telephone Corp., Tokio/Tokyo Optische Halbleitervorrichtung und Herstellungsverfahren
US5895255A (en) * 1994-11-30 1999-04-20 Kabushiki Kaisha Toshiba Shallow trench isolation formation with deep trench cap
US5682455A (en) * 1996-02-29 1997-10-28 Northern Telecom Limited Semiconductor optical waveguide
US5741741A (en) * 1996-05-23 1998-04-21 Vanguard International Semiconductor Corporation Method for making planar metal interconnections and metal plugs on semiconductor substrates
US6309918B1 (en) * 1998-09-21 2001-10-30 Motorola, Inc. Manufacturable GaAs VFET process
EP1368680A2 (en) * 2000-10-13 2003-12-10 Massachusetts Institute Of Technology Optical waveguides with trench structures
US6766082B2 (en) * 2000-10-18 2004-07-20 Nippon Telegraph And Telephone Corporation Waveguide-type optical device and manufacturing method therefor
KR100427582B1 (ko) * 2002-08-08 2004-04-28 한국전자통신연구원 광도파로 플랫폼 및 그 제조 방법
US7099360B2 (en) * 2003-02-03 2006-08-29 Intel Corporation Method and apparatus to generate and monitor optical signals and control power levels thereof in a planar lightwave circuit
US6920257B1 (en) * 2003-03-24 2005-07-19 Inplane Photonics, Inc. Resonator cavity for optical isolation
AT502514B1 (de) * 2005-10-13 2007-04-15 Winter Udo Mag Unterkalibriges geschoss

Also Published As

Publication number Publication date
US20120228260A1 (en) 2012-09-13
US8486741B2 (en) 2013-07-16
US20060068554A1 (en) 2006-03-30

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