ITUA20162049A1 - Dispositivo elettronico con isolamento galvanico integrato e metodo di fabbricazione dello stesso - Google Patents

Dispositivo elettronico con isolamento galvanico integrato e metodo di fabbricazione dello stesso

Info

Publication number
ITUA20162049A1
ITUA20162049A1 ITUA2016A002049A ITUA20162049A ITUA20162049A1 IT UA20162049 A1 ITUA20162049 A1 IT UA20162049A1 IT UA2016A002049 A ITUA2016A002049 A IT UA2016A002049A IT UA20162049 A ITUA20162049 A IT UA20162049A IT UA20162049 A1 ITUA20162049 A1 IT UA20162049A1
Authority
IT
Italy
Prior art keywords
manufacture
electronic device
same
galvanic insulation
integrated galvanic
Prior art date
Application number
ITUA2016A002049A
Other languages
English (en)
Inventor
Vincenzo Palumbo
Elisabetta Pizzi
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to ITUA2016A002049A priority Critical patent/ITUA20162049A1/it
Priority to US15/279,050 priority patent/US9935098B2/en
Publication of ITUA20162049A1 publication Critical patent/ITUA20162049A1/it
Priority to US15/900,041 priority patent/US10199370B2/en

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/911—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using passive elements as protective elements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/026—Arrangements for coupling transmitters, receivers or transceivers to transmission lines; Line drivers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/692—Electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/42—Vias, e.g. via plugs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/435—Cross-sectional shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/495—Capacitive arrangements or effects of, or between wiring layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/495—Capacitive arrangements or effects of, or between wiring layers
    • H10W20/496—Capacitor integral with wiring layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/497—Inductive arrangements or effects of, or between, wiring layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07541—Controlling the environment, e.g. atmosphere composition or temperature
    • H10W72/07554—Controlling the environment, e.g. atmosphere composition or temperature changes in dispositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/547—Dispositions of multiple bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/944—Dispositions of multiple bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/981—Auxiliary members, e.g. spacers
    • H10W72/983—Reinforcing structures, e.g. collars

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Semiconductor Integrated Circuits (AREA)
ITUA2016A002049A 2016-03-25 2016-03-25 Dispositivo elettronico con isolamento galvanico integrato e metodo di fabbricazione dello stesso ITUA20162049A1 (it)

Priority Applications (3)

Application Number Priority Date Filing Date Title
ITUA2016A002049A ITUA20162049A1 (it) 2016-03-25 2016-03-25 Dispositivo elettronico con isolamento galvanico integrato e metodo di fabbricazione dello stesso
US15/279,050 US9935098B2 (en) 2016-03-25 2016-09-28 Electronic device with integrated galvanic isolation, and manufacturing method of the same
US15/900,041 US10199370B2 (en) 2016-03-25 2018-02-20 Electronic device with integrated galvanic isolation, and manufacturing method of the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ITUA2016A002049A ITUA20162049A1 (it) 2016-03-25 2016-03-25 Dispositivo elettronico con isolamento galvanico integrato e metodo di fabbricazione dello stesso

Publications (1)

Publication Number Publication Date
ITUA20162049A1 true ITUA20162049A1 (it) 2017-09-25

Family

ID=56235913

Family Applications (1)

Application Number Title Priority Date Filing Date
ITUA2016A002049A ITUA20162049A1 (it) 2016-03-25 2016-03-25 Dispositivo elettronico con isolamento galvanico integrato e metodo di fabbricazione dello stesso

Country Status (2)

Country Link
US (2) US9935098B2 (it)
IT (1) ITUA20162049A1 (it)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019058922A1 (ja) * 2017-09-19 2019-03-28 株式会社村田製作所 キャパシタ
DE102019103730B4 (de) * 2019-02-14 2021-02-04 Infineon Technologies Austria Ag Schaltungsanordnung mit galvanischer isolation zwischen elektronischen schaltungen
JP7170685B2 (ja) 2020-03-19 2022-11-14 株式会社東芝 アイソレータ
JP7284121B2 (ja) * 2020-03-23 2023-05-30 株式会社東芝 アイソレータ
JP2021153239A (ja) * 2020-03-24 2021-09-30 株式会社東芝 アイソレータ
JP2022144836A (ja) * 2021-03-19 2022-10-03 株式会社東芝 アイソレータ
IT202100014180A1 (it) * 2021-05-31 2022-12-01 St Microelectronics Srl Circuito elettronico integrato includente una piastra di campo per la riduzione locale del campo elettrico e relativo processo di fabbricazione
US11735583B2 (en) 2021-09-07 2023-08-22 Nxp B.V. Integrated isolator incorporating trench capacitor
US20230411060A1 (en) * 2022-06-20 2023-12-21 Infineon Technologies Austria Ag Inductive coupler with magnetic material
US12463153B2 (en) * 2022-09-30 2025-11-04 Texas Instruments Incorporated Single die reinforced galvanic isolation device
CN119856277A (zh) * 2022-09-30 2025-04-18 德州仪器公司 具有剪切焊盘的微装置

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080290444A1 (en) * 2007-05-24 2008-11-27 Philip John Crawley Capacitor structure in a semiconductor device
US20110176339A1 (en) * 2010-01-18 2011-07-21 Martin Kerber Signal Transmission Arrangement
US20130280879A1 (en) * 2012-04-20 2013-10-24 Infineon Technologies Austria Ag Method for Producing a Conductor Line
US20130277797A1 (en) * 2012-04-20 2013-10-24 Infineon Technologies Ag Coil and Method of Manufacturing a Coil
US20130278372A1 (en) * 2012-04-20 2013-10-24 Infineon Technologies Austria Ag Semiconductor Component with Coreless Transformer
EP2658126A1 (en) * 2012-04-24 2013-10-30 Nxp B.V. Interface for communication between voltage domains
EP2775522A1 (en) * 2013-03-07 2014-09-10 Analog Devices Technology An insulating structure, a method of forming an insulating structure, and a chip scale isolator including such an insulating structure

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080290444A1 (en) * 2007-05-24 2008-11-27 Philip John Crawley Capacitor structure in a semiconductor device
US20110176339A1 (en) * 2010-01-18 2011-07-21 Martin Kerber Signal Transmission Arrangement
US20130280879A1 (en) * 2012-04-20 2013-10-24 Infineon Technologies Austria Ag Method for Producing a Conductor Line
US20130277797A1 (en) * 2012-04-20 2013-10-24 Infineon Technologies Ag Coil and Method of Manufacturing a Coil
US20130278372A1 (en) * 2012-04-20 2013-10-24 Infineon Technologies Austria Ag Semiconductor Component with Coreless Transformer
EP2658126A1 (en) * 2012-04-24 2013-10-30 Nxp B.V. Interface for communication between voltage domains
EP2775522A1 (en) * 2013-03-07 2014-09-10 Analog Devices Technology An insulating structure, a method of forming an insulating structure, and a chip scale isolator including such an insulating structure

Also Published As

Publication number Publication date
US20170278841A1 (en) 2017-09-28
US20180190646A1 (en) 2018-07-05
US9935098B2 (en) 2018-04-03
US10199370B2 (en) 2019-02-05

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