JP2000201126A - Multiplexed audio data decoding device and receiving device - Google Patents

Abstract

(57) [Summary] [Problem] To provide a multiplexed audio data decoding device that is easy to integrate an audio decoder and has high flexibility even when the number of formats to be processed increases or when specifications are changed. It is in. An external ROM stores a plurality of decode processing codes respectively corresponding to a plurality of compression coding schemes. When there is a change in the compression coding method due to the change in the designation of the data series by the user, the control means 50 transfers the decoding processing code corresponding to the changed compression coding method from the external ROM 60 to the internal RAM 25. DSP2
2 starts the decoding process using the decoding process code transferred to the internal RAM 25.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multiplexed audio data decoding apparatus for decoding a voice / sound (audio) signal encoded in a compression format, and more particularly, to the reception of digital broadcasting in which multiple channels are multiplexed. The present invention relates to a multiplexed audio data decoding device and a receiving device suitable for use as a device.

[0002]

2. Description of the Related Art As a standard compression method for digital audio signals, MPEG (Moving P
audio Experts Group) Audio, ATSC (Un
ited States Advanced Television Systems Committe
A method called AC-3 adopted in e) is known. In each of these methods, information on the time axis is converted into data on the frequency axis and divided into frequency bands to use psychoacoustic characteristics such as masking effects, or to compress information using correlation between audio channels. To be based on technology.

As a method of decoding (decoding) an audio bit stream compressed using these methods, a method based on a DSP (Digital Signal Processor) is used, for example, as an audio decoder compatible with the AC-3 format. ”DesignAnd Implementation of AC
-3 Coders, Vol. 41, No. 3, August 1995 ”. DSPs, like general microcontrollers, are designed to interpret software program codes sequentially, process data in internal registers, and store the results in memory. Compared to the realization format, it is possible to have decoding algorithms of a plurality of formats as decoding processing codes, and it has flexibility in changing, so that it is considered to be advantageous in both cost and usability. It is characterized in that the calculation speed is improved by devising, for example, a dedicated hardware such as a multiplier and a plurality of data buses to make the data flow smooth.

[0004]

Generally, in an audio decoder based on a DSP, a decoding procedure is stored in a built-in ROM as a program code. This is because the program code is read-only and must be directly connected to the DSP in order to avoid a loss in an access cycle (a normal DSP is one instruction per cycle).

On the other hand, when the audio decoder is considered as a part of the digital broadcast receiver, the compression rate and the sound quality may be reduced depending on the contents of the service and communication path conditions on the service supply side such as a broadcasting satellite, a communication satellite, a terrestrial wave, and a cable. Since the conditions are various and the optimum encoding format is selected for each, it is necessary to correspond to a plurality of formats on the receiving side.

Here, in order to make a single DSP chip correspond to a plurality of types of compression encoding formats, it is necessary to secure a program code as a built-in ROM for each format. Further, not only the program code but also a constant table dedicated for each format is required as a built-in ROM. Therefore, there is a problem that it is difficult to integrate an audio decoder including a DSP in terms of a circuit scale. Further, when the number of formats to be processed is increased or when the specification is changed, the built-in ROM of the audio decoder cannot be easily changed, so that there is a problem that flexibility is reduced.

An object of the present invention is to provide a multiplexed audio data decoding device and a receiving device which can easily integrate an audio decoder and have high flexibility even when the number of formats to be processed is increased or specifications are changed. To provide.

[0008]

(1) In order to achieve the above object, according to the present invention, a compression-encoded audio data sequence is packetized, and a packet group formed by multiplexing a plurality of sequences is input. In a multiplexed audio data decoding device for selecting and decoding one audio data sequence specified by a user, one audio data sequence specified by the user is extracted from the packet group by using attribute information of each packet, Further, a demultiplexer for extracting a compression coding scheme used for compressing the audio data series from header information of the audio data series, and a decoding processing code corresponding to the extracted compression coding scheme. A digital signal processor for sequentially decoding and converting to a sequence of audio signal samples; A first memory for storing the decoding processing codes, a read-only memory for storing a plurality of decoding processing codes respectively corresponding to the plurality of compression encoding schemes, and a compression encoding scheme for changing the designation of the data series by the user. Control means for detecting a change or a change in the compression coding method within the same data series, and transferring a decoding processing code corresponding to the changed compression coding method from the read-only memory to the first memory. The digital signal processor starts a decoding process using the decoding process code transferred to the first memory.

With this configuration, since a plurality of types of decode processing codes are stored in the read-only memory,
Even when the number of formats to be processed increases or when specifications are changed, the read-only memory can be easily changed and the flexibility can be improved by changing the read-only memory.

(2) In order to achieve the above object, according to the present invention, a compression-encoded video data sequence and an accompanying audio data sequence are packetized, and a packet group formed by multiplexing a plurality of sequences is provided. A multiplexed audio data decoding apparatus for inputting and selecting a set of video data sequences specified by a user and an associated audio data sequence, and decoding the audio data sequence. A demultiplexer that extracts one audio data sequence specified by the user, and further extracts, from header information included in the audio data sequence, a compression encoding method used to compress the audio data sequence. According to the decoding processing code corresponding to the compression coding method A digital signal processor for decoding and converting to a sequence of audio signal samples, a first memory for storing the decode processing code, and a read-only memory for storing a plurality of decode processing codes respectively corresponding to a plurality of compression coding schemes; A video decoder for decoding the compression-encoded video data sequence, a second memory used as a work area for decoding processing by the digital signal processor and the video decoder, and a read-only memory in the second memory. The plurality of decoding processing codes are transferred in advance from the memory, and a change in the compression coding method accompanying a change in the designation of the data sequence by the user or a change in the compression coding method within the same data sequence is detected. Deco corresponding to the compression encoding method after the change from the memory to the first memory And control means for transferring the de processing code, the digital signal processor uses the decoding process code transferred to the first memory, in which so as to start the decoding process.

With this configuration, since a plurality of types of decode processing codes are stored in the read-only memory,
Even when the number of formats to be processed increases or when specifications are changed, the read-only memory can be easily changed and the flexibility can be improved by changing the read-only memory.

(3) In the above (1) or (2), preferably, a decode processing code corresponding to the changed compression coding system is transferred from the read-only memory to the first memory or the second memory. After that, the digital signal processor performs a process of determining the presence or absence of a transfer error.

(4) In the above (3), preferably,
The process of determining the presence or absence of a transfer error performed by the digital signal processor is performed by decoding a specific audio data sequence into a decode processing code and comparing it with a corresponding expected value.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The configuration and operation of a multiplexed audio data decoding device according to an embodiment of the present invention will be described below with reference to FIGS.

First, the overall configuration of the multiplexed audio data decoding device according to the present embodiment will be described with reference to FIG.

The multiplexed audio data decoding apparatus according to this embodiment includes a demultiplexer 10, an audio decoder 20, and a digital / analog converter (DAC) 3.
0, a user interface (I / F) 40, an external CPU 50, and an external ROM 60.
A demultiplexer 10, an audio decoder 20,
User interface (I / F) 40 and external CPU
The external ROM 60 and the external ROM 60 are connected by a data bus DB, and can input and output commands and data.

The demultiplexer 10 extracts data corresponding to a program specified by a user from an MPEG transport stream (TS) in which a plurality of programs (programs) are multiplexed, and outputs the data to an audio decoder 20.

Here, the hierarchical structure of the MPEG transport stream (TS) will be described with reference to FIG. Here, audio data will be described as an example.

FIG. 2A shows an MPEG TS which is an input to the demultiplexer 10, and is composed of a TS packet having a fixed length of 188 bytes.

As shown in FIG. 2B, the TS packet has a packet ID (PID) as a header and a TS_h
And a payload, which is a data portion.
The PID is uniquely determined by selecting the program number and the contents of the data. Therefore, for example, by designating the audio data of the program #j from the external CPU 50 to the demultiplexer 10, the demultiplexer 10 can extract only the TS packet corresponding to the audio data and make it the processing target.

Data part (payload) of TS packet
Is a PES (Packetized Elementary) shown in FIG.
Stream) packet. In other words, multiple T
The payload of the S packet is collected to form a PES packet.

As shown in FIG. 2D, the PES packet includes a PES header and a payload as a data portion. The PES header (PES_h) includes a stream ID and a display time stamp (PTS: Presentati
on Time Stamp) and PES_h. The stream ID is a description related to the content of the PES, and in the case of audio, the encoding format corresponds to the stream ID. The PES can have a plurality of audio access units in the payload, and the PTS indicates the time at which the first audio access unit after the header should be displayed. The payload includes an audio access unit, which is a data part.

The audio access unit is shown in FIG.
As shown in (e), it is composed of an audio header (Audio_h) including various parameters, and encoded audio data for one audio frame which is a data portion. The parameters of the header include a sampling frequency, a bit rate, a frame length, and the like. A series of audio access units is an audio elementary stream (ES). The output of the demultiplexer 10 is an audio elementary stream (ES) which is a continuation of the audio access unit shown in FIG.

Next, returning to FIG.
0 will be described.

The audio decoder 20 includes a frame synchronization circuit 21 and a digital signal processor (DSP)
22 and PCM output interface (I / F) circuit 2
3, an interface (I / F) circuit 24, and a built-in R
AM25.

From the audio elementary stream (ES) input from the demultiplexer 10, the frame synchronization circuit 21 separates an audio access unit serving as a processing unit, that is, converts an audio frame composed of a predetermined number of encoded samples. Separate data,
It is determined from a bit pattern that appears periodically.

The DSP 22 appropriately extracts necessary data from the header information of the audio access unit and decodes the encoded data. Decoding process is in built-in RAM 25
In accordance with the decoding program code written in advance in the internal RAM 25, the internal RAM 25 is used while storing intermediate data or using it as a buffer for input / output data.

A plurality of types of decoding processing program codes are written in the built-in RAM 25 in advance. The writing of the decoding processing program codes is performed by the external CPU 50 through the interface (I / F) 24.

The result decoded by the DSP 22 is PCM (Pulse Code Modulation) audio data, which is sent from the PCM output interface circuit 23 to the digital / analog converter (DAC) 30 as time-series sample data, and converted as an analog audio signal. Is output.

The external CPU 50 controls the audio decoder 2
The system control of the multiplexed audio data decoding device including 0 and the demultiplexer 10 is performed. The control procedure is stored in a CPU instruction code area 60 </ b> A in the external ROM 60.

The external ROM 60 stores a plurality of decode processing codes # 1, # 2, in addition to the CPU instruction code area 60A.
,..., #N
, 60BN.

User interface (I / F) circuit 40
Receives a command for program change or media change based on the user's channel change, and sends the command to the external CPU 50. When detecting the change of the encoding format, the external CPU 10
.., #N stored in B1, 60B2,..., 60BN are transferred to the internal RAM 52 in the audio decoder 20.

The transfer process is performed by an interface (I / F)
24, buffering and address translation are also performed.

Here, the memory arrangement of the internal RAM circuit 25 used in the multiplexed audio data decoding device according to the present embodiment will be described with reference to FIG. FIG.
The area division in the AM 25 is schematically shown.

The internal RAM circuit 25 includes a decode processing code area 25a, a work area 25b, a register area, etc.
c. The decode processing code areas 60B1, 60B2,..., 60 of the external ROM 60 shown in FIG.
Decoding processing codes # 1, # 2 stored in the BN
, #N, the decoded processing code transferred by the external CPU 50 is the decoded processing code area 25a.
Is stored in Work area 25b and register area 2
An area 5c is used when the DSP 22 performs a decoding process. The boundaries between the areas 25a, 25b, and 25c are variable depending on the encoding format. For example, when the processing code has a short format, the work area 25b can be set wider.

The DSP 22 performs an error check on the transferred data, and performs a decoding process on the arriving audio ES using the decoding process code stored in the decoding process code area 25a of the internal RAM 25.

Next, a program switching process in the multiplexed audio data decoding apparatus according to the present embodiment will be described with reference to FIGS.

FIG. 4 shows the program switching process according to the present embodiment mainly as an algorithm, and FIG. 5 shows the program switching process according to the present embodiment mainly as a signal exchange between constituent blocks. 4 and 5
, The same reference numerals indicate the same processing steps.

In step S1, a program switching process is started. For example, when the user switches the program using a remote controller or the like, the program switching command is:
Via the user I / F 40 shown in FIG.
0, and the external CPU 50 starts the program switching process. In the following description, it is assumed that the user has selected the program #k.

Next, in step S2, the external CPU
50 sends the packet ID (PID) of the program map table (PMT) corresponding to the program number #k to the demultiplexer 10. The PMT is stored in the demultiplexer 10.

Next, in step S3, the demultiplexer 10 filters the PID of the desired (audio in this example) packet. Here, the obtained PM
In T, a PID of a transport stream (TS) packet including video, audio and accompanying data belonging to the program number #k is written together with its attribute, and the demultiplexer 10 filters this PID.

Next, in step S4, the demultiplexer 10 extracts a reference time from a packet carrying a PCR (Program Clock Reference) indicating the reference of the time axis included in the supplementary data, and extracts this reference time. Set.

Next, in step S5, the demultiplexer 10 outputs an audio PES (Packetized Eleme).
The stream ID is obtained from the header portion of the (ntary Stream) packet and sent to the external CPU 50 and the audio decoder 20.

Next, in step S6, the external CPU
50 knows the audio encoding format after the program switching, determines whether there is a change from the current format, and if there is no change, jumps to step S9.
If there is a change, the process proceeds to step S7.

If there is a change, step S
7, the external CPU 50 stores the decoding processing code corresponding to the audio encoding format after the program switching into the decoding processing code area 60B of the external ROM 60.
, 60BN and transfer them to the audio decoder 20. The transferred decode processing code is stored in the decode processing code area 25a of the internal RAM 25.

Next, in step S8, the DSP 22 of the audio decoder 20 performs an error check to confirm a transfer error of the transferred decode processing code. As an error check method, for example, CR
A method of actually decoding a C (Cyclic Redundancy Check) code or test data and comparing it with an expected value is used. If there is an error, the audio decoder 20 sends a retransmission request to the external CPU 50, and checks the retransmitted decode processing code again.

When the error check is completed, step S
At 9, the DSP 22 returns a check completion signal to the external CPU 50, and the external CPU 50 transmits this to the demultiplexer 10.

On the other hand, following steps S3 and S4, the demultiplexer 10 sets the PE in step S5.
The display time stamp (PTS) is obtained from the S header.

Next, in step S11, the demultiplexer 10 sets a decoding time based on the head time of the audio access unit specified by the PTS.

Next, in step S12, the demultiplexer 10 sets the internal system time code (ST
Decoding time (PTS time) set using C)
Until the PTS time arrives, the demultiplexer 10 stores the input stream in the internal buffer, and stops the stream.

Further, at the point in time when the PTS time comes, in step S13, the demultiplexer 10 confirms the completion of the transfer error check sent by the audio decoder 20 in step S9.

If the check is not completed, the next PT
The process returns to step S11 for the set of S and the audio access unit, and waits for the PTS time.

On the other hand, if the check has been completed, in step S14, the demultiplexer 10
Supplies an audio elementary stream (ES) to the audio decoder 20.

Next, in step S15, the frame synchronization circuit 21 of the audio decoder 20 converts the input audio ES into a frame (access unit).
Perform synchronous processing.

Next, in step S16, the DSP 2
2 starts the decoding process using the decoding process code stored in the internal RAM circuit 25.

As described above, in this embodiment, the external ROM connected to the outside of the audio decoder
, Decode processing codes for a plurality of types of encoding formats are stored. Then, according to the encoding format of the input audio stream, one type of decoding processing code corresponding to the encoding format stored in the external ROM is read out and stored in the code area of the internal RAM of the audio decoder. ing. The DSP performs the decoding process using the decoding process code stored in the internal RAM. Here, since the capacity of the external ROM can be sufficiently large, the cost does not increase even if the number of supported formats is increased.

Further, addition of a format to be processed and specification change can be easily handled by changing the external ROM without changing the audio decoder including the DSP.

As a method of changing the external ROM, an external ROM in which a new decode processing code is written is used.
It can be performed by exchanging the chip with another chip. As another method, when a rewritable flash ROM is used as the external ROM, a new decoding processing code can be written in the flash ROM. At this time, the new decoding processing code may be read from a storage medium such as a disk, or may be downloaded from a network.

FIG. 10 shows an example in which the multiplexed audio data decoding apparatus according to the present embodiment described above is applied.
Shown in

FIG. 10 shows a receiving apparatus for receiving a broadcast incorporating a multiplexed audio data decoding apparatus.
100 is an external antenna for receiving the broadcast signal, 110 is a tuner for selecting the received broadcast signal, and 120 is an error correction for performing processing such as error correction on the selected broadcast signal and outputting it to the demultiplexer 10. (FEC) circuit, 1
Reference numeral 30 denotes a speaker that outputs an analog audio signal of the DAC 30.

As described above, the present invention can be applied to a broadcast receiving apparatus whose encoding format is changed. Next, multiplexing according to another embodiment of the present invention will be described with reference to FIGS. The configuration and operation of the encoded audio data decoding device will be described.

First, the overall configuration of the multiplexed audio data decoding device according to the present embodiment will be described with reference to FIG. The same reference numerals as those in FIG. 1 indicate the same parts.

The multiplexed audio data decoding apparatus according to the present embodiment has a video decoder 70, an A / V decode memory 80, and a digital / analog converter 35 in addition to the configuration of the multiplexed audio data decoding apparatus shown in FIG. It has.

The output of the demultiplexer 10 is input to the video decoder 70 together with the audio decoder 20. Audio decoder 20 and video decoder 70
Are configured to be able to access the common A / V decode memory 80 in a time-division manner. Since the A / V decode memory 80 is realized as a large-capacity (megabyte) external memory chip, the A / V decode memory 80 has a sufficient capacity to be allocated to audio decoding even if a capacity required for video decoding is excluded.

Here, the allocation inside the A / V decode memory 80 used in the multiplexed audio data decoding device according to the present embodiment will be described with reference to FIG.

The A / V decode memory 80 is provided with a stream buffer area 80a necessary for video decoding and a work area 80b such as a frame buffer. Further, a graphic display buffer 80c for realizing an interface as a broadcast receiver is provided. Is provided.

The A / V decoding memory 80 has an audio decoding work area 80 d accessible by the audio decoder 20. In the audio decoding work area 80d, decoding processing code areas 80d1,..., 80dN for storing decoding processing program codes for all corresponding encoding formats are stored.
Is assigned.

Decode processing code areas 80d1,..., 8
., #N stored in the decode processing code areas 60B1,..., 60BN of the external ROM 60 shown in FIG.
Is stored.

Here, the storage processing of the decoding processing code according to the present embodiment will be described with reference to the flowchart shown in FIG.

In step S21, the external CPU 50
Is the decoding processing code area 60B of the external ROM 60
, 60N are transferred to the A / V decode memory 80 via the interface (I / F) circuit of the audio decoder 20.

Next, in step S22, the DSP 22 of the audio decoder 20 checks for a transfer error of the decode processing code stored in the A / V decode memory 80. The transfer error check is performed by a CRC check combining N formats.

Next, a program switching process in the multiplexed audio data decoding device according to the present embodiment will be described with reference to FIG.

FIG. 9 shows a program switching process according to the present embodiment as an algorithm. FIG.
The same reference numerals as in FIG. 5 and FIG. 5 indicate the same processing steps.

The program switching process in this embodiment is the same as the program switching process shown in the flowchart of FIG. 4 except that step S7 ′ is replaced with step S7 ′, and steps S8, S9, and S13 in FIG. 4 are deleted. Therefore, the differences will be described.

In the determination in step S6, the external CPU
50, if the audio encoding format after the program switch has changed from the current format,
In step S7 ', the DSP 22 decodes the decoding process code areas 80d1,.
The decoding processing code after the switching from 80dN is transferred to the internal memory 25.

Generally, the A / V decode memory 80 has a transmission bandwidth that can withstand video decoding processing.
The time required to transfer one type of decode processing code can be made sufficiently shorter than when transferring from the external ROM 11.

Further, since the reliability of the transfer has been confirmed in the access at the time of decoding, it is not necessary to check the transfer error again.

As described above, in this embodiment, the decoding processing codes for a plurality of types of encoding formats are stored in the A / V decoding memory connected to the outside of the audio decoder from the external ROM. . Then, according to the encoding format of the input audio stream, one type of decoding processing code corresponding to the encoding format stored in the A / V decoding memory is read out, and the internal R of the audio decoder is read out.
It is stored in the AM code area.

The DSP performs a decoding process using the decoding process code stored in the internal RAM. Here, since the capacity of the A / V decode memory is sufficiently large, even if the number of supported formats is increased, the cost does not increase.

Further, the addition of the format to be processed and the specification change can be easily dealt with by changing the external ROM without changing the audio decoder including the DSP.

Further, the time required to transfer one type of decode processing code can be reduced.

Further, since the reliability of the transfer has been confirmed in the access at the time of decoding, it is not necessary to check the transfer error again.

FIG. 11 shows an example in which the multiplexed audio data decoding apparatus according to the present embodiment described above is applied.
To 13 are shown.

FIG. 11 shows a receiving device for receiving a broadcast incorporating a multiplexed audio data decoding device.
100 is an external antenna for receiving the broadcast signal, 110 is a tuner for selecting the received broadcast signal, and 120 is an error correction for performing processing such as error correction on the selected broadcast signal and outputting it to the demultiplexer 10. (FEC) circuit, 1
Reference numeral 30 denotes a speaker for outputting an analog audio signal of the DAC 30, and reference numeral 140 denotes a monitor for outputting an analog video signal of the DAC 35.

As described above, the present invention can be applied to a broadcast receiving apparatus whose encoding format is changed.

FIG. 12 shows a recording / reproducing apparatus built-in receiving apparatus for receiving, recording and reproducing a broadcast incorporating a multiplexed audio data decoding apparatus, and 150 is a recording apparatus for recording / reproducing a broadcast signal. , And outputs the reproduced signal to the demultiplexer 10. Note that the external antenna 100, tuner 110, and error correction circuit 120 in FIG. 11 are omitted.

As described above, the present invention can be applied to a recording / reproducing apparatus built-in receiving apparatus for receiving, recording, and reproducing a broadcast whose encoding format is changed.

FIG. 13 shows a communication device incorporating a multiplexed audio data decoding device. Reference numeral 170 denotes an external line such as the Internet, and 160 denotes a modem for receiving an external line. Output to

As described above, the present invention can also be applied to a communication device for receiving communication in which an encoding format is changed.

[0090]

According to the present invention, the integration of the audio decoder is easy, and the flexibility can be improved even when the number of formats to be processed increases or when the specification is changed.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating an overall configuration of a multiplexed audio data decoding device according to an embodiment of the present invention.

FIG. 2 is an explanatory diagram of a hierarchical structure of an MPEG transport stream (TS) input to a multiplexed audio data decoding device according to an embodiment of the present invention.

FIG. 3 is an explanatory diagram of a memory arrangement of an internal RAM circuit used in the multiplexed audio data decoding device according to one embodiment of the present invention.

FIG. 4 is a flowchart illustrating a program switching process in the multiplexed audio data decoding device according to the embodiment of the present invention.

FIG. 5 is an explanatory diagram of signal exchange in a program switching process in the multiplexed audio data decoding device according to one embodiment of the present invention.

FIG. 6 is a block diagram illustrating an overall configuration of a multiplexed audio data decoding device according to an embodiment of the present invention.

FIG. 7 is an explanatory diagram of allocation inside an A / V decode memory used in a multiplexed audio data decoding device according to an embodiment of the present invention.

FIG. 8 is a flowchart of a decoding process code storing process in the multiplexed audio data decoding device according to an embodiment of the present invention.

FIG. 9 is a flowchart illustrating a program switching process in a multiplexed audio data decoding device according to another embodiment of the present invention.

FIG. 10 is a block diagram showing a receiving device for receiving a broadcast incorporating the multiplexed audio data decoding device of the present invention.

FIG. 11 is a block diagram showing a receiving device for receiving a broadcast incorporating the multiplexed audio data decoding device of the present invention.

FIG. 12 is a block diagram showing a recording / reproducing device built-in receiving device for receiving, recording, and reproducing a broadcast in which the multiplexed audio data decoding device of the present invention is incorporated.

FIG. 13 is a block diagram showing a communication device incorporating the multiplexed audio data decoding device of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 ... Demultiplexer 20 ... Audio decoder 22 ... DSP 25 ... Internal RAM 50 ... External CPU 60 ... External ROM 70 ... Video decoder 80 ... A / V decode memory

 ────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor Yukio Fujii 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Inside Digital Media Development Division, Hitachi, Ltd. 292 Digital Media Development Division, Hitachi, Ltd. (72) Inventor Hiroaki Shirane 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture, Japan Hitachi Image Information System, Ltd. (72) Inventor Eiji Yamamoto Josui, Kodaira-shi, Tokyo 5-22-1, Honcho Nichicho Cho SII Systems

Claims (7)

[Claims] 1. A multiplexing system in which a compression-encoded audio data sequence is packetized, a packet group formed by multiplexing a plurality of sequences is input, and one audio data sequence designated by a user is selected and decoded. In the audio data decoding device, one audio data sequence specified by a user is extracted from the packet group based on attribute information included in each packet, and the audio data sequence is compressed from header information included in the audio data sequence. A demultiplexer for extracting the compression coding method used for the decoding, a first memory for storing a decoding processing code corresponding to the compression coding method, and an audio data sequence compressed in accordance with the decoding processing code. Digital signal processor and multiple compression coding schemes A read-only memory for accumulating a plurality of decode processing codes respectively corresponding to the first and second memories; Control means for transferring a processing code, wherein the digital signal processor starts decoding using the decoding processing code transferred to the first memory. 2. A set of video data sequences designated by a user, wherein a compression-encoded video data sequence and an accompanying audio data sequence are packetized, a packet group formed by multiplexing a plurality of sequences is input. And a multiplexed audio data decoding apparatus for selecting an audio data sequence associated with the audio data sequence and decoding the audio data sequence, wherein one audio data sequence specified by the user is extracted from the packet group by using attribute information of each packet. A demultiplexer for extracting a compression encoding scheme used to compress the audio data series from header information of the audio data series; and a decoding processing code corresponding to the compression encoding scheme. Compressed in accordance with the first memory and the decode processing code A digital signal processor that sequentially decodes an audio data sequence; a read-only memory that stores a plurality of decoding processing codes respectively corresponding to a plurality of compression encoding systems; and a video that decodes the compression-encoded video data sequence. A second memory used as a work area for decoding by the digital signal processor and the video decoder; and a plurality of decoding processing codes previously transferred from the read-only memory to the second memory; Control means for detecting a change in the compression coding method and transferring a decoding processing code corresponding to the changed compression coding method from the second memory to the first memory; , Using the decode processing code transferred to the first memory, A multiplexed audio data decoding device, which starts signal processing. 3. The multiplexed audio data decoding device according to claim 1, wherein said read-only memory corresponds to said first memory or said second memory. A multiplexed audio data decoding device, wherein after a decoding process code is transferred, a digital signal processor performs a process of determining the presence or absence of a transfer error. 4. The multiplexed audio data decoding device according to claim 3, wherein the processing of determining whether or not there is a transfer error performed by the digital signal processor decodes a specific audio data sequence into a decode processing code and responds. A multiplexed audio data decoding device characterized by performing comparison with an expected value. 5. A compression-encoded audio data sequence selected from a plurality of multiplexed compression-encoded audio data sequences, and a compression-encoding method of the one compression-encoded audio data sequence is extracted. A demultiplexer; a first memory for acquiring and accumulating a decoding process code corresponding to the compression encoding method from outside when the compression encoding method of the one compression encoding audio data sequence is changed; A multiplexed audio data decoding device, comprising: a digital signal processor for sequentially decoding the one compression-encoded audio data sequence according to the decoding processing code. 6. A demultiplexer for selecting one compression-encoded audio data sequence specified by a user from a plurality of multiplexed compression-encoded audio data sequences, and a plurality of types of the plurality of compression-encoded audio data sequences. A read-only memory for storing a plurality of types of decode processing codes respectively corresponding to the compression-encoding methods, and a read-only memory when the compression-encoding method for the one compression-encoded audio data sequence is changed. A multiplexed audio data decoding device comprising a digital signal processor for sequentially decoding one compression-encoded audio data sequence according to a decoding process code to be decoded. 7. A receiving means for receiving a plurality of multiplexed coded audio data sequences multiplexed, and one compression coding specified by a user from the plurality of compressed coded audio data sequences received by said receiving means. A demultiplexer that selects an audio data sequence; a read-only memory that stores a plurality of types of decode processing codes respectively corresponding to a plurality of types of compression encoding methods of the plurality of compression-encoded audio data sequences; A digital signal processor for sequentially decoding one compression-encoded audio data sequence according to the corresponding decoding processing code of the read-only memory when the compression-encoding method of the encoded audio data sequence is changed. Characteristic receiving device.