JP2000252402A - Semiconductor device, semiconductor device mounting method, and electronic device - Google Patents

Abstract

(57) [Problem] To provide a lead surface treatment technology corresponding to a lead-free mounting process. SOLUTION: In a semiconductor device in which one end of a lead and a semiconductor chip incorporated in a sealing body are connected, and the other end of the lead is an external terminal, the external terminal is covered with a tin film. Coated with a tin alloy film. An electronic device in which an electronic component such as a semiconductor device is mounted in a mounting area provided on a wiring board and an electrical connection between a connection terminal of the wiring substrate and an external terminal of the electronic component is provided. The external terminals are covered with a tin film, the tin film is covered with a tin alloy film, and the external terminals and the connection terminals of the wiring board are connected by lead-free solder. [Effect] By coating the tin film with the tin alloy film, whiskers can be prevented from being generated from the tin film.
Further, at the time of joining, the tin alloy film at the joining portion is melted, and the solder is joined to the tin film, so that the solder wettability is improved.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, a method for mounting the semiconductor device, and an electronic device, and more particularly, to a semiconductor device using a lead-free solder, which is a lead-free bonding agent, and is effective when applied to a semiconductor device or the like. Technology.

[0002]

2. Description of the Related Art A semiconductor device such as an LSI is usually sealed with a resin or the like, a semiconductor chip mounted in a sealed body is connected to an inner lead of the lead, and an outer lead of the lead extends outside the sealed body. There are external terminals, and these external terminals are connected to the joints of the wiring board, and the semiconductor device is mounted. As a bonding agent used for this mounting, lead solder, which is an alloy of lead and tin, has been used for a long time.

[0003] Since such lead solder has flexibility in itself, stress caused by a difference in thermal expansion coefficient between a semiconductor chip and a wiring board or mechanical strain caused by a structure causes deformation of the solder. As a result, the connection life of the electrodes can be ensured. Further, it is widely used for various connections between semiconductor devices and electronic devices because of its advantages such as good wettability between solder and various metals.

However, there is a concern that lead, which is a main component of solder, is left in the natural environment due to dumping outdoors or the like and, when exposed to a bad environment such as acid rain, generates harmful substances and causes environmental pollution. As an environmental measure to prevent such environmental pollution, there is a demand for a lead-free process for reducing or eliminating the use of solder containing lead, which is a harmful substance, in a mounting process.

For this reason, instead of PbSn alloy solder, S
There has been proposed a technique of performing fusion bonding in substantially the same manner as a conventional lead solder by using an nAg-based or SnBi-based lead-free solder as a bonding agent.

Conventionally, a lead serving as an external terminal of a semiconductor device subjected to such fusion bonding is coated with a lead solder film, a tin film, or a gold film as a surface treatment for improving wettability with a bonding agent. I was

[0007]

However, in order to promote lead-free, it is necessary to stop using the lead solder film for surface treatment. If a gold film is used instead of the lead solder film, the price will increase. When a tin film is used, a whisker may be generated with time and short-circuit may occur between adjacent leads. To prevent the generation of the whisker, the plated tin film is heated to a temperature close to the melting point. Fusing is required. In this heat treatment, in addition to the increase in the number of steps, there is a concern that the heat treatment may lower the solder wettability or lower the durability of the product.

As another method for preventing the generation of whiskers, it is known that tin contains another metal and is alloyed. However, when an alloy is plated, it is compared with the case of pure tin. Therefore, plating is difficult, and the wettability with the metal to be joined is reduced. In addition, since the tin alloy lacks flexibility, cracks may occur during molding of the lead or the like, and the wettability of the cracked portion may be reduced.

[0009] In addition, surface treatment using Pd has been considered. However, in this method, the material of the lead is limited to a copper-based material, and an FeNi-based alloy cannot be used. For surface treatment using Pd, for example, Nikkei BP
Published by Nikkei Micro Device, March 1998, 98
Pp. 103-103.

An object of the present invention is to provide a technique capable of performing a surface treatment corresponding to a lead-free mounting process of a semiconductor device. The above and other problems and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0011]

Means for Solving the Problems Among the inventions disclosed in the present application, the outline of typical inventions will be briefly described.
It is as follows. For a semiconductor device in which one end of a lead and a semiconductor chip incorporated in a sealing body are connected, and the other end of the lead is an external terminal, the external terminal is coated with a tin film, and the tin film is coated with a tin alloy film. Cover.

[0012] Further, according to such a method of mounting a semiconductor device on a wiring board, a step of printing and attaching a solder paste containing lead-free solder powder to a joint portion of the wiring board, and a step of mounting the semiconductor device at a predetermined position on the wiring board. The step of mounting, and melting the solder powder of the solder paste and the tin alloy film of the joining portion, and joining the lead-free solder to the tin film, solidifying the lead-free solder, and connecting the connection terminals and the outer leads. Connecting with lead-free solder.

An electronic device in which an electronic component such as a semiconductor device is mounted on a mounting area provided on a wiring substrate and electrically connects a connection terminal of the wiring substrate to an external terminal of the electronic component. The external terminals of the electronic component are covered with a tin film, the tin film is covered with a tin alloy film, and the external terminals and the connection terminals of the wiring board are connected by lead-free solder.

According to the above-described means, since the whisker is prevented from being generated from the tin film by covering the tin film with the tin alloy film, a short circuit between the leads due to the whisker does not occur.

Further, at the time of joining, the tin alloy film at the joining portion is melted and the lead-free solder is joined to the tin film, so that the solder wettability is improved.

Hereinafter, embodiments of the present invention will be described. In all the drawings for describing the embodiments, components having the same functions are denoted by the same reference numerals, and repeated description thereof will be omitted.

[0017]

FIG. 1 is a plan view showing a QFP type semiconductor device according to an embodiment of the present invention, and FIG. 2 is a partial longitudinal sectional view taken along line aa in FIG. It is. In the semiconductor device according to the present embodiment, a semiconductor chip 1 in which various elements are formed on a main surface of a semiconductor substrate such as single crystal silicon or the like and connected by a wiring layer to form a predetermined circuit is fixed to a tub 2. And the inner lead 3 a of the lead 3 are connected by a bonding wire 4. The semiconductor chip 1, the tab 2, the inner leads 3a, and the bonding wires 4 are sealed by a sealing body 5 made of epoxy resin or the like, and the outer leads 3b of the leads 3 extend from four sides of the sealing body 5 to the outside. are doing.

The outer lead 3b has been subjected to a surface treatment, and is coated with a tin film 6 for improving the solder wettability. Further, in order to prevent the generation of whiskers from the tin film 6, the tin film 6 has another surface. Is coated with a tin alloy film 7 containing the above-mentioned metal. Examples of the tin alloy used for the tin alloy film 7 include SnCu, SnNi, SnZn, SnAg,
SnBi, SnIn, SnSb, etc. can be used.

Regarding the tin film 6, the higher the purity, the better the solder wettability, and the higher the purity, the more easily the whiskers are generated. When impurities are mixed to some extent, no whisker is generated. In consideration of these points, the tin film 6
Has a purity of 99% or more, and the tin alloy film 7 contains 2% or more of another metal in order to prevent generation of whiskers. The thickness of each tin film 6 is 5 μm to 20 μm.
m, and the thickness of the tin alloy film 7 is 0.2 μm to 2 μm.
It is formed to a thickness of about μm. If the product has a short aging time, the tin film 6 may be thinned to about 2.5 μm.

By coating the tin film 6 with the tin alloy film 7, it is possible to prevent whiskers, which are whiskers of tin, from being generated from the surface of the tin-plated lead due to pressure or stress. No short circuit occurs between the leads.

FIG. 3 is a longitudinal sectional view showing a main part of an electronic device in which the semiconductor device shown in FIGS. 1 and 2 is mounted on a wiring board. The wiring board has a plurality of wiring patterns formed on the surface and inside of a substrate 8 formed of a plate-like insulating material such as glass epoxy or mullite ceramic, and is connected to outer leads 3b which are external terminals of the semiconductor device. The wiring pattern 9 connected to the connection terminal 9a is formed on the uppermost layer.

The connection between the outer lead 3b and the connection terminal 9 is made of a SnAg or SnZn lead-free solder 1.
0 is used as a bonding agent, and when the lead-free solder 10 is heated and melted, the tin alloy film 7 at the bonding portion is melted and the lead-free solder 10 is bonded to the tin film 6 having good solder wettability. The solder 10 can sufficiently cover the joint of the outer lead 3b.

In this embodiment, the surface treatment is performed on the outer leads 3b of the semiconductor device. However, a similar surface treatment may be further performed on the connection terminals 9a of the wiring board.

Next, the outer lead surface treatment of the semiconductor device according to the present embodiment will be described with reference to FIGS. In the surface treatment stage after sealing, each lead 3 is provided with a tie bar 11 provided at the end of the outer lead 3a or a dam bar 12 provided in the vicinity of the sealing region between the leads 3.
And a plurality of semiconductor devices form a continuous lead frame.

First, as a cleaning step, the outer leads 3b
A degreasing treatment for removing organic substances such as oils and fats adhered to the surface is performed. In the degreasing treatment, after immersing for 1 minute in a degreasing solution at about 70 ° C. containing about 60 g / l of a degreasing agent (for example, MacDermid “Metalex W Special”), washing with pure water was performed two to three times. Remove the degreasing solution.

Next, as a cleaning step, the outer leads 3b
A descaling process for removing a thermal oxide film and the like formed on the surface of the substrate is performed. In the descaling process, the lead frame
2 In the case of a FeNi alloy such as an alloy, it is immersed in an etchant containing about 200 ml / l of a cleaning agent (for example, Hishie Chemical “CPL100”) at about 30 ° C. for 1 minute,
When the lead frame is made of copper, the lead frame is immersed in an etching solution containing about 350 ml / l of a cleaning agent (for example, Hishie Chemical "CPE50") at about 30 ° C. for 1 minute. Thereafter, washing with pure water is performed two or three times to remove the etching solution. This state is shown in FIG.

Next, the outer leads 3b having been washed
Is subjected to tin plating. The tin plating treatment was performed by mixing 60 g / l of stannous sulfate, 100 g / l of sulfuric acid, and 30 ml / l of an additive (for example, Ishihara Chemical “UTB513Y”).
Using a plating solution of about 0 ° C., a current density of ² A / dm ² is applied for about 10 minutes. After that, wash with pure water 2 ~
Perform three times to remove the plating solution. This state is shown in FIG.
Shown in

Next, the outer lead 3b having been washed
Is subjected to a tin alloy plating process. For example, in the case of a tin copper alloy plating process, potassium stannate 40 g / l and bronze copper 32 g / l
1, 70 g / l of bluish potash, 12 g / l of caustic potash, and 50 g / l of Rochelle salt at a current density of 5 A / dm ² using a plating solution of about 65 ° C. for about 1 minute.

After the tin alloy plating treatment, washing with pure water or hot water is performed three times or more to remove the plating solution.
dry. This state is shown in FIG.

In the case of tin-nickel alloy plating, PH2.50 mixed with 50 g / l of tin chloride, 250 g / l of nickel chloride and 40 g / l of acidic fuccammonium is used.
5 is carried out at a current density of ² A / dm ² for about 1 minute using a plating solution of about 65 ° C., and similarly washed and dried.

Thereafter, the tie bar 11 of the lead frame,
The dam bar 12 and the like are cut, and the outer leads 3b are formed, thereby completing the semiconductor device shown in FIG.

Next, a method for mounting the semiconductor device on a wiring board by, for example, a reflow method will be described with reference to FIG.

First, the bonding terminals 9 of the wiring board such as connection terminals
a) by using a screen mask having an opening corresponding to a joint portion such as a, aligning the screen mask with the wiring board, and then pressing the solder paste 13 on the screen mask into the opening with a squeegee by a printing machine. , Solder paste 1
3 is printed. The solder paste 13 is obtained by mixing SnAg-based or SnBi-based lead-free solder powder and flux.

The semiconductor device, which has been inspected for component shape, bending of the outer leads 3b, and the like, is mounted at a predetermined position on the wiring board on which the solder paste 13 is printed by a mounter, and the semiconductor device is wired with an adhesive 14 as necessary. Adhesively fix to the substrate. This state is shown in FIG.

Thereafter, the solder powder is heated by hot air or infrared rays in a reflow furnace, and the solder powder of the solder paste 13 is melted to become the solder 10, and adheres to the outer leads 3a and the connection terminals 9a of the wiring board. This lead-free solder 1
0, the tin alloy film 7 at the bonding portion is melted,
Since the lead-free solder 10 is bonded to the tin film 6 having good solder wettability, the lead-free solder 10 is
b can be sufficiently covered. After the solder 10 is sufficiently adhered, the heating is terminated and as the temperature decreases, the molten solder 10 solidifies and the connection terminal 9
a and the outer leads 3a are connected by the solder 10, and the mounting of the semiconductor device is completed, and the state shown in FIG. 3 is obtained.

As described above, the invention made by the present inventor is:
Although a specific description has been given based on the above-described embodiment, the present invention is not limited to the above-described embodiment, and it is needless to say that various modifications can be made without departing from the gist of the invention. For example, in the above-described embodiment, the QFP
The semiconductor device of the SOJ (Sm
all Outline J-lead type or QFN (Quad Flat Nonl)
The present invention can also be applied to surface treatment of external terminals of other semiconductor devices, such as a bottom terminal type in which a lead is exposed on the bottom surface of a sealing body such as an ead) type or a SON (Small Outline Nonlead) type.
Further, in the above-described embodiment, an example in which a semiconductor device is manufactured by mounting a semiconductor device on a substrate has been described. However, the present invention is also applicable to a case where an electronic device is manufactured by mounting another electronic component on a substrate. Applicable.

[0037]

The effects obtained by the representative ones of the inventions disclosed in the present application will be briefly described as follows. (1) According to the present invention, there is an effect that generation of whiskers can be prevented by coating a tin film with a tin alloy film. (2) According to the present invention, the effect (1) has an effect that a short circuit between leads due to whiskers can be prevented. (3) According to the present invention, the above-mentioned effect (2) has an effect that it is possible to prevent the occurrence of defective products over time. (4) According to the present invention, when the solder is heated and melted, the tin alloy film at the bonding portion is melted and the solder is bonded to the tin film, so that there is an effect that the solder wettability is improved. (5) According to the present invention, the effect (4) has an effect that joining can be surely performed. (6) According to the present invention, there is an effect that lead-free can be realized by using a lead-free metal for the surface treatment of the lead.

[Brief description of the drawings]

FIG. 1 is a plan view showing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a partial vertical cross-sectional view of the semiconductor device shown in FIG. 1 along the line aa.

FIG. 3 is a longitudinal sectional view showing a mounting state of the semiconductor device and the wiring board shown in FIG. 2;

FIG. 4 is a longitudinal sectional view showing a surface treatment step of the semiconductor device of the present embodiment.

FIG. 5 is a vertical sectional view showing a surface treatment step of the semiconductor device of the present embodiment.

FIG. 6 is a longitudinal sectional view showing a surface treatment step of the semiconductor device of the present embodiment.

FIG. 7 is a vertical sectional view showing a mounting step of the semiconductor device of the embodiment.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Semiconductor chip, 2 ... Tab, 5a ... Metallized layer, 3
… Lead, 3a… inner lead, 3b… outer lead, 4… bonding wire, 5… sealing body, 6… tin film,
7: Tin alloy, 8: Base, 9: Wiring pattern, 9a: Connection terminal, 10: Solder, 11: Tie bar, 12: Dam bar, 13: Solder paste, 14: Adhesive.

Claims (10)

[Claims] 1. A semiconductor device in which a semiconductor chip incorporated in a sealing body and one end of a lead are connected, and the other end of the lead serves as an external terminal, wherein the external terminal is covered with a tin film. A semiconductor device, wherein the film is covered with a tin alloy film. 2. The semiconductor device according to claim 1, wherein said tin film has a purity of 99% or more. 3. The tin alloy film is made of SnCu, SnNi, S
3. The semiconductor device according to claim 1, wherein any one of nZn, SnAg, SnBi, SnIn, and SnSb is used. 4. The method according to claim 1, wherein the tin film is formed to a thickness of about 5 μm to 20 μm, and the tin alloy film is formed to a thickness of about 0.2 μm to 2 μm. 13. The semiconductor device according to claim 1. 5. A method for mounting a semiconductor device in which a semiconductor chip incorporated in a sealing body and one end of a lead are connected and a semiconductor device having the other end of the lead as an external terminal is mounted on a wiring board. A terminal is coated with a tin film, and the tin film is coated with a tin alloy film. A step of printing and attaching a solder paste containing lead-free solder powder to a bonding portion of the wiring board, and wiring the semiconductor device. A step of mounting at a predetermined position on the substrate; melting the solder powder of the solder paste and the tin alloy film at the bonding portion to bond the lead-free solder to the tin film; solidifying the lead-free solder; And a step of connecting the outer leads to the outer leads by lead-free solder. 6. The method according to claim 5, wherein the tin film has a purity of 99% or more. 7. The tin alloy film is made of SnCu, SnNi, S
7. The method according to claim 5, wherein any one of nZn, SnAg, SnBi, SnIn, and SnSb is used. 8. The method according to claim 5, wherein the tin film is formed to a thickness of about 5 μm to 20 μm, and the tin alloy film is formed to a thickness of about 0.2 μm to 2 μm. A mounting method of the semiconductor device described in the above. 9. An electronic device in which an electronic component such as a semiconductor device is mounted on a mounting area provided on a wiring board and an electrical connection between a connection terminal of the wiring board and an external terminal of the electronic component is provided. An external terminal of the electronic component is covered with a tin film, the tin film is covered with a tin alloy film, and the external terminal and a connection terminal of the wiring board are connected by lead-free solder. Electronic devices. 10. The method according to claim 1, wherein the tin alloy film is formed of SnCu, SnNi,
The electronic device according to claim 9, wherein any one of SnZn, SnAg, SnBi, SnIn, and SnSb is used.