JP2000315919A - Mixer circuit - Google Patents

Abstract

(57) [Problem] To realize a mixer circuit that operates stably without reducing gain even under a low power supply voltage. A transistor (Q5) receives a first input signal (IN1) as one-sided input and receives the first input signal.
And a bipolar transistor (Q6) receiving a bias voltage (Bias) and second input signals (IN2 +, IN2).
A balun (Mm) is connected between the differential pair (10, 20) for differentially amplifying-). By the balun, a current corresponding to the input signal is generated in the first port, and a current having a phase opposite to that of the first port is generated in the second port to generate differential currents (iA, iB) complementary to each other. Generated as the operating current of the differential pair.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mixer circuit, and more particularly, to a mixer circuit for performing balanced modulation of an input signal, and more particularly to a Gilbert cell type mixer circuit.

[0002]

2. Description of the Related Art FIG. 6 is a diagram showing a configuration of a conventional Gilbert cell type mixer circuit. In FIG. 6, a mixer circuit is connected between a common node A and a common node C and has an NPN bipolar transistor T1 receiving an input signal V1 + at a control electrode node (base) thereof, and a common circuit between a common node B and a common node C. An NPN bipolar transistor T2 connected and receiving a complementary first input signal V1- at its control electrode node, an output node O1 and a common node A
Bipolar transistor T3 connected between the control electrode node and receiving a second input signal V2 + at its control electrode node.
And a second input signal V2- connected between the second output node O2 and the common node A and connected to its control electrode node.
NPN bipolar transistor T4 connected between output node O1 and common node B and receiving a second input signal V2-supplied to its control electrode node and output node O2 and common node B And an NPN bipolar transistor T6 which receives the second input signal V2 + at its control electrode node, and a constant current source IS connected between the common node C and the ground node.

[0003] Bipolar transistors T1 and T2
Have their emitters connected to a common node C to form an emitter differential pair circuit. Bipolar transistors T3 and T4 have respective emitters connected to common node A to form an emitter differential pair circuit, and bipolar transistors T5 and T6 have respective emitters connected to common node B to form an emitter differential pair circuit. Constitute. The collectors of bipolar transistors T3 and T5 are connected to output node O1, and the collectors of bipolar transistors T4 and T6 are connected to output node O2. Differential currents i1 and i2 flow through output nodes O1 and O2. These output nodes O1 and O2
Is typically coupled to a power supply node via a load element.

The input signals V1 (V1 +, V1-) and V1
2 (V2 +, V2-) are voltage signals input in the form of complementary signal pairs and having different frequencies f1 and f2, respectively. The equivalent amplitude of the input signal V1 is
It is given by (V1 +)-(V1-), and the equivalent amplitude of the input signal V2 is given by (V2 +)-(V2-).
An input signal V1 of frequency f1 is differentially amplified by an emitter differential pair circuit composed of bipolar transistors T1 and T2, and the differential amplification result is output in the form of collector currents of bipolar transistors T1 and T2.

The collector current of each of bipolar transistors T1 and T2 is equal to that of bipolar transistor T1.
An operating current is supplied to each of the emitter differential pair circuit composed of the transistors 3 and T4 and the emitter differential pair circuit composed of the bipolar transistors T5 and T6, and the drive current of these differential pair circuits is determined. Hereinafter, the operation of the mixer circuit shown in FIG. 6 will be described using equations.

The collector currents ic1 and ic2 of the bipolar transistors T1 and T2 are expressed by the following equations.

Ic1 = 2 · IEEE / (1 + exp (−V1 / VT)) (1) ic2 = 2 · IEEE / (1 + exp (V1 / VT)) (2) where VT is a thermal voltage, It is represented by k · T / q. k indicates Boltzmann's constant, T indicates absolute temperature, and q indicates electric charge.

V1 = (V1 +)-(V1-) In the above equation, each emitter current is obtained from the relationship between the emitter current and the base voltage in the differential amplifier circuit, and the collector current is obtained from the obtained emitter current. Gives the above relational expression.

[0009] From the same analysis, the transistors T3, T3
4, collector currents ic3, i of T5 and T6 respectively
c4, ic5, and ic6 are represented by the following equations.

Ic3 = ic1 / (1 + exp (−V2 / VT)) (3) ic4 = ic1 / (1 + exp (V2 / VT)) (4) ic5 = ic2 / (1 + exp (V2 / VT)) (( 5) ic6 = ic2 / (1 + exp (−V2 / VT)) (6) where V2 = (V2 +) − (V2-) Equations (1) and (2) are applied to equations (3) to (6). By substituting, the collector currents ic3, ic4, ic
5 and ic6 and the input voltages V1 and V2 are given by the following equations.

Ic3 = 2 · IEEE / (1 + exp (−V1 / VT)) (1 + exp (−V1 / VT)) (7) ic4 = 2 · IEEE / (1 + exp (−V1 / VT)) (1 + exp (V2) / VT)) (8) ic5 = 2 · IEEE / (1 + exp (V1 / VT)) (1 + exp (V2 / VT)) (9) ic6 = 2 · IEEE / (1 + exp (V1 / VT)) ( 1 + exp (-V2 / VT)) (10) By using the above equations (7)-(10), the differential output current i1-i2 from the output nodes O1 and O2 is represented by the following equation.

I1-i2 = ic3 + ic5- (ic6 + ic4) = 2 · IEEE (tanh (V1 / 2 · VT)) (tanh (V2 / 2 · VT)) (11) The function tanh x is expressed by the following equation. The series can be expanded.

[0013] ^{tanh x = x-x 3/} 3 ... (12) above formula (12), if x is sufficiently smaller than 1, the following approximation formula is obtained.

Tanh x〜x (13) Therefore, differential input signals (input voltages) V1 and V2
And the differential output signals (output currents) i1 and i2 are expressed by the following equations.

I1−i2−2 · IEEE · (V1 / 2 · VT) (V2 / 2 · VT) (14) That is, the differential output current i1-i2 is the differential input voltage V
It is given by the multiplication of 1 and V2. Therefore, the mixer circuit shown in FIG. 6 substantially multiplies differential input signals V1 and V2, and outputs the multiplied result as differential current i1-i2. When the differential input signals V1 and V2 have different frequencies f1 and f2, respectively, the multiplication of the frequency components is performed, so that the sum | f1 + f2 | or the difference | f1-f2 | of the frequencies of these two signals V1 and V2 is obtained. A frequency component signal is output.

That is, the mixer circuit performs a balanced modulation operation for mixing the input signals V1 and V2. Such a mixer circuit is used in a video signal processing circuit in which a local oscillation signal from a local oscillation circuit is mixed with a high-frequency video signal to generate an intermediate frequency video signal.

[0017]

In the mixer circuit shown in FIG. 6, between the output nodes O1 and O2 and the ground node, a constant current source IS, a differential stage DFI composed of bipolar transistors T1 and T2, and A differential stage DF2 including bipolar transistors T3, T4, T5 and T6 is sequentially connected. In order to operate the mixer circuit, a voltage for turning on a transistor constituting the constant current source IS (generally, a transistor receiving a bias voltage at its control electrode node) and a differential stage D
A voltage for operating the transistors T1 and T2 of F1 (these bipolar transistors T1 and T2
Must be higher than the respective emitter voltages), and the output node O1 for operating the transistors T3 to T6 included in the differential stage DF2.
And a collector-emitter voltage applied between O2 and common nodes A and B, respectively. Therefore, the lower limit of the voltage level of output nodes O1 and O2 cannot be reduced in order to stably operate these three-stage circuit portions.

On the other hand, in order to transmit a small-amplitude signal to operate at high speed and reduce current consumption, a power supply voltage is generally reduced to lower the power supply voltage. Therefore, there is a problem that it becomes difficult to operate the mixer circuit stably and perform balanced modulation under such a low power supply voltage.

An object of the present invention is to provide a mixer circuit that operates stably under a low power supply voltage while suppressing a decrease in conversion gain.

[0020]

According to a first aspect of the present invention, there is provided a mixer circuit comprising a first circuit connected between a first signal output node and a first common node and having a control electrode node receiving a second input signal. And a second input connected between the second signal output node and the first common node and having its control electrode node receiving a comparison reference signal for the second input signal. A second transistor connected to the node, a third transistor connected between the first signal output node and the second common node and having a control electrode node connected to the second input node,
Connected between the signal output node and the second common node,
And a fourth transistor having its control electrode node connected to the first input node; a first port connected between the first common node and the first internal node; A balun element having a second port connected between the two internal nodes, the balun element generating a current having a phase inverted from that of the current flowing through the first port in the second port, and a balun element connected to the first internal node. A fifth transistor coupled and receiving a first input signal at its control electrode node; and a sixth transistor coupled to a second internal node and receiving a reference signal of the first input signal at its control electrode node. Is provided.

A mixer circuit according to a second aspect is connected between a first signal output node and a first common node, and has its control electrode node connected to a first input node receiving a second input signal. A second transistor connected between the first transistor and the second signal output node and the first common node and having a control electrode node connected to a second input node receiving a reference signal for comparison with the second input signal; , A third transistor connected between the first signal output node and the second common node and having a control electrode node connected to the second input node, a second signal output node and a second And a control electrode connected between the first common node and a first internal node and having a control electrode connected between the common node and the control electrode connected to the first input node. A fifth transistor receiving a first input signal at a node; a fifth transistor connected between a second common node and a second internal node; and receiving at its control electrode node a comparison reference signal of the first input signal. A sixth transistor includes a balun element coupled between the first and second internal nodes and a node receiving a fixed potential. The balun element has a first port coupled to a first internal node,
A second port coupled to a second internal node;
The current whose phase is inverted with respect to the current flowing through the first port is
It has a characteristic to be generated in the port.

According to a third aspect of the present invention, a mixer circuit is connected between a first signal output node and a first common node, and has its control electrode node connected to a first input node receiving a second input signal. A first transistor is connected between a second signal output node and a first common node, and has a control electrode node connected to a second input node receiving a reference signal for comparison with a second input signal. A second transistor, a third transistor connected between the first signal output node and the second common node, and having a control electrode node connected to the second input node, a second signal output node and a second transistor. A fourth transistor connected between the two common nodes and having its control electrode node connected to the first input node, and a first port coupled between the first common node and the first internal node , A second port coupled between the second common node and the second internal node, and causing a current having a phase inverted from that of the current flowing through the first port to flow to the second port. A balun element and current sources respectively coupled to the first and second internal nodes. A first input signal is provided to one of a node electrically connected to a first common node of the first port of the balun element and a node electrically connected to a second internal node.

According to a fourth aspect of the present invention, the mixer circuit is connected between the first signal output node and the first common node, and has its control electrode node connected to the first input node receiving the second input signal. A first transistor connected to a second output node connected between the second output node and the first common node and having a control electrode node connected to a second input node receiving a reference signal for comparison with the second input signal; Transistors and
A third transistor connected between the first signal output node and the second common node and having its control electrode node connected to the second input node;
A fourth transistor connected between the common node and a control electrode node connected to the first input node; and a fourth transistor connected between the first common node and the first internal node and connected to the control electrode node. A fifth transistor receiving a bias voltage of a constant voltage level, a sixth transistor connected between the second common node and the second internal node and receiving a bias voltage at its gate, and a first internal node Element having a first port coupled to the first port and a second port coupled to the second internal node, and causing the second port to generate a current in which the phase of the current flowing through the first port is inverted at the second port And

A first input signal is applied to one of a node electrically connected to the first internal node of the first port of the balun element and a node electrically connected to the fixed potential node.

In the mixer circuit according to the fifth aspect, the comparison reference signal of the first input signal according to the first or second aspect is a constant bias voltage.

According to a sixth aspect of the present invention, the comparison reference signal of the second input signal according to any one of the first to fourth aspects is an input signal complementary to the second input signal or a constant bias voltage.

According to a seventh aspect of the present invention, there is provided a mixer circuit comprising: a first differential stage for amplifying a first input signal; and a first and a second differential stage for differentially amplifying a second input signal in a mutually complementary manner. In a Gilbert cell type mixer circuit in which a second differential stage having a circuit is coupled between a signal output node and a node receiving a fixed potential, between the first differential stage and the second differential stage or the second differential stage. A balun is connected between one differential stage and a fixed potential node receiving a fixed potential. This balun is connected to the first port and the second port.
And has a characteristic of causing a phase inversion current of a current flowing through the first port to flow to the second port.
A current corresponding to the first input signal at the port of the second differential stage, thereby generating a complementary current at the current source nodes of the first and second differential circuits of the second differential stage. is there.

By using the balun element to generate a complementary current corresponding to the first input signal, there is no need to differentially amplify the first input signal as a complementary signal using an emitter differential pair. The need for a constant current source, which is a current source in amplification, is eliminated. This eliminates the need for a voltage difference for operating the constant current source in the mixer circuit, which allows the power supply voltage of the mixer circuit to be reduced accordingly, and operates stably at a low power supply voltage while suppressing a decrease in conversion gain. Can be done.

[0029]

[First Embodiment] FIG. 1 is a diagram showing a configuration of a mixer circuit according to a first embodiment of the present invention. In FIG. 1, the mixer circuit includes an input node 2a
Differential pair circuit 10 for differentially amplifying complementary input signals INT2 + and INT2- applied to output nodes 2a and 2b, and driving output nodes 3a and 3b in accordance with the result of the differential amplification, and complementary to this emitter differential pair circuit. Differential amplifier 20 for performing differential amplification operation and driving output nodes 3a and 3b according to input signals IN2 + and IN2-, and input signal I applied to input node 1.
Emitter differential pair 30 for differentially amplifying N1 and bias voltage Bias, and balun Mm connected between emitter common node (current source node) of emitter differential pairs 10 and 20 and emitter differential pair 30 including.

Emitter differential pair 10 is connected between output node 3a and common emitter node A, and has a control electrode node (base) connected to input node 2a receiving input signal IN2 +.
And an NPN bipolar transistor Q2 connected between output node 3b and emitter common node A and having its control electrode node connected to input node 2b receiving complementary input signal IN2-. The emitter differential pair 10 has a function according to the amount of current discharged through the common emitter node A.
Differentially amplify the complementary input signals IN2 + and IN2-,
A current difference (differential current) corresponding to the result of the differential amplification is generated at output nodes 3a and 3b.

Emitter differential pair 20 is connected between output node 3a and common emitter node B and has an NPN bipolar transistor Q3 whose control electrode node is connected to input node 2b, output node 3b and common emitter node B. Bipolar transistor Q having its control electrode node connected to input node 2a.
4 inclusive. This emitter differential pair 20 has a complementary input signal I
N2 + and IN2- are differentially amplified in a manner complementary to the emitter differential pair 10.

The collectors of bipolar transistors Q1 and Q3 are connected to output node 3a, and the collectors of bipolar transistors Q2 and Q4 are connected to output node 3b. Emitter common nodes A and B
, A differential current flows as described in detail later.
Therefore, the amount of discharge current of output nodes 3a and 3b is determined according to the amount of current that can be discharged via common emitter nodes A and B.

Emitter differential pair 30 is connected between first internal node 4a and a ground node receiving a fixed ground potential, and its control electrode node is connected to input node 1 receiving input signal IN1. NPN bipolar transistor Q5, connected between internal node 4b and the ground node, and having its control electrode node connected to bias voltage Bias
Receiving NPN bipolar transistor Q6. The emitter differential pair 30 includes a bipolar transistor Q5
And Q6 have their emitters connected in common, and drive internal nodes 4a and 4b according to the voltage difference between input signal IN1 and bias voltage Bias.

The balun (mutual inductance) Mm is connected to a first port Mma connected between the common emitter node A and the internal node 4a and a second port Mma connected between the common emitter node B and the internal node 4b. Mmb.
The balun Mm is generally used for impedance matching when connecting a balanced line such as two parallel lines and an unbalanced line such as a coaxial line. This balun Mm
Indicates that each of the first ports Mma and Mmb includes a spiral circuit (inductance), and the first port Mma
Phase of the current flowing through
A current (deviation) is generated at the second port Mmb. Therefore, balun Mm generates a voltage at internal node 4b in which the polarity of the voltage on internal node 4a is inverted. Here, the input signals IN1 and IN2 + and IN2- are
It is a small amplitude signal, based on the bias point of each signal,
Consider its polarity. Next, the operation of the mixer circuit shown in FIG. 1 will be described.

Assume that the balun Mm is an ideal balun having a coupling coefficient of 1. In this case, the balun Mm generates a current having the same magnitude and a reversed phase (the sign is reversed), so that the current component i flowing through the common emitter nodes A and B is generated.
A and iB are given by the following equations.

IA = IEE + K.iIN1 iB = IEE-K.iIN1 Here, K indicates a current amplification factor of the bipolar transistor Q5, IEEE indicates a bias current by the bias voltage Bias, and iIN1 indicates a bias current of the input signal IN1. It is a current component. In other words, bipolar transistor Q5 receives current component iIN1 of input signal IN1 as a base current and performs a current amplification operation to generate a collector current of K · iIN1 at internal node 4a. The balun Mm generates a reverse-phase current of the collector current at the node 4b.

The input signals IN1 and IN2 (IN2 + and IN2-) are signals having frequencies f1 and f2, respectively. Current component i flowing through common emitter node A
A as an operating current, the emitter differential pair 10 differentially amplifies the complementary input signals IN2 + and IN2-, and the emitter differential pair 20 generates a complementary input signal using the current component iB flowing through the common emitter node B as the operating current. IN2 + and I
N2- is differentially amplified. By the balun Mm, the current component i
A and iB are currents complementary to each other based on the bias current IEE, and a differential current flows through the common emitter nodes A and B. That is, complementary input signals are obtained at common emitter nodes A and B. Therefore, the input current amplitude can be doubled by the differential input current generated by the balun Mm, and the mixer operation represented by the following equation is executed in the emitter differential pairs 10 and 20.

IC1 = (IEEE + K · iIN1) / (1 + exp (−VIN2 / VT)) (15) iC2 = (IEEE + K · iIN1) / (1 + exp (+ VIN2 / VT)) (16) iC3 = (IEEE-K) IN1) / (1 + exp (VIN2 / VT)) (17) iC4 = (IEEE-KiIN1) / (1 + exp (-VIN2 / VT)) (18)

[0039]

(Equation 1)

Here, VIN2 = (IN2 +)-(IN
Ic1, ic2, ic3 and ic4, which are 2-) and indicate the voltage amplitude of the differential signal of the input signal IN2, indicate the respective collector currents of the bipolar transistors Q1, Q2, Q3 and Q4.

In equation (19), the above-described approximation equation (1)
By using 3), the following equation is obtained.

(OUT +) − (OUT−) 〜2 · K · iIN1 · (VIN2 / 2 · VT) (20) That is, the differential current (OUT +) − (OUT−) flowing through the output nodes 3a and 3b is , Input signals IN1 and IN2.

Emitter common node A using balun Mm
By generating the differential currents iA and iB in B and B, a coefficient of 2 is obtained in equation (20), and a decrease in conversion gain can be suppressed. When the balun Mm is not used, the current iA changes according to the input signal IN1, and the current iB becomes a constant bias current.
The coefficient 2 in 0) disappears, and the conversion gain decreases.
Further, the balun Mm is a mutual inductor such as a so-called spiral network, and is composed of a simple inductance. The voltage drop due to the impedance component can be almost ignored, and the minimum required operating voltage region for stable operation is substantially equivalent. Does not exist.

The mixer circuit shown in FIG. 1 differs from the configuration of the conventional Gilbert cell type mixer circuit shown in FIG. 6 in that a constant current source is not required. There is no need to secure between the moving pair 30 and the ground node, and stable operation can be achieved even when the power supply voltage for operating this mixer circuit is reduced. The reason why this constant current source is unnecessary is that the input signal IN1 and the bias voltage Bia
This is because a differential current is generated by the balun Mm as compared with the differential signal s, and it is not required to generate a differential current by the differential input signals IN1 + and IN1-.

As described above, according to the first embodiment of the present invention, a complementary current (differential current) is generated between the differential stage driving the output node and the differential stage receiving the first input signal. Since a balun is inserted, a constant current source is not required, and a mixer circuit that stably performs a mixing operation under a low power supply voltage while suppressing a decrease in conversion efficiency can be obtained.

[Second Embodiment] FIG. 2 shows a structure of a mixer circuit according to a second embodiment of the present invention. In the mixer circuit shown in FIG. 2, the configuration shown in FIG.
The positions of the balun Mm and the emitter differential pair 30 are exchanged. That is, in the emitter differential pair 30, the bipolar transistor Q5 has the collector connected to the emitter differential pair 10
, The emitter is connected to the internal node 5a, and the control electrode node is connected to the input signal I.
Connected to input node 1 receiving N1. Bipolar transistor Q6 has a collector connected to common emitter node B of emitter differential pair 20, an emitter connected to internal node 5b, and a bias voltage B
Receive ias.

Balun Mm is connected between a first port Mma coupled between internal node 5a and the ground node and internal node 5m.
b and a second port Mmb coupled between ground and the ground node. The balun Mm generates a current having a phase opposite to that of the current flowing through the first port Mma at the second port Mmb, and generates a signal at the internal node 5b having a voltage obtained by inverting the polarity of the voltage at the internal node 5a.

When the voltage level of input signal IN1 applied to the control electrode node of bipolar transistor Q5 becomes higher than bias voltage Bias, the current flowing through bipolar transistor Q5 increases, and accordingly, the first current of balun Mm increases. The current flowing through the port Mma increases. The current having a phase opposite to that of the first port Mma (a current having a phase shifted by 180 °) flows to the second port Mmb, and the current flowing through the bipolar transistor Q6 is reduced.

Therefore, also in this case, bipolar transistors Q5 and Q5 are formed by balun Mm.
6, the collector currents of bipolar transistors Q5 and Q6, that is, currents iA and i flowing through common emitter nodes A and B, respectively.
B is a bias current IEEE by the bias voltage Bias.
Can be used as a differential current. Assuming that the base currents of bipolar transistors Q5 and Q6 are negligible compared to the collector current and the emitter current (collector current and emitter current are substantially equal), differential currents of the same magnitude as the above currents iA and iB Flows through emitter common nodes A and B, and therefore, the same operation as the mixer circuit of the first embodiment shown in FIG. 1 is performed also in mixer circuit shown in FIG. 2, and the difference between output currents OUT + and OUT- is reduced. , Is proportional to the multiplication of the input signals IN1 and IN2.

In the mixer circuit shown in FIG.
First port Mma and second port Mmb of balun Mm
Are the bipolar transistors Q5 and Q6, respectively.
Connected to the emitter. These ports Mma and Mmb are spiral circuits and have inductance. Therefore, these first and second ports Mma and Mmb are connected to bipolar transistor Q5.
Function as an inductance element for giving emitter negative feedback to Q6 and Q6 (impedance increases in a high-frequency region), reduce power gain in the high-frequency region of bipolar transistors Q5 and Q6, improve the linearity of their response characteristics, Differential current iA proportional to signal IN1
And iB can be generated accurately.

[Third Embodiment] FIG. 3A shows a structure of a mixer circuit according to a third embodiment of the present invention. In the mixer circuit shown in FIG. 3A, a bias voltage Bia is commonly applied to control electrode nodes of bipolar transistors Q5 and Q6 whose emitters are grounded.
s is given.

The balun Mm is connected between an internal node 6a where the first port Mma is electrically connected to the common emitter node A of the emitter differential pair 10 and an internal node 7a which is electrically connected to the collector of the bipolar transistor Q5. Internal port 6b electrically connected to the common emitter node B of the differential emitter pair 20.
And an internal node 7b electrically connected to the collector of bipolar transistor Q6. “Electrically connect” indicates that the connection is made so that a current flows, and indicates that a resistor or the like may be inserted.

Emitter differential pairs 10 and 20 have the same structure as those shown in FIGS. 1 and 20, respectively. Bipolar transistors Q1 and Q2 whose emitters are commonly connected and bipolar transistors Q2 and Q2 whose emitters are commonly connected are respectively provided. Q4 is included.

In the structure shown in FIG. 3A, input signal IN1 applied to input node 1 is applied to internal node 6a. Therefore, input signal IN1 is not supplied to the control electrode node of bipolar transistor Q5, but is supplied to first port Mma of balun Mm.

In the mixer circuit shown in FIG. 3A, bipolar transistors Q5 and Q6 allow a bias current to flow according to bias voltage Bias. When input signal IN1 is at a high level, the voltage level of internal node 6a rises, a current flows through first port Mma, and the voltage level of internal node 7a also rises. Thereby, the collector potential of bipolar transistor Q5 increases, and the collector current increases. On the other hand, the voltage level of internal nodes 6b and 7b decreases in second port Mmb, contrary to the current increase by first port Mma,
The current flowing through bipolar transistor Q6 decreases. Therefore, current components iA and iB flowing through emitter common nodes A and B become differential currents according to input signal IN1. Therefore, also in FIG. 3A, the mixing operation of input signals IN1 and IN2 can be performed similarly to the mixer circuits shown in the first and second embodiments.

Here, when the voltage level of internal node 6a attains a high level, that is, when input signal IN1 is at a high level, the high level of input signal IN1 is lower than the low levels of input signals IN2 + and IN2-. Are also biased to lower voltage levels. Therefore, even when internal node 6a attains a high level, bipolar transistors Q1 and Q2 maintain a conductive state, and draw currents corresponding to complementary input signals IN2 + and IN2- from output nodes 3a and 3b. This is the same for the voltage level at node 6b.

When the internal node 6a goes high due to the input signal IN1, a current flows from the input node 1 to the first port Mma. In this case, the first node Mma is connected to the input node 1 Only the current flows from the AC. Therefore, even if input signal IN1 is directly applied to internal node 6a, the voltage level of input signal IN1 does not change, and an accurate mixing operation is realized.

In the structure shown in FIG. 3A, input signal IN1 is directly applied to internal node 6a, and the amplifying operation by bipolar transistor Q5 is not performed. Therefore, the amplification coefficient K of the bipolar transistor Q5 in the above equation (20) becomes 1, and
The nonlinearity of the output signal due to the amplifying operation of the transistor Q5 can be reduced, and the linear response characteristic of the output signal to the input signal of the entire mixer circuit can be improved.

[Modification] FIG. 3B shows a modification of the mixer circuit according to the third embodiment of the present invention.
In the mixer circuit shown in FIG. 3B, input signal IN1 is applied to internal node 7a via input node 1. Other configurations are the same as those shown in FIG. 3A, and are denoted by the same reference numerals, and detailed description thereof will be omitted.

Also in the configuration shown in FIG. 3B, when input signal IN1 attains a high level, the collector potential of bipolar transistor Q5 rises, and the first balun Mm has the first potential.
The current flowing through the port Mma increases. In response to this current increase, a current having a phase opposite to that of the current at the first port Mma flows through the second port Mmb, so that the current at the second port Mmb is reduced and the internal nodes 6b and 7
The voltage level of b decreases, and the collector current of bipolar transistor Q6 decreases accordingly. Therefore, also in this configuration, currents iA and iB at common emitter nodes A and B become differential currents according to input signal IN1, and a mixing operation can be performed. Even if the mixer circuit shown in FIG.
The same operation as the mixer circuit shown in FIG.

As described above, according to the third embodiment of the present invention, the input signal is not directly applied to the control electrode node of the bipolar transistor, but is applied directly to the node connected to the balun port. The operation of amplifying the input signal by the transistor is eliminated, the current gain K of the bipolar transistor with respect to the output differential current can be set to 1, and the non-linearity of the response to the input signal can be reduced. Accordingly, the input signals IN1 and IN2 Nonlinearity of the output current response to
A mixer circuit having excellent linearity in input / output response characteristics can be realized.

Also in the third embodiment, a constant current source for differentially amplifying an input signal is unnecessary, and a bipolar current is simply applied to bias a current flowing through the first and second ports of the balun. Transistors Q5 and Q
6 and only two differential stages are connected between the output nodes 3a and 3b and the ground node. Even under a low power supply voltage, these two differential stages are provided. The bipolar transistors Q1 to Q6 in the stages can be operated stably, and a mixer circuit that operates stably even under a low power supply voltage can be obtained.

[Fourth Embodiment] FIG. 4A shows a structure of a mixer circuit according to a fourth embodiment of the present invention. The mixer circuit shown in FIG.
And the positions of the balun Mm and the bipolar transistors 8a and 8b are exchanged. That is, the balun Mm is connected to the internal node 8a whose first port Mma is connected to the emitter of the bipolar transistor Q5.
And an internal node 9a electrically connected to a fixed potential source (ground node), and a second port Mmb is connected to internal node 8b connected to the emitter of bipolar transistor Q6 and a fixed potential source (ground node). It is connected between the internal nodes 9b that are electrically connected. Internal node 8a receives input signal IN1 via input node 1. Other configurations are the same as those shown in FIG. 3A, and corresponding portions are denoted by the same reference numerals and detailed description thereof will not be repeated.

In the mixer circuit shown in FIG. 4A as well, when input signal IN1 applied to input node 1 attains a high level, the current flowing through first port Mma is increased to set internal node 8a high. In order to attain the level, the current flowing through the bipolar transistor Q5 increases. On the other hand, since the second port Mmb flows a current 180 ° out of phase with the first port Mma, the current amount decreases due to the increase in the current of the first port Mma, and the voltage level of the internal node 8b decreases. Let it. Therefore, the current flowing through bipolar transistor Q6 decreases. As a result, the current iA flowing through the common emitter node A of the emitter differential pair 10 increases, while the current iB flowing through the common emitter node B of the differential pair 20 decreases, and these currents iA and iB become complementary currents. Become.
Here, the voltage level of the input signal IN1 is sufficiently lower than the bias voltage Bias.

The above operation occurs when the voltage level of the bias voltage Bias is set sufficiently higher than the high level of the input signal IN1. Input signals IN1 and IN
2 is biased so that the voltage level of the input signal IN1 does not exceed the voltage level of the input signal IN2 (see FIG. 3A).
Can be considered as a bias voltage for increasing the voltage level of the input signal IN2 with respect to the input signal IN1.

In the mixer circuit shown in FIG. 4A, the input signal IN1 is divided into the input signals IN2 + and IN2 +.
2-, and two transistor stages, ie, bipolar transistors Q5 and Q6 and bipolar transistor Q
1, Q2, Q3 and Q4 are separated by PN junctions, and input signals IN1 and IN2 (IN2 +, IN2 +
2-) The isolation can be sufficiently secured, crosstalk can be prevented from occurring in these input signals, and an accurate mixing operation can be performed.

[Modification] FIG. 4B shows a structure of a modification of the fourth embodiment of the present invention. This figure 4
In the mixer circuit shown in FIG.
Are coupled to input node 1 receiving input signal IN1 and to ground node via resistance element R. The resistance element R may be a load element having a function of electrically connecting the internal node 9a and the ground node. The other configuration is the same as the configuration shown in FIG. 4A, and corresponding portions are denoted by the same reference numerals.

In the structure shown in FIG. 4B, by applying input signal IN1 to internal node 9a via input node 1, the voltage level of internal node 8a changes according to the voltage level of internal node 9a. Accordingly, the current flowing through bipolar transistor Q5 changes. On the other hand, due to the mutual inductance operation of the balun Mm,
The voltage level of internal node 8b changes in the reverse direction, and the current flowing through bipolar transistor Q6 changes.
In response to the input signal IN1, mutually complementary currents iA and iB flow through the common emitter nodes A and B around the bias current IEE determined by the bias voltage Bias. For example, when the input signal IN1 is at a high level, the current flowing through the first port Mma increases to set the voltage level of the internal node 9a to a high level,
Accordingly, the current flowing through bipolar transistor Q5 increases.

By connecting load element R between internal node 9a and the ground node, input signal IN1 can be prevented from being fixed to the ground voltage level. Since the input signal IN1 is an AC signal having the frequency f1, an inductance element having a sufficiently large resistance value according to the frequency band may be used as the load element R.

In the balun Mm, the first port Mm
a through the second port Mm.
b, the amount of current flowing through the bipolar transistor Q6 is determined according to the amount of current. Therefore,
Internal node 9b may be coupled to a ground node. However, due to the symmetry of the circuit operation, a load element having the same characteristics as the load element R may be connected between the internal node 9b and the ground node.

As described above, according to the fourth embodiment of the present invention, a balun is connected between a bipolar transistor receiving a bias voltage and a ground node, and an input signal is applied to a port of the balun. The number of transistors inserted between the first and second input signals increases, the input signal isolation is improved, crosstalk can be prevented, and accurate mixing operation can be performed. it can.

The amount of current flowing through bipolar transistors Q5 and Q6 is adjusted by input signal IN1, and the amplifying operation of the transistors in bipolar transistors Q5 and Q6 is not used. Therefore, the non-linear response to the input signal of the differential current is reduced, a mixer circuit having excellent linearity can be realized, and the mixing operation can be stably performed over a wide frequency band.

[Fifth Embodiment] FIG. 5 shows a structure of a mixer circuit according to a fifth embodiment of the present invention. The mixer circuit shown in FIG. 5 is equivalent to the mixer circuit shown in FIG. 1 in which each of bipolar transistors Q1 to Q6 is replaced with an N-channel MOS transistor (metal-insulating film-semiconductor field effect transistor) M1-M6. .

A MOS transistor is a voltage-driven transistor whose drain current is determined by its gate-source voltage. When the input signal IN1 applied to the gate of the MOS transistor M5 goes high, M
The conductance of the OS transistor M5 increases,
The current flowing through the first port Mma of the balun Mm increases, while the current flowing through the second port Mmb decreases. Thereby, MOS transistors M1 and M1
Operating current iA and MO for differential pair composed of
The operating current iB for the differential pair constituted by the S transistors M3 and M4 becomes the differential current (the current level becomes symmetric with respect to the bias current).

MOS transistors M1 and M2 have their sources connected to common node A, and MOS transistors M3 and M4 have their sources connected to common node B.
It is connected to the. Complementary input signals IN2 + and IN2- applied to input nodes 2a and 2b are differentially amplified by these differential pairs to provide output nodes 3a and 3b.
Currents OUT + and OUT- are generated at b.

As shown in FIG. 5, even when a MOS transistor is used instead of a bipolar transistor, the same operation as that using a bipolar transistor is performed, except that the MOS transistor is driven by voltage. , The difference between the output currents OUT + and OUT− is
It is proportional to the result of multiplication of the input signals IN1 and IN2. M
When the OS transistors M1 to M6 operate in the saturation region, the drain current is proportional to the square of the gate-source voltage. However, MOS transistors M1 to M6
However, the threshold voltage is the same, and the threshold voltage is made sufficiently small to reduce the power supply voltage.

When a MOS transistor is used, an occupied area is small, the number of manufacturing steps is small, and the device can be manufactured inexpensively as compared with a bipolar transistor. Therefore, an inexpensive and compact mixer circuit can be realized.

[Other Application Examples] In the fifth embodiment shown in FIG. 5, the bipolar transistors Q1 to Q6 of the mixer circuit shown in FIG.
~ M6. However, FIGS.
In the mixer circuit shown in (B), the bipolar transistor can be replaced with a MOS transistor.

Further, the bipolar transistor and the MO
Instead of the S transistor, an insulated gate type field effect transistor such as a MESFET (metal-semiconductor field effect transistor) using gallium arsenide may be used.

The second input signal I2 is not necessarily the input signals I2 + and I2- which are complementary to each other, but one of the second input signal I2 may be a constant bias voltage.

[0081]

According to the first aspect of the present invention, the second input complementary to the first differential stage comprising the transistor for amplifying the first input signal and the transistor receiving the bias voltage at the control electrode node. Since a balun is provided between the first input signal and the second differential stage for differentially amplifying the signal, a constant current source for differentially amplifying the first input signal is not required, and the first and second signals are stably provided under a low power supply voltage. Mixing of the second input signal can be performed.

According to the second aspect of the present invention, a balun is provided between the transistor receiving the first input signal at the control electrode node and the transistor receiving the bias voltage at the control electrode node, and the ground node, and the balun provides the input signal. Is generated and supplied as an operating current to the differential stage for differentially amplifying the second input signal, thereby enabling low power supply voltage driving and reducing the inductance included in the balun by negative feedback. Can act as an element,
The linearity of the output signal can be improved.

According to the third aspect of the present invention, a balun circuit is provided between a transistor receiving a bias voltage at the control electrode node and a differential stage for differentially amplifying the second complementary input signal. Since the input signal is directly applied to one of the nodes of the first port, amplification of the input signal by the transistor is eliminated, and the linearity of the response of the output signal to the input signal is improved.

According to the invention of claim 4, a balun circuit is provided between the transistor receiving the bias voltage at the control electrode node and the potential node, and an input signal is supplied to the node of one port of the balun. Therefore, a transistor receiving a bias voltage at the control electrode node and a transistor receiving the control electrode receiving the second input signal are interposed between the first and second input signals, and the first and second input signals are interposed. The input signal isolation is improved.

According to the fifth aspect of the present invention, the first input signal is a non-complementary signal, and does not need to generate a differential signal and does not require differential amplification.

According to the sixth aspect of the invention, the same effect can be obtained and the versatility can be improved whether the second input signal is input as a complementary signal or a non-complementary signal.

According to the seventh aspect of the present invention, in the Gilbert cell type mixer circuit, a complementary differential current is generated using a balun in accordance with an input signal of one side input, and is used as an operating current of the second differential stage. In addition, a constant current source for differentially amplifying the first input signal becomes unnecessary, and a mixer circuit that operates stably under a low power supply voltage can be obtained.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of a mixer circuit according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a configuration of a mixer circuit according to a second embodiment of the present invention.

FIGS. 3A and 3B are diagrams showing a configuration of a mixer circuit according to a third embodiment of the present invention.

FIGS. 4A and 4B are diagrams showing a configuration of a mixer circuit according to a fourth embodiment of the present invention.

FIG. 5 is a diagram showing a configuration of a mixer circuit according to a fifth embodiment of the present invention.

FIG. 6 is a diagram showing a configuration of a conventional mixer circuit.

[Explanation of Signs] Q1 to Q6 bipolar transistors, M1 to M6 M
OS transistor, 1, 2a, 2b input node, 3
a, 3b output node, A, B emitter common node,
5a-9a, 5b-9b internal node, Mm balun,
Mma first port, Mmb second port.

Claims (7)

[Claims] A first transistor connected between a first signal output node and a first common node and having a control electrode node connected to a first input node receiving a second input signal; A second transistor connected between a second signal output node and the first common node and having a control electrode node connected to a second input node for receiving a reference signal for comparison with the second input signal; A third transistor connected between the first signal output node and a second common node and having a control electrode node connected to the second input node; and a second transistor connected to the second signal output node and the second transistor. A fourth transistor connected between two common nodes and having a control electrode node connected to the first input node, a first conduction node, and a control electrode node receiving a first input signal. A sixth transistor having at least a fifth transistor, a first conductive node, and a control electrode node receiving a comparison reference signal for the first input signal; and a sixth transistor having at least a first common node and the fifth transistor. A first port connected between a first conduction node of the transistor and a second port connected between the second common node and a first conduction node of the sixth transistor;
And a balun element that causes the second port to generate a current obtained by inverting the phase of the current flowing through the first port. 2. A first transistor connected between a first signal output node and a first common node and having a control electrode node connected to a first input node receiving a second input signal. A second transistor connected between a second signal output node and the first common node and having a control electrode node connected to a second input node receiving a comparison reference signal for the second input signal; A third transistor connected between a first signal output node and a second common node and having a gate connected to the second input node; the second signal output node and the second common node And a control electrode node connected between the first common node and a first internal node and having its control electrode node connected to the first input node. A fifth transistor receiving a first input signal at a node thereof, a fifth transistor connected between the second common node and a second internal node, and receiving at its control electrode node a comparison reference signal for the first input signal; 6 transistors, a first port coupled to the first internal node, and a second port coupled to the second internal node;
A mixer circuit, comprising: a balun element that generates a current in which the phase of a current flowing through the first port is inverted in the second port. A first transistor connected between the first signal output node and the first common node and having a control electrode node connected to a first input node receiving a second input signal; A second transistor connected between a second signal output node and the first common node and having a control electrode node connected to a second input node receiving a comparison reference signal for the second input signal; A third transistor connected between a first signal output node and a second common node and having a control electrode node connected to the second input node, the second signal output node and the second transistor A fourth transistor connected between a common node and a control electrode node connected to the first input node; a first transistor coupled between the first common node and a first internal node; And bets, the second and a common node and a second port that is coupled between the second internal node, the current of the first current flowing through the ports and the phase is inverted second
And a current source respectively coupled to the first and second internal nodes, wherein a first input signal is electrically connected to the first common node of the balun element. A mixer circuit provided to one of a node and a node electrically connected to the first internal node. A first transistor connected between the first signal output node and the first common node and having a control electrode node connected to a first input node receiving a second input signal; A second transistor connected between the second signal output node and the first common node and having a control electrode node connected to a second input node receiving a reference signal for comparison with the second input signal; A third transistor connected between one signal output node and a second common node and having a control electrode node connected to the second input node; the second signal output node and the second common node A fourth transistor connected between the first common node and a first internal node and having its control electrode node connected to the first input node; A fifth transistor receiving a bias voltage of a constant voltage level at a node, a sixth transistor connected between the second common node and a second internal node and receiving the bias voltage at its control electrode node, and A first port coupled to the first internal node; and a second port coupled to the second internal node, wherein a current obtained by inverting a phase of a current flowing through the first port is provided. A balun element to be generated at a second port, wherein a first input signal is electrically connected to the node electrically connected to the first internal node of the first port of the balun element and to the fixed potential node Mixer circuit, which is provided to one of the nodes that 5. The mixer circuit according to claim 1, wherein the signal used as a reference for comparing the first input signal is a bias voltage having a constant voltage level. 6. The signal according to claim 1, wherein the comparison reference signal for the second input signal is one of an input signal complementary to the second input signal and a fixed bias voltage. Mixer circuit. 7. A second differential circuit comprising: a first differential stage for amplifying a first input signal; and first and second differential circuits for differentially amplifying a second input signal in a mutually complementary manner. A Gilbert cell type mixer circuit in which the differential stage is coupled between a signal output node and a fixed potential source, wherein the first differential stage and the second differential stage or the first differential stage A first port and a second port are provided between an operating stage and a fixed potential node to which the fixed potential is applied, and a current obtained by inverting a phase of a current flowing through the first port is supplied to a second port.
And a balun having a characteristic of causing the first and second ports of the second differential stage to supply a complementary current according to the voltage level of the first input signal.
Wherein the current is generated at a current source node of the differential circuit.