JP2000508123A - 集積回路パッケージのi/oパッド上にはんだ玉を配置するための振動テンプレート方法 - Google Patents
集積回路パッケージのi/oパッド上にはんだ玉を配置するための振動テンプレート方法Info
- Publication number
- JP2000508123A JP2000508123A JP10532181A JP53218198A JP2000508123A JP 2000508123 A JP2000508123 A JP 2000508123A JP 10532181 A JP10532181 A JP 10532181A JP 53218198 A JP53218198 A JP 53218198A JP 2000508123 A JP2000508123 A JP 2000508123A
- Authority
- JP
- Japan
- Prior art keywords
- template
- pads
- solder balls
- integrated circuit
- circuit package
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3465—Application of solder
- H05K3/3478—Application of solder preforms; Transferring prefabricated solder patterns
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/01—Manufacture or treatment
- H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
- H10W70/093—Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
- H05K2203/0292—Using vibration, e.g. during soldering or screen printing
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/041—Solder preforms in the shape of solder balls
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/08—Treatments involving gases
- H05K2203/082—Suction, e.g. for holding solder balls or components
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
- H10W72/01215—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps forming coatings
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
- Y10T29/49144—Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
- Y10T29/49146—Assembling to base an electrical component, e.g., capacitor, etc. with encapsulating, e.g., potting, etc.
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49147—Assembling terminal to base
- Y10T29/49149—Assembling terminal to base by metal fusion bonding
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
Description
Claims (1)
- 【特許請求の範囲】 1.あるパターンで集積回路パッケージ上に配置された多数のI/Oパッド上に はんだ玉を置く方法であって、前記方法は、 前記I/Oパッドのパターンと整合する多数の開口を前記テンプレートの表面 に有する通路を備えたテンプレートを設けるステップと、 複数の前記はんだ玉を前記テンプレートの前記表面上に流し込むステップと、 前記テンプレートを振動させて、前記開口の各々にそれぞれの前記はんだ玉を 置くようにするステップと、 前記振動ステップの後に、前記通路に真空吸引力を与えながら前記テンプレー トをひっくり返すステップと、 前記ひっくり返されたテンプレート上の前記はんだ玉を前記I/Oパッドと整 列させ、その整列位置において、前記真空吸引力を前記通路から排除するステッ プとを含む、方法。 2.前記はんだ玉が丸くない、請求項1に記載の方法。 3.前記テンプレートの前記表面の前記開口が丸くない、請求項1に記載の方法 。 4.前記振動ステップが、同時に前記通路に前記真空吸引力を与えながら行なわ れる、請求項1に記載の方法。 5.前記振動ステップが、前記真空吸引力が前記通路に与えられる前に行なわれ て終了する、請求項1に記載の方法。 6.前記テンプレートが1つだけの周波数で振動する、請求項1に記載の方法。 7.前記テンプレートが多数の周波数で振動する、請求項1に記載の方法。 8.前記置くステップ時に、いくつかの余分な前記はんだ玉が前記基板表面上で 前記開口に置かれた前記はんだ玉の間に入り、前記ひっくり返すステップによっ て、前記余分なはんだ玉が前記テンプレート表面から取除かれる、請求項1に記 載の方法。 9.前記開口が、前記はんだ玉より大きな大きさから前記はんだ玉より小さな大 きさにテーパされる、請求項1に記載の方法。 10.前記テンプレートをアーム上に取付けるサブステップと、前記アーム上に 取付けることにより、前記テンプレートを旋回させて前記テンプレートをひっく り返すサブステップと、前記アームを回転させることにより、前記はんだ玉を前 記I/Oパッドに整列させるサブステップとをさらに含む、請求項1に記載の方 法。 11.前記はんだ玉の直径が5ミルから50ミルの範囲である、請求項1に記載 の方法。 12.前記テンプレートの前記表面の前記開口の合計が少なくとも200個であ る、請求項1に記載の方法。 13.前記集積回路パッケージが、前記I/Oパッドを保持するセラミック本体 を有する、請求項1に記載の方法。 14.前記集積回路パッケージが、前記I/Oパッドを保持するエポキシガラス 本体を有する、請求項1に記載の方法。
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US789,217 | 1997-01-24 | ||
| US08/789,217 US5839191A (en) | 1997-01-24 | 1997-01-24 | Vibrating template method of placing solder balls on the I/O pads of an integrated circuit package |
| US08/789,217 | 1997-01-24 | ||
| PCT/US1998/001404 WO1998033210A1 (en) | 1997-01-24 | 1998-01-22 | Vibrating template method of placing solder balls on the i/o pads of an integrated circuit package |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2000508123A true JP2000508123A (ja) | 2000-06-27 |
| JP3276374B2 JP3276374B2 (ja) | 2002-04-22 |
Family
ID=25146947
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP53218198A Expired - Fee Related JP3276374B2 (ja) | 1997-01-24 | 1998-01-22 | 集積回路パッケージのi/oパッド上にはんだ玉を配置するための振動テンプレート方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US5839191A (ja) |
| EP (1) | EP0958603A1 (ja) |
| JP (1) | JP3276374B2 (ja) |
| WO (1) | WO1998033210A1 (ja) |
Families Citing this family (59)
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|---|---|---|---|---|
| TW344092B (en) * | 1996-08-27 | 1998-11-01 | Nippon Steel Corp | Semiconductor device provided with low melting point metal bumps and process for producing same |
| US6063701A (en) * | 1996-09-14 | 2000-05-16 | Ricoh Company, Ltd. | Conductive particle transferring method |
| US5985694A (en) * | 1997-09-29 | 1999-11-16 | Motorola, Inc. | Semiconductor die bumping method utilizing vacuum stencil |
| US6237219B1 (en) * | 1998-03-05 | 2001-05-29 | Matsushita Electric Industrial Co., Ltd. | Method of mounting conductive ball |
| JP4253748B2 (ja) * | 1998-12-25 | 2009-04-15 | 澁谷工業株式会社 | 半田ボール等の供給装置 |
| US6276598B1 (en) * | 1999-07-13 | 2001-08-21 | Asm Assembly Automation Ltd. | Method and apparatus for ball placement |
| US7293567B2 (en) * | 1999-07-24 | 2007-11-13 | Allen David Hertz | Application of acoustic and vibrational energy for fabricating bumped IC die and assembly of PCA's |
| JP4143788B2 (ja) * | 1999-08-04 | 2008-09-03 | 澁谷工業株式会社 | ボールマウント装置及びマウント方法 |
| CA2416502A1 (fr) | 2000-07-18 | 2002-01-24 | Eric Pilat | Procede de fabrication de circuit integre de type montable en surface et circuit issu du procede |
| US6607118B2 (en) | 2001-04-30 | 2003-08-19 | Asm Assembly Automation Limited | Apparatus and method for ball release |
| US6739498B2 (en) * | 2001-05-17 | 2004-05-25 | Intel Corporation | Solder ball attachment system |
| TW536767B (en) * | 2002-03-01 | 2003-06-11 | Advanced Semiconductor Eng | Solder ball attaching process |
| US6883698B1 (en) * | 2002-08-16 | 2005-04-26 | High Tech Computer Corp. | Planting device for planting solder balls onto a chip |
| CN1312735C (zh) * | 2003-08-14 | 2007-04-25 | 宏达国际电子股份有限公司 | 用来将多个锡球黏着于芯片的植球装置 |
| US20050274770A1 (en) * | 2004-06-07 | 2005-12-15 | Henderson Marvin A Sr | Method for the precise and reliable placement of solid metallic and non-metallic particles |
| JP5592055B2 (ja) | 2004-11-03 | 2014-09-17 | テッセラ,インコーポレイテッド | 積層パッケージングの改良 |
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| US20090250506A1 (en) * | 2008-02-28 | 2009-10-08 | General Dynamics Advanced Information Systems | Apparatus and methods of attaching hybrid vlsi chips to printed wiring boards |
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| US20120146206A1 (en) | 2010-12-13 | 2012-06-14 | Tessera Research Llc | Pin attachment |
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| US8618659B2 (en) | 2011-05-03 | 2013-12-31 | Tessera, Inc. | Package-on-package assembly with wire bonds to encapsulation surface |
| US8813350B2 (en) | 2011-06-03 | 2014-08-26 | Seagate Technology Llc | Solder ball pattern forming |
| US8836136B2 (en) | 2011-10-17 | 2014-09-16 | Invensas Corporation | Package-on-package assembly with wire bond vias |
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| US8835228B2 (en) | 2012-05-22 | 2014-09-16 | Invensas Corporation | Substrate-less stackable package with wire-bond interconnect |
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| US8878353B2 (en) | 2012-12-20 | 2014-11-04 | Invensas Corporation | Structure for microelectronic packaging with bond elements to encapsulation surface |
| US9136254B2 (en) | 2013-02-01 | 2015-09-15 | Invensas Corporation | Microelectronic package having wire bond vias and stiffening layer |
| US9167710B2 (en) | 2013-08-07 | 2015-10-20 | Invensas Corporation | Embedded packaging with preformed vias |
| US9685365B2 (en) | 2013-08-08 | 2017-06-20 | Invensas Corporation | Method of forming a wire bond having a free end |
| US20150076714A1 (en) | 2013-09-16 | 2015-03-19 | Invensas Corporation | Microelectronic element with bond elements to encapsulation surface |
| US9263394B2 (en) | 2013-11-22 | 2016-02-16 | Invensas Corporation | Multiple bond via arrays of different wire heights on a same substrate |
| US9583456B2 (en) | 2013-11-22 | 2017-02-28 | Invensas Corporation | Multiple bond via arrays of different wire heights on a same substrate |
| US9379074B2 (en) | 2013-11-22 | 2016-06-28 | Invensas Corporation | Die stacks with one or more bond via arrays of wire bond wires and with one or more arrays of bump interconnects |
| US9583411B2 (en) | 2014-01-17 | 2017-02-28 | Invensas Corporation | Fine pitch BVA using reconstituted wafer with area array accessible for testing |
| US10381326B2 (en) | 2014-05-28 | 2019-08-13 | Invensas Corporation | Structure and method for integrated circuits packaging with increased density |
| US9646917B2 (en) | 2014-05-29 | 2017-05-09 | Invensas Corporation | Low CTE component with wire bond interconnects |
| US9412714B2 (en) | 2014-05-30 | 2016-08-09 | Invensas Corporation | Wire bond support structure and microelectronic package including wire bonds therefrom |
| US9735084B2 (en) | 2014-12-11 | 2017-08-15 | Invensas Corporation | Bond via array for thermal conductivity |
| US9888579B2 (en) | 2015-03-05 | 2018-02-06 | Invensas Corporation | Pressing of wire bond wire tips to provide bent-over tips |
| US9502372B1 (en) | 2015-04-30 | 2016-11-22 | Invensas Corporation | Wafer-level packaging using wire bond wires in place of a redistribution layer |
| US9761554B2 (en) | 2015-05-07 | 2017-09-12 | Invensas Corporation | Ball bonding metal wire bond wires to metal pads |
| US9490222B1 (en) | 2015-10-12 | 2016-11-08 | Invensas Corporation | Wire bond wires for interference shielding |
| US10490528B2 (en) | 2015-10-12 | 2019-11-26 | Invensas Corporation | Embedded wire bond wires |
| US10332854B2 (en) | 2015-10-23 | 2019-06-25 | Invensas Corporation | Anchoring structure of fine pitch bva |
| US10181457B2 (en) | 2015-10-26 | 2019-01-15 | Invensas Corporation | Microelectronic package for wafer-level chip scale packaging with fan-out |
| US10043779B2 (en) | 2015-11-17 | 2018-08-07 | Invensas Corporation | Packaged microelectronic device for a package-on-package device |
| US9659848B1 (en) | 2015-11-18 | 2017-05-23 | Invensas Corporation | Stiffened wires for offset BVA |
| US9984992B2 (en) | 2015-12-30 | 2018-05-29 | Invensas Corporation | Embedded wire bond wires for vertical integration with separate surface mount and wire bond mounting surfaces |
| CN106227946B (zh) * | 2016-07-26 | 2019-03-12 | 上海望友信息科技有限公司 | 一种pcb网板制作方法及系统 |
| US9935075B2 (en) | 2016-07-29 | 2018-04-03 | Invensas Corporation | Wire bonding method and apparatus for electromagnetic interference shielding |
| US10299368B2 (en) | 2016-12-21 | 2019-05-21 | Invensas Corporation | Surface integrated waveguides and circuit structures therefor |
| KR102078935B1 (ko) * | 2018-11-07 | 2020-02-19 | 주식회사 프로텍 | 도전성 볼 탑재 장치 |
| KR102078936B1 (ko) * | 2018-11-07 | 2020-02-19 | 주식회사 프로텍 | 도전성 볼 탑재 방법 |
| CN110578298A (zh) * | 2019-09-19 | 2019-12-17 | 常州市市政建设工程有限公司 | 一种高架桥立柱顶部混凝土浇筑工艺 |
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| JPH0795554B2 (ja) * | 1987-09-14 | 1995-10-11 | 株式会社日立製作所 | はんだ球整列装置 |
| KR940004246B1 (ko) * | 1989-09-11 | 1994-05-19 | 신닛뽕 세이데쓰 가부시끼가이샤 | Tab 테이프와 반도체칩을 접속하는 방법 및 그것에 사용하는 범프시이트와 범프 부착 tab 테이프 |
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-
1997
- 1997-01-24 US US08/789,217 patent/US5839191A/en not_active Expired - Lifetime
-
1998
- 1998-01-22 JP JP53218198A patent/JP3276374B2/ja not_active Expired - Fee Related
- 1998-01-22 WO PCT/US1998/001404 patent/WO1998033210A1/en not_active Ceased
- 1998-01-22 EP EP98904675A patent/EP0958603A1/en not_active Ceased
Also Published As
| Publication number | Publication date |
|---|---|
| EP0958603A1 (en) | 1999-11-24 |
| WO1998033210A1 (en) | 1998-07-30 |
| JP3276374B2 (ja) | 2002-04-22 |
| US5839191A (en) | 1998-11-24 |
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