JP2000514194A - マイクロプロセッサベースの集積回路のための内部テスタビリティーシステム - Google Patents

マイクロプロセッサベースの集積回路のための内部テスタビリティーシステム

Info

Publication number
JP2000514194A
JP2000514194A JP10534544A JP53454498A JP2000514194A JP 2000514194 A JP2000514194 A JP 2000514194A JP 10534544 A JP10534544 A JP 10534544A JP 53454498 A JP53454498 A JP 53454498A JP 2000514194 A JP2000514194 A JP 2000514194A
Authority
JP
Japan
Prior art keywords
controller
fault isolation
isolation system
test
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10534544A
Other languages
English (en)
Japanese (ja)
Inventor
イー. ボーデン,クレイグ
エー. マルチネズ,ミゲール
ディー. テイラー,アレクサンダー
Original Assignee
ロックウェル インターナショナル コーポレーション
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ロックウェル インターナショナル コーポレーション filed Critical ロックウェル インターナショナル コーポレーション
Publication of JP2000514194A publication Critical patent/JP2000514194A/ja
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3185Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318541Scan latches or cell details

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
JP10534544A 1997-01-17 1998-01-16 マイクロプロセッサベースの集積回路のための内部テスタビリティーシステム Pending JP2000514194A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US08/785,068 1997-01-17
US08/785,068 US5790561A (en) 1997-01-17 1997-01-17 Internal testability system for microprocessor-based integrated circuit
PCT/US1998/000819 WO1998032025A1 (fr) 1997-01-17 1998-01-16 Systeme de testabilite interne pour circuit integre base sur un microprocessorise

Publications (1)

Publication Number Publication Date
JP2000514194A true JP2000514194A (ja) 2000-10-24

Family

ID=25134362

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10534544A Pending JP2000514194A (ja) 1997-01-17 1998-01-16 マイクロプロセッサベースの集積回路のための内部テスタビリティーシステム

Country Status (4)

Country Link
US (1) US5790561A (fr)
EP (1) EP0943100A4 (fr)
JP (1) JP2000514194A (fr)
WO (1) WO1998032025A1 (fr)

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US5991898A (en) * 1997-03-10 1999-11-23 Mentor Graphics Corporation Arithmetic built-in self test of multiple scan-based integrated circuits
TW366450B (en) * 1997-03-21 1999-08-11 Matsushita Electric Industrial Co Ltd IC function block, semiconductor circuit, method of checking semiconductor circuits and the design method
US6071314A (en) * 1997-09-29 2000-06-06 Xilinx, Inc. Programmable I/O cell with dual boundary scan
US5991908A (en) * 1997-09-29 1999-11-23 Xilinx, Inc. Boundary scan chain with dedicated programmable routing
US6178534B1 (en) * 1998-05-11 2001-01-23 International Business Machines Corporation System and method for using LBIST to find critical paths in functional logic
US6424926B1 (en) * 2000-03-31 2002-07-23 Intel Corporation Bus signature analyzer and behavioral functional test method
US6618827B1 (en) * 2000-04-13 2003-09-09 Hewlett-Packard Development Company, L.P. System and method for parallel testing of IEEE 1149.1 compliant integrated circuits
US6665828B1 (en) * 2000-09-19 2003-12-16 International Business Machines Corporation Globally distributed scan blocks
US6973606B2 (en) * 2000-09-29 2005-12-06 Intel Corporation Partially distributed control mechanism for scanout incorporating flexible debug triggering
US6754867B2 (en) 2000-12-28 2004-06-22 Intel Corporation Method of determining non-accessible device I/O pin speed using on chip LFSR and MISR as data source and results analyzer respectively
US7237090B1 (en) 2000-12-29 2007-06-26 Mips Technologies, Inc. Configurable out-of-order data transfer in a coprocessor interface
US7287147B1 (en) 2000-12-29 2007-10-23 Mips Technologies, Inc. Configurable co-processor interface
US7178133B1 (en) 2001-04-30 2007-02-13 Mips Technologies, Inc. Trace control based on a characteristic of a processor's operating state
US7181728B1 (en) 2001-04-30 2007-02-20 Mips Technologies, Inc. User controlled trace records
US7185234B1 (en) * 2001-04-30 2007-02-27 Mips Technologies, Inc. Trace control from hardware and software
US7134116B1 (en) 2001-04-30 2006-11-07 Mips Technologies, Inc. External trace synchronization via periodic sampling
US7124072B1 (en) 2001-04-30 2006-10-17 Mips Technologies, Inc. Program counter and data tracing from a multi-issue processor
US7069544B1 (en) * 2001-04-30 2006-06-27 Mips Technologies, Inc. Dynamic selection of a compression algorithm for trace data
US7065675B1 (en) 2001-05-08 2006-06-20 Mips Technologies, Inc. System and method for speeding up EJTAG block data transfers
US6738939B2 (en) * 2001-05-21 2004-05-18 Intel Corporation Method and apparatus for fault tolerant and flexible test signature generator
US7231551B1 (en) * 2001-06-29 2007-06-12 Mips Technologies, Inc. Distributed tap controller
US7043668B1 (en) 2001-06-29 2006-05-09 Mips Technologies, Inc. Optimized external trace formats
GB2395302B (en) * 2002-11-13 2005-12-28 Advanced Risc Mach Ltd Hardware driven state save/restore in a data processing system
DE602004006236T2 (de) * 2003-02-18 2008-01-10 Nxp B.V. Testen von elektronischen schaltungen
US7159101B1 (en) 2003-05-28 2007-01-02 Mips Technologies, Inc. System and method to trace high performance multi-issue processors
DE10349933B4 (de) * 2003-10-24 2008-03-27 Infineon Technologies Ag Auswerteschaltung und Verfahren zum Feststellen und/oder zum Lokalisieren fehlerhafter Datenworte in einem Datenstrom
US7308630B2 (en) * 2005-02-22 2007-12-11 International Business Machines Corporation Mechanism to provide test access to third-party macro circuits embedded in an ASIC (application-specific integrated circuit)
CN100447796C (zh) * 2005-09-29 2008-12-31 上海奇码数字信息有限公司 电路状态扫描链、数据采集系统和仿真验证方法

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US4817093A (en) * 1987-06-18 1989-03-28 International Business Machines Corporation Method of partitioning, testing and diagnosing a VLSI multichip package and associated structure
US5423050A (en) * 1991-11-27 1995-06-06 Ncr Corporation Intermodule test across system bus utilizing serial test bus
JP2553292B2 (ja) * 1991-12-20 1996-11-13 インターナショナル・ビジネス・マシーンズ・コーポレイション 論理回路テスト装置及び方法
US5329533A (en) * 1991-12-26 1994-07-12 At&T Bell Laboratories Partial-scan built-in self-test technique
US5475694A (en) * 1993-01-19 1995-12-12 The University Of British Columbia Fuzzy multiple signature compaction scheme for built-in self-testing of large scale digital integrated circuits
US5627842A (en) * 1993-01-21 1997-05-06 Digital Equipment Corporation Architecture for system-wide standardized intra-module and inter-module fault testing
US5583786A (en) * 1993-12-30 1996-12-10 Intel Corporation Apparatus and method for testing integrated circuits
US5570375A (en) * 1995-05-10 1996-10-29 National Science Council Of R.O.C. IEEE Std. 1149.1 boundary scan circuit capable of built-in self-testing
US5633877A (en) * 1995-05-31 1997-05-27 International Business Machines Corporation Programmable built-in self test method and controller for arrays

Also Published As

Publication number Publication date
WO1998032025A1 (fr) 1998-07-23
EP0943100A4 (fr) 2002-07-10
EP0943100A1 (fr) 1999-09-22
US5790561A (en) 1998-08-04

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