JP2001237174A - Reflection-type exposure mask - Google Patents

Abstract

(57) [Problem] To improve the contrast of an EUV exposure image without adversely affecting the resolution. SOLUTION: In a reflection type exposure mask used for EUV lithography, a multilayer film 2 is formed by periodically laminating two or more material layers on a base substrate 1, and a metal containing nitride is formed on the multilayer film 2. A mask pattern 11 made of a film or a mask pattern made of a laminated structure of a metal nitride film and a metal film is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a wavelength range of 10-15.
The present invention relates to a reflective exposure mask used for EUV lithography using EUV (Extreme UltraViolet rays: extreme ultraviolet) near [nm] as a light source, and a semiconductor device manufactured by EUV lithography using the reflective exposure mask.

[0002]

2. Description of the Related Art As semiconductor devices become more highly integrated, 100
There is an urgent need to establish a new process technology that enables ultrafine processing of [nm] or less. Even in lithography technology, in order to improve the optical resolution by shortening the wavelength of the light source, an EUV having a wavelength of about 10 to 15 [nm], which is one order of magnitude shorter than that of a conventional mercury lamp or an excimer laser, is used. The development of EUV lithography that enables high resolution by using lithography has been vigorously performed.

[0003] EUV light is very remarkably absorbed by a substance, and the refractive index of the substance to EUV light is almost equal to the value of vacuum. Accordingly, the optical system of an exposure apparatus for EUV lithography includes “Precision Optics Journal Vol. 64, No. 2, page 282-2”.
86 (1998) ", a reflection optical system combining a convex mirror and a concave mirror is used. Also,
Regarding the exposure mask, in the case of a transmission type such as a glass reticle, the intensity of EUV light is significantly reduced due to absorption.
A reflection type exposure mask is used.

FIG. 10 is a sectional structural view of a conventional reflective exposure mask for EUV lithography. In the conventional reflection type exposure mask shown in FIG. 10, a multilayer film 2 is formed on a base substrate 1, and a mask pattern 3 made of a metal film is formed on the multilayer film 2. In EUV lithography, the mask pattern 3 functions as an EUV light absorption region (absorber), and the non-pattern region (the region where the mask pattern 3 is not formed, the exposed region of the multilayer film 2) 6
EUV lithography photoresist (EU) that functions as a light reflection area (reflector) and is applied to a semiconductor wafer
EUV formed on a resist having photosensitivity in the V region)
An exposure contrast is generated in the exposure image.

[0005] The multilayer film 2 functioning as a reflector has a large difference in refractive index with respect to the wavelength of EUV light in order to obtain a high reflectance with respect to EUV light which is almost perpendicularly incident on the surface of the reflective exposure mask. This is a structure in which two or more material layers are periodically laminated. The multilayer film 2 is formed such that the uppermost layer (surface layer) becomes a silicon (Si) layer 2a.
A structure in which a Si layer 2a and a molybdenum (Mo) layer 2b having different refractive indexes to UV light are periodically laminated is widely used.

The mask pattern 3 functioning as an absorber is made of a patterned metal film. As the metal film, a tantalum (Ta) film which has a high EUV light absorption and is easy to pattern is used (which is cited as a promising candidate). Note that an alloy film containing Ta (a tantalum alloy film) can be used as the above metal film (a tantalum alloy film is also being studied). Examples of the above tantalum alloy include an alloy film of Ta and germanium (Ge) (hereinafter, referred to as a Ta / Ge alloy film), and an alloy film of Ta and Si (hereinafter, Ta / Si alloy film).
Alloy film), an alloy film of Ta and boron (B) (hereinafter, referred to as a Ta / B alloy film), and the like.

FIG. 11 is a view for explaining a manufacturing process of a conventional reflective exposure mask for EUV lithography. First, as shown in FIG. 11A, a multilayer film 2 is formed on a base substrate 1 by a sputtering method or the like, and a Ta film 4 is formed as a mask pattern metal film on the multilayer film 2 by a sputtering method or a CVD method. I do. Next, FIG.
As described above, a resist is applied on the Ta film 4 and a desired resist pattern 5 is formed by exposure and development by scanning with an electron beam or a laser beam. Next, as shown in FIG. 11C, the Ta film 4 is patterned by a plasma dry etching method using the resist pattern 5 as an etching mask, and then the resist pattern 5 is removed.
A mask pattern 3 made of a Ta film 4 is formed. In addition,
In some cases, a silicon oxide film or the like is inserted between the multilayer film 2 and the Ta film 4 as a buffer layer. In this case, the buffer layer in the non-pattern region 6 is
It is removed during the patterning of the Ta film 4 in (c).

In the reflection type exposure mask manufactured as described above, the difference in the surface reflectance between the mask pattern 3 and the non-pattern area 6 is determined in the mask inspection step as to whether or not the mask pattern 3 has a desired size. It is checked whether the value is equal to or greater than a desired value. In the inspection of the reflection type exposure mask, wavelengths of 150 to 3 are used instead of EUV light.
DUV (Deep UltraViolet rays: about 50 [nm]:
The surface of the reflective exposure mask is irradiated with light in a (far-ultraviolet) region (the inspection apparatus is configured to irradiate light in the DUV region to inspect the reflective exposure mask).

FIG. 12 is a view for explaining an inspection process of a reflective exposure mask for EUV lithography. In FIG. 12, the beam spot of the incident light in the DUV region is represented by I _int , the light reflected on the surface of the mask pattern 3 is represented by R _ta with respect to the incident light I _int , and the multilayer film 2 in the non-pattern region 6 is formed.
(Here, the uppermost layer of the multilayer film 2 is made of amorphous S
The light reflected by the i-layer) is _denoted by R _si .

In the above inspection process, as shown in FIG.
The surface of the reflection type exposure mask is irradiated with light I _{int in the} UV region, and the light amount difference between the reflected light R _ta from the mask pattern 3 and the reflected light R _si from the non-pattern region 6 (hereinafter, referred to as mask contrast). And the mask contrast value M
Measure C. The mask contrast value MC is, MC [%] = is defined by _{{(R si -R ta) /} (R si + R ta)} × 100 ... (1).

[0011]

However, in the above-mentioned conventional reflection type exposure mask, since the surface reflectance of the mask pattern does not become sufficiently low, the demand for the mask contrast value cannot be sufficiently satisfied.
There is a problem that an EUV exposure image that sufficiently satisfies the contrast required in lithography cannot be obtained.
Therefore, it is desired to further improve the mask contrast and the contrast of the EUV exposure image by further reducing the surface reflectance of the mask pattern.

In general, when the surface roughness of the absorber film (metal film) of the mask pattern is large, the amount of the reflected light _Rta decreases because the DUV light I _int is irregularly reflected on the mask pattern surface. Therefore, by increasing the surface roughness of the absorber film, it is possible to increase the mask contrast and the contrast of the EUV exposure image. However, when the surface roughness of the absorber film is increased, the thickness unevenness also increases,
In a place where the film thickness is small, the absorption capacity of EUV light becomes small, which adversely affects the resolution in EUV lithography.
Therefore, it is necessary to keep the surface of the absorber film as smooth as possible and to lower the surface reflectance.

SUMMARY OF THE INVENTION The present invention has been made to solve such a conventional problem, and a reflection type exposure mask capable of improving the contrast at the time of mask inspection using DUV light without adversely affecting resolution. The purpose is to provide.

[0014]

In order to achieve the above-mentioned object, a reflection type exposure mask according to the first aspect of the present invention comprises an E-type exposure mask.
In a reflective exposure mask used for UV lithography, a mask pattern made of a metal film containing nitrogen is provided on a multilayer film formed on a substrate.

Further, in the reflection type exposure mask according to a second aspect of the present invention, the metal film containing nitrogen is a tantalum nitride film or a tantalum nitride alloy film.

According to a third aspect of the present invention, there is provided a reflection type exposure mask used for EUV lithography, wherein a nitrogen metal film and a metal film are formed on a multilayer film formed on a substrate. It has a mask pattern having a laminated structure.

According to a fourth aspect of the present invention, there is provided a reflection type exposure mask, wherein the mask pattern having a laminated structure of the nitrogen metal film and the metal film has a structure in which the nitrogen metal film is laminated on the metal film. There is a feature.

Further, in the reflection type exposure mask according to a fifth aspect of the present invention, the metal film is a tantalum film or a tantalum alloy film.

Further, in the reflection type exposure mask according to a sixth aspect of the present invention, the metal nitride film is a tantalum nitride film or a tantalum nitride alloy film.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS First Embodiment FIG. 1 is a sectional structural view of a reflective exposure mask for EUV lithography according to a first embodiment of the present invention.

As shown in FIG. 1, the reflection type exposure mask of the first embodiment forms a multilayer film 2 on a base substrate 1 and a mask pattern made of a tantalum nitride (TaN) film on the multilayer film 2. 11 is formed. The reflection type exposure mask of the first embodiment is characterized in that a mask pattern functioning as an absorber is made of a TaN film.

In EUV lithography, a mask pattern 11 made of a TaN film functions as an EUV light absorbing area (absorber), and is a non-pattern area (an area where the mask pattern 11 is not formed. The region 6 functions as a reflection region (reflector) of EUV light, and is used to expose an EUV exposure image formed on a photoresist for EUV lithography (a photoresist having sensitivity to the EUV region) applied to a semiconductor wafer. Produces contrast.

The multilayer film 2 functioning as a reflector is made of EUV
It has a structure in which two or more types of material layers whose refractive indexes with respect to the wavelength of light are greatly different from each other are periodically laminated. Here, in the multilayer film 2, a Si layer 2a and a molybdenum (Mo) layer 2b having different refractive indexes for EUV light are periodically laminated so that the uppermost layer (surface layer) becomes the silicon (Si) layer 2a. Structure.

FIG. 2 shows E according to the first embodiment of the present invention.
It is a figure explaining a manufacturing process of a reflective exposure mask for UV lithography.

First, as shown in FIG. 2A, a multilayer structure in which a Si layer 2a and a Mo layer 2b are periodically laminated on a base substrate 1 by sputtering or the like so that the Si layer 2a is the uppermost layer. The film 2 is formed. More specifically, the Mo layer 2
The structure in which the Si layer 2a is stacked on the layer b is defined as a basic periodic structure, and the above-described basic periodic structure is stacked in 30 to 40 periods. Further, the thickness of the basic periodic structure is set to be about half the wavelength of EUV light. Multilayer film 2 having such a Mo / Si structure
, A maximum reflectance of about 70 [%] is obtained for EUV light having a wavelength near 13.5 [nm].

The surface reflectance of the multilayer film 2 is almost determined by the uppermost material layer (Si layer 2a). The material layers other than the uppermost layer affect the absorptivity of the multilayer film, but hardly affect the surface reflectance of the multilayer film. For this reason, in the multilayer film 2, the Mo layer 2b
Any material layer having a different refractive index from the i-layer 2a may be used, for example, a beryllium (Be) layer.

Next, as shown in FIG. 2B, a TaN film 21 is formed on the multilayer film 2 as a mask pattern metal film. The TaN film 21 is formed by a sputtering method using a TaN target, a reactive sputtering method in which nitrogen gas is mixed when sputtering is performed using a Ta target, C
It is formed by a VD method or the like. Alternatively, TaN film 21
Is Ta formed by a sputtering method or a CVD method.
The film is formed by performing a heat treatment in a gas atmosphere such as nitrogen or ammonia or a nitriding treatment by a plasma treatment.

Next, as shown in FIG. 2C, the TaN film 21 is formed.
A resist is applied thereon, and a desired resist pattern 5 is formed by exposure and development by scanning with an electron beam or a laser beam.

Next, as shown in FIG. 2D, the TaN film 21 is patterned using the resist pattern 5 as an etching mask by a plasma dry etching method or the like.
After that, the resist pattern 5 is removed, and the TaN film 21 is removed.
Is formed.

In some cases, a silicon oxide (SiO ₂ ) film or the like is inserted between the multilayer film 2 and the TaN film 21 as a buffer layer. In this case, the buffer layer in the non-pattern region 6 is the TaN film 21 shown in FIG.
Is removed during the patterning.

The mask pattern 11 made of the TaN film 21 thus formed can have a lower surface reflectance with respect to DUV light than the conventional mask pattern made of the Ta film. Here, the above-mentioned DUV light is applied to the surface of the reflection type exposure mask for the measurement of the mask pattern size and shape during inspection of the reflection type exposure mask.
V light. Therefore, the reflective exposure mask of the first embodiment in which the mask pattern 11 made of the TaN film 21 is provided has a higher DUV light during inspection than the conventional reflective exposure mask provided with the mask pattern made of the Ta film. The mask contrast value MC can be increased.

FIG. 3 shows a Ta film and a Ta film for DUV light.
FIG. 4 is a diagram showing measured values of the surface reflectance of an N film. FIG. 3 also shows the measured values of the surface reflectivity of the Mo / Si multilayer film in which the uppermost layer is a Si layer. In FIG.
The horizontal axis is the wavelength of DUV light, and the vertical axis is the surface reflectance. This surface reflectivity is standardized by setting the surface reflectivity of the Si wafer to DUV light to 100 [%]. Also,
In FIG. 3, rms is the effective value of the surface roughness (the effective value of the surface unevenness distribution). FIG. 3 shows that the surface roughness rms =
Ta of 0.234 [nm] and 1.001 [nm]
A TaN film having a surface roughness rms = 0.482 [nm];
The measured values of the surface reflectance of the Mo / Si multilayer film having the surface roughness rms = 0.180 [nm] are shown.

As shown in FIG. 3, the surface roughness rms = 0.48
The surface reflectance of the TaN film of 2 [nm] is determined by the surface roughness rms.
= 1.001 [nm], which was lower than the surface reflectance of the Ta film. The measured value of the surface reflectivity of the multilayer film having the Be / Si structure in which the uppermost layer is the Si layer was similar to that of the multilayer film having the Mo / Si structure in FIG. Thus, the TaN film has a lower surface reflectance than the TaN film having a larger surface roughness than the TaN film. Therefore, the mask pattern 1 made of the TaN film 21
In the reflection type exposure mask of the first embodiment provided with
The mask contrast at the time of inspection using DUV light can be increased as compared with a conventional reflective exposure mask provided with a mask pattern made of a Ta film. Further, since the surface reflectance of the mask pattern can be reduced without increasing the surface roughness of the mask pattern, the resolution in EUV lithography is not adversely affected by the increase in the unevenness of the thickness of the mask pattern.

As described above, according to the reflection type exposure mask of the first embodiment, the mask pattern 1 made of a TaN film is used.
By forming 1, the surface reflectance of the mask pattern can be reduced as compared with the conventional case. Further, since the surface reflectance of the mask pattern can be reduced without increasing the surface roughness of the mask pattern, the resolution in EUV lithography is not adversely affected.

Although the TaN film is used as the mask pattern metal film (absorber film) in the first embodiment, a tantalum alloy nitride film (tantalum nitride alloy film) can be used. is there. Examples of the tantalum nitride alloy film include a Ta / Ge alloy nitride film, a Ta / Si alloy nitride film, and a Ta / B alloy nitride film.

Second Embodiment FIG. 4 is a sectional structural view of a reflective exposure mask for EUV lithography according to a second embodiment of the present invention. In FIG. 4, the same components as those in FIG. 1 are denoted by the same reference numerals.

As shown in FIG. 4, in the reflection type exposure mask of the second embodiment, a multilayer film 2 is formed on a base substrate 1, and a Ta layer 22a and a TaN layer 22b are formed on the multilayer film 2. The mask pattern 12 made of the laminated metal film 22 is formed. In the second embodiment, the metal film 22
Is formed by subjecting a Ta film formed on the multilayer film 2 to a nitriding treatment, and has a structure in which a TaN layer 22b is provided on a surface layer, and a Ta layer 22a is provided below the TaN layer 22b.

In the metal film 22 formed by performing a nitriding process on the Ta film, the Ta film formed by the nitriding is formed.
Although the boundary between the N layer 22b and the Ta layer 22a remaining without being nitrided is not clear, the upper layer including the surface has a higher E than the Ta layer.
It is important that a TaN layer having a low reflectance with respect to UV light is present, and a Ta layer having a higher absorption capacity for EUV light than the TaN layer is present as a lower layer including the bottom surface.

FIG. 5 shows E according to the second embodiment of the present invention.
It is a figure explaining a manufacturing process of a reflective exposure mask for UV lithography. In FIG. 5, the same components as those in FIG. 2 are denoted by the same reference numerals.

First, as shown in FIG. 5A, a multilayer film 2 is formed on a base substrate 1 by sputtering or the like in the same manner as in the first embodiment.

Next, as shown in FIG. 5B, a Ta film 22c is formed as a metal film for a mask pattern on the multilayer film 2 by a sputtering method or a CVD method.

Next, as shown in FIG. 5C, the Ta film 22c
The surface of the Ta film 22c is subjected to a nitriding treatment so that T
An aN layer 22b is formed. The nitriding treatment is performed by heat treatment in a gas atmosphere such as nitrogen or ammonia, plasma treatment, or the like.

According to the steps shown in FIGS. 5B and 5C, a TaN layer 22b is provided on the surface layer.
The mask pattern metal film 22 having the Ta layer 22a under the layer b is formed.

The subsequent steps of patterning the mask pattern metal film 22 to form the mask pattern 12 made of the metal film 22 are described in FIGS.
Same as (d).

The thus formed surface layer is made of TaN.
And a Ta layer 2 under the TaN layer 22b.
The mask pattern 12 having 2a has a higher EUV light absorption capacity than the mask pattern 11 of the first embodiment made of only a TaN film (this is because the Ta layer has a higher EUV light absorption capacity than the TaN layer). Is greater than the absorption capacity for EUV light). Therefore, in the reflective exposure mask of the second embodiment provided with the mask pattern 12 having the above structure, the mask contrast can be made higher than that of the reflective exposure mask of the first embodiment.

FIG. 6 is a diagram showing measured values of the film density of the Ta film and the TaN film. As can be seen from FIG. 6, the film density of the TaN film is about ／ of the film density of the Ta film. If the absorber film (metal film for a mask pattern) absorbs EUV light at the same film thickness, a material having a lower film density becomes lower. Therefore, if the thickness is the same, the absorption capability of the TaN film for EUV light is lower than the absorption capability of the Ta film for EUV light. In the structure of the metal film 22 according to the second embodiment (see FIG. 4), by arranging the Ta layer 22a as the lower layer, it is possible to enhance the absorption capacity for EUV light, and to arrange the TaN layer 22b on the surface. DU by doing
It is possible to reduce the surface reflectance for V light.

As described above, according to the reflective exposure mask of the second embodiment, the TaN layer 22b formed by subjecting the Ta film to the nitriding treatment and the metal film 22 having the laminated structure of the TaN layer 22b are formed. By forming the mask pattern 12, the surface reflectance of the mask pattern can be further reduced as compared with the first embodiment. Also, without increasing the surface roughness of the mask pattern,
Since the surface reflectance of the mask pattern can be reduced, the resolution in EUV lithography is not adversely affected.

In the second embodiment, the Ta film is formed by nitriding and has a TaN layer as a surface layer.
Although a metal film (absorber film) having a Ta layer is used as a lower layer of the TaN layer, a TaN alloy layer is formed as a surface layer formed by nitriding the Ta alloy film. It is also possible to use a metal film having a structure having a Ta alloy layer.

Third Embodiment FIG. 7 is a sectional structural view of a reflective exposure mask for EUV lithography according to a third embodiment of the present invention. In FIG. 7, the same components as those in FIG. 4 are denoted by the same reference numerals.

As shown in FIG. 7, in the reflection type exposure mask of the third embodiment, a multilayer film 2 is formed on a base substrate 1, and a Ta film 23a and a TaN film 23b are laminated on the multilayer film 2. The mask pattern 13 made of the metal film 23 is formed. In the third embodiment, the metal film 23
Forms a Ta film 23 a on the multilayer film 2,
3a is formed by laminating a TaN film 23b on the surface 3a.
This is a structure having a Ta film 23a below the N film 23b.

In the metal film 23 formed by laminating the TaN film 23b on the Ta film 23a, it is easy to control the thickness of the Ta film 23a and the thickness of the TaN film 23b, The thickness of the TaN film 23a and the TaN film 23b can be made uniform.

FIG. 8 shows E according to the third embodiment of the present invention.
It is a figure explaining a manufacturing process of a reflective exposure mask for UV lithography. In FIG. 8, the same components as those in FIG. 2 are denoted by the same reference numerals.

First, as shown in FIG. 8A, a multilayer film 2 is formed on a base substrate 1 by a sputtering method or the like in the same manner as in the first embodiment.

Next, as shown in FIG. 8B, a Ta film 23a constituting a metal film for a mask pattern is formed on the multilayer film 2 by a sputtering method or a CVD method.

Next, as shown in FIG. 8C, the Ta film 23a
TaN film 23b constituting a mask pattern metal film thereon
Are laminated. The TaN film 23b is formed by a sputtering method using a TaN target, a reactive sputtering method in which nitrogen gas is mixed when sputtering is performed using a Ta target, a CVD method, or the like.

8B and 8C, the mask pattern metal film 23 having a structure in which the TaN film 23b is laminated on the Ta film 23a (the TaN layer 23b
And a metal film for mask pattern 23) having a Ta layer 23a under the TaN layer 23b.

The subsequent steps of patterning the mask pattern metal film 23 and forming the mask pattern 13 are the same as those shown in FIGS. 2C and 2D.

The thus-formed surface layer is made of TaN.
And a Ta film 2 under the TaN film 23b.
The mask pattern 13 having 3a has a higher EUV light absorption ability than the mask pattern 11 of the first embodiment consisting of only a TaN film. Therefore, in the reflective exposure mask of the third embodiment provided with the mask pattern 13 having the above structure, the mask contrast can be made higher than that of the reflective exposure mask of the first embodiment.

Further, a Ta / TaN laminated metal film 2 for a mask pattern having a Ta / TaN laminated structure is formed by laminating a TaN film on the Ta film.
In the third embodiment in which the third metal layer 3 is formed, the Ta film is nitrided to form a mask pattern metal film 22 in which a TaN layer is provided on the surface of the Ta film. The film thickness of the film 23a and the TaN film 23b can be easily controlled to an arbitrary value with high uniformity.
Thereby, it is possible to easily form a mask pattern having a desired EUV light absorbing ability.

As described above, the reflective exposure mask of the third embodiment has a laminated structure of the TaN film 23b and the Ta film 23a formed by laminating the TaN film 23b on the Ta film 23a. By forming the mask pattern 13 with the metal film 23, the surface reflectance of the mask pattern can be further reduced as compared with the first embodiment. Further, since the surface reflectance of the mask pattern can be reduced without increasing the surface roughness of the mask pattern, the resolution in EUV lithography is not adversely affected.

Further, the metal film 23 for the mask pattern is
Since the a / TaN laminated structure is used, the thickness of the Ta film 23a and the TaN film 23b can be easily controlled to an arbitrary value with high uniformity. A pattern can be easily formed.

Although the third embodiment uses a metal film (absorber film) having a structure in which a TaN film is laminated on a Ta film, a metal film having a structure in which a TaN film is laminated on a tantalum alloy film is used. It is also possible to use a metal film having a structure in which a tantalum nitride alloy film is stacked on a film or a Ta film, or a metal film in which a tantalum nitride alloy film is stacked on a tantalum alloy film.

Fourth Embodiment A semiconductor device according to a fourth embodiment, which will be described below, uses the reflection type exposure mask according to any of the first to third embodiments in a wafer process of a manufacturing process. It is characterized by including the used EUV lithography step. Therefore, the semiconductor device according to the fourth embodiment can be obtained by performing other steps in the wafer process (eg, a CVD process, a sputtering process, a thermal diffusion process, an ion implantation process, and a lithography process using mercury lamp light or excimer laser light). , And the assembling process are manufactured using a known technique.

FIG. 9 shows E according to the fourth embodiment of the present invention.
FIG. 3 is a diagram illustrating a UV lithography process. EU in FIG.
The V exposure apparatus is described in “Applied Physics Vol. 68, No. 5, page 520-5.
26 (1999) "(Japan Society of Applied Physics). The EUV exposure apparatus shown in FIG. 9 reduces the EUV light image reflected from the reflective mask onto a semiconductor wafer coated with a photoresist for EUV lithography (a positive or negative type photoresist having photosensitivity in the EUV region). Project the above photoresist to EU
V exposure is performed, and a vibration isolation table 51 and a chamber 52
, A substrate 53, an EUV light source 54, and reflecting mirrors 55a, 55
5b, and a light source optical system composed of
Reduction projection optical system constituted by 6b, 56c, 56d, mask scanning stage 57, and wafer scanning stage 5
8 is provided.

The anti-vibration table 51 is provided on the bottom of the chamber 52, and the substrate 53 is mounted on the anti-vibration table 51 and provided in the chamber 52. On the substrate 53, a mask scanning stage 57 and a wafer scanning stage 58 are provided. In the chamber 52, the reflection mirrors 55a and 55b constituting the light source optical system are disposed between the light source entrance 52a provided on the side surface of the chamber 52 and the mask scanning stage 57, respectively. The reflecting mirrors 56a, 56b, 56c, 56d constituting the system are:
They are arranged between the mask scanning stage 57 and the wafer scanning stage 58, respectively. The EUV light source 54
The EUV light is provided at the side surface of the chamber 52 provided with the light source entrance 52a, and the EUV light enters the chamber 52 from the light source entrance 52a.

In the EUV lithography step (EUV exposure step), the reflection type exposure mask 41 according to any one of the first to third embodiments is applied to the pattern surface (the side where the mask pattern and the non-pattern area are formed). Is set perpendicular to the mask scanning stage 57 so that the surface of the mask scanning stage 58 faces the wafer scanning stage 58. Further, the semiconductor wafer 42 coated with the photoresist for EUV lithography is set vertically on the wafer scanning stage 58 such that the resist-coated surface faces the mask scanning stage 57.

The EUV light entering the chamber 52 from the EUV light source 54 is reflected by the reflecting mirrors 55a and 55b of the light source optical system, respectively, and is incident on the pattern surface of the reflective mask 41 almost perpendicularly. In the reflective mask 41, EUV light incident on the mask pattern is absorbed by the mask pattern, and EUV light incident on the non-pattern area is reflected. Thereby, the reflective mask 41 reflects an EUV light image corresponding to the pattern area where the EUV light is incident. The EUV light image reflected by the reflective mask 41 is sequentially reflected by the reflecting mirrors 56a, 56b, 56c, and 56d of the reduction projection optical system, and the angle of view is reduced by the reduction projection optical system (for example, 10: 1 or 10: 1). 4: 1), semiconductor wafer 42
To the surface of the photoresist applied to the substrate. Thus, the photoresist on the semiconductor wafer 42 is exposed to an EUV light image obtained by reducing and projecting the pattern area of the reflective mask 41. Position of the reflection type exposure mask 41 (EUV
The pattern area where the EUV light from the light source 54 enters)
Scanning is performed by the mask scanning stage 57, and accordingly, the position of the semiconductor wafer 42 is scanned by the wafer stage 58. In this manner, the photoresist is exposed by the EUV light image formed by the pattern formed on the reflective mask 41.

The semiconductor wafer 42 after the EUV exposure has been developed, whereby a resist pattern is formed on the semiconductor wafer 42 by EUV lithography. Thereafter, the semiconductor wafer 42 on which the resist pattern is formed
On the other hand, an etching step of dry-etching an insulating film or a metal film formed below the resist pattern using the resist pattern as an etching mask, an ion implantation step using the resist pattern as an ion implantation mask, and the like are performed. Further, an assembling process including a dicing process is performed on the semiconductor wafer 42 that has completed the series of wafer processes, thereby completing the semiconductor device according to the fourth embodiment.

The reflective exposure mask according to any one of the first to third embodiments used in the EUV exposure step has a finer resist pattern (for example, having a width of 100 nm ] Can be formed with high precision. As a result, the semiconductor wafer 42 can be finely processed (for example, 100
[Nm], it is possible to increase the degree of circuit integration of the semiconductor element.

[0070]

As described above, according to the reflective exposure mask of the present invention, a mask pattern made of a tantalum nitride film, a mask pattern made of a tantalum nitride alloy film, or a metal film having a tantalum nitride layer as the uppermost layer Or a mask pattern made of a metal film having a tantalum nitride alloy layer as the uppermost layer, the surface reflectance of the mask pattern can be reduced as compared with the conventional method, thereby achieving high precision in EUV lithography. Thus, there is an effect that a fine pattern can be worked. Further, since the surface reflectance of the mask pattern can be reduced without increasing the surface roughness of the mask pattern, the resolution in EUV lithography is not adversely affected.

[Brief description of the drawings]

FIG. 1 is a sectional structural view of a reflective exposure mask for EUV lithography according to a first embodiment of the present invention.

FIG. 2 is a diagram illustrating a manufacturing process of a reflective exposure mask for EUV lithography according to the first embodiment of the present invention.

FIG. 3 is a diagram showing measured values of the surface reflectance of a Ta film and a TaN film with respect to DUV light.

FIG. 4 is a sectional structural view of a reflective exposure mask for EUV lithography according to a second embodiment of the present invention.

FIG. 5 is a diagram illustrating a manufacturing process of a reflective exposure mask for EUV lithography according to a second embodiment of the present invention.

FIG. 6 is a diagram showing measured values of the film density of a Ta film and a TaN film.

FIG. 7 is a sectional structural view of a reflective exposure mask for EUV lithography according to a third embodiment of the present invention.

FIG. 8 is a diagram illustrating a process of manufacturing a reflective exposure mask for EUV lithography according to a third embodiment of the present invention.

FIG. 9 is a diagram illustrating an EUV lithography process according to a fourth embodiment of the present invention.

FIG. 10 is a sectional structural view of a conventional reflective exposure mask for EUV lithography.

FIG. 11 is a diagram illustrating a manufacturing process of a conventional reflective exposure mask for EUV lithography.

FIG. 12 is a diagram illustrating an inspection process of a reflective exposure mask for EUV lithography.

[Explanation of symbols]

Reference Signs List 1 base substrate, 2 multilayer film, 11, 12, 13 mask pattern, 21, TaN film, 22 metal film for mask pattern, 22a Ta layer, 22bTaN layer,
22c Ta film, 23 metal film for mask pattern,
23a Ta film, 23b TaN film, 41 reflective exposure mask, 42 semiconductor wafer.

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Masashi Takahashi 1-7-12 Toranomon, Minato-ku, Tokyo Oki Electric Industry Co., Ltd. Central Research Laboratory (72) Inventor Hiromasa Hoko 4-1-1, Kamidadanaka, Nakahara-ku, Kawasaki-shi, Kanagawa F-term in Fujitsu Limited (reference) 2H095 BA07 BC05 BC11 5F046 AA23 BA05 GA03 GB01 GC05 GD01 GD10 GD16

Claims (6)

[Claims] 1. A reflection type exposure mask used in EUV lithography, comprising a mask pattern made of a metal film containing nitrogen on a multilayer film formed on a substrate. 2. The reflection type exposure mask according to claim 1, wherein the metal film containing nitrogen is a tantalum nitride film or a tantalum nitride alloy film. 3. A reflection type exposure mask used for EUV lithography, wherein a reflection type mask having a multilayer structure of a nitrogen metal film and a metal film is provided on a multilayer film laminated on a substrate. Exposure mask. 4. The reflection type exposure according to claim 3, wherein the mask pattern having a stacked structure of the nitrogen metal film and the metal film has a structure in which the nitrogen metal film is stacked on the metal film. mask. 5. The reflection type exposure mask according to claim 3, wherein the metal film is a tantalum film or a tantalum alloy film. 6. The reflective exposure mask according to claim 3, wherein the metal nitride film is a tantalum nitride film or a tantalum nitride alloy film.