JP2001237661A - Compressor circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a compressor circuit which reduces background noise at the time of no audio input on the transmitting side. SOLUTION: Concerning the compressor circuit for compressing the level of an output signal Zo(n) in respect to the level of an input signal Y(n), this circuit is provided with a divider 1 for dividing the input signal Y(n) with a dividing signal X(n) and outputting the result as a divided result signal Z(n), a level detector 2 for detecting the level of the divided result signal Z(n) and inputting this level detecting signal to the divider 1 as the dividing signal X(n), a compressor output control circuit 4 for comparing the level of the level detecting signal with a comparison ref and outputting a compressor output control signal K(n) for attenuating the output signal Zo(n) when the level is equal to or lower than comparison ref, and a multiplier for multiplying the compressor output control signal K(n) and the divided result signal Z(n).

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a compressor circuit of a compander used for a radio telephone device such as a portable telephone.

[0002]

2. Description of the Related Art In a wireless telephone device such as a cellular phone, when an audio signal is FM-modulated and transmitted to a wireless line, in order to prevent signal-to-noise (S / N ratio) deterioration in the wireless line, You are using a compander. A compander is a general term for two circuits, a compressor circuit and an expander circuit. The compressor circuit is a circuit that adjusts the signal level of audio or the like to compress the output signal level with respect to the input level.

[0003] The compressor circuit uses a signal level of a signal such as sound, for example, -20 dBv as a reference level,
Signals smaller than the reference level are amplified to approach the reference level, and signals greater than the reference level are attenuated to approach the reference level. A signal modulated by FM modulation or the like using the signal processed by the compressor circuit is output to a wireless line. By performing this processing, it is possible to prevent signal-to-noise degradation of a low-level signal in a wireless channel. In the demodulator, in order to return the demodulated signal to the original signal, the expander circuit sets a predetermined signal level, for example, -20 dBv as a reference level, and attenuates a signal smaller than this reference level so as to be a signal before the compressor input. , Are amplified so as to approach the signal level before the compressor input. Also, the compressor level of the input signal at the same level as this reference level
The expander output is output at the same signal level as the input level. The compression / expansion ratio of the input signal to the output signal with respect to the reference level of the compressor / expander circuit is 2: 1 for compression and 1: 2 for expansion. The signal ratio after passing is 1: 1.

FIG. 7 is a configuration diagram for explaining a conventional compressor circuit. In the figure, 1 is a divider, 2 is a level detector, 21 is a rectifier (ABS), 22 is a low-pass filter (LPF), and 23 is an amplifier (AMP). The divider 1 can be composed of a variable amplifier or the like. Here, a configuration suitable for digital signal processing is shown.

[0005] The compressor input signal Y (n) is divided by the output X (n) from the level detector 2 by the divider 1 to output a result Z (n). The level detector 2 outputs the output Z (n) from the divider 1
Is rectified by a rectifier 21 and output to a low-pass filter 22. The low-pass filter 22 removes a high-frequency component of the rectified signal voltage of the rectifier 21 and outputs a DC component (LPF_OUT) to the amplifier 23. The amplifier 23 is a low-pass filter 22
And outputs a division signal X (n) for division by the divider 1.

In the divider 1, the compressor input signal Y (n)
Is divided by the division signal X (n), and the result Z (n) is output (Z
(n) = Y (n) / X (n)). Here, the level where Z (n) = Y (n) is set as the compressor reference level. Therefore, the reference level of the compressor circuit can be changed by changing the amplification factor of the amplifier 23 in the level detector 2.
Here, the compressor circuit reference level is -20 dBv. Here, assuming that the input level range of the compressor circuit is the standard of a U.S. mobile phone, the reference level is +24.
7 dB to -30 dB. The noise level when no sound is input is sufficiently lower than this level. However, ambient noise is input to a microphone such as a portable device and is compressed and output by a compressor circuit. There was a drawback that I could hear.

If noise enters irregularly in a state where no sound is input, X (n) at the time when the compressor input signal Y (n) is input is given due to the time constant of the low-pass filter 22 of the level detector 2. Has a very small value, and the compressor output signal has a very large value.

As described above, in the conventional compressor circuit, even when there is no audio signal input to the compressor circuit, the low-level noise component input to the compressor circuit is applied at a ratio of 2: 1 so as to approach the compressor reference level. The data is compressed, modulated by a modulator, and sent out to a wireless line.

Further, when noise enters the compressor circuit irregularly in a state where no sound is input, the compressor input signal is determined due to the time constant of the low-pass filter 22 of the level detector 2.
Since the value of X (n) at the time when Y (n) is input is a very small value, the output signal of the compressor is extremely low due to the relationship of Z (n) = Y (n) / X (n). There is a problem that the value becomes large.

[0010] These signals are modulated by a modulator and sent out to a radio line. The demodulator demodulates the modulated wave and inputs it to an expander circuit where it is expanded at an expansion ratio of 1: 2, and the signal is restored. There was a problem that noise unnecessary for a call was also restored.

[0011]

SUMMARY OF THE INVENTION The present invention changes the compression ratio of a conventional compressor circuit at a low level to reduce the signal compression ratio when the compressor input signal is at a low level, and performs FM modulation to transmit the signal to a radio line. The purpose of this is to improve the call quality of wireless telephone devices such as mobile phones by utilizing the fact that low-level noise is lower than the transmitter-side noise level when restoring signals with the expander circuit on the demodulator side. And

In order to achieve the above object, a first compressor circuit of the present invention comprises a divider for dividing an input signal by a division signal and outputting the result as a division result signal, and detecting the level of the division result signal to obtain a level. A level detector for outputting the level detection signal as the division signal to the divider, and comparing the level of the level detection signal with a comparison value ref. A compressor output adjustment circuit for outputting a compressor output adjustment signal for attenuating the output signal, and a multiplier for multiplying the compressor output adjustment signal by the division result signal. The output from the multiplier is output as an output signal. I did it.

A second compressor circuit of the present invention is a squaring circuit for squaring and outputting the compressor output adjustment signal between the compressor output adjustment circuit and the multiplier. Is provided.

According to a third compressor circuit of the present invention, the first compressor circuit of the present invention further comprises a second comparison value pa between the level detector and the divider.
A second level comparator for outputting the comparison value paraB as the division signal when the value is smaller than raB is provided.

According to a fourth aspect of the present invention, there is provided a voltage control amplifier for amplifying an input signal in response to an input division signal and outputting the result as a division result signal, and detecting the level of the division result signal as a level detection signal. A level detector to be output, an inverter to input the level detection signal, invert the magnitude of the level detection signal, and input the divided signal to the voltage control amplifier as the division signal, and input the level detection signal to set the output level to a predetermined value or less. Has a limiter to limit the
A compressor output adjustment circuit that outputs a compressor output adjustment signal of a level limited by the limiter to attenuate the output signal; and a second voltage control amplifier that amplifies the division result signal in accordance with the compressor output adjustment signal. And the output from the second voltage controlled amplifier is output as an output signal.

[0016]

Therefore, by using the compressor circuit of the present invention, low-level noise on the transmitter side is input to the transmitter side when expanded by the expander circuit on the demodulator side by reducing the compression ratio. Since demodulation is performed at a level lower than the signal level, it is possible to reduce background noise at the time of no sound input on the transmission side.

[0017]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an embodiment of a compressor circuit according to the present invention. FIG. 1 is a configuration diagram for explaining a first embodiment of the compressor circuit. In the circuit shown in the figure, the same circuit components as those of the conventional example are denoted by the same reference numerals.

As shown in FIG. 1, 1 is a divider, 2 is a level detector, 3 is a multiplier, and 4 is a compressor output adjusting circuit. The level detector 2 includes a rectifier 21, a low-pass filter 22, and an amplifier 23. The compressor output adjustment circuit 4 includes a multiplier 41 and a level comparator 42.
The multiplier 41, the divider 1, and the multiplier 3 can be configured by a variable amplifier or the like. Here, the operation of the present invention will be described with an example of a configuration suitable for digital signal processing.

The compressor input signal Y (n) is divided by the output X (n) from the level detector 2 by the divider 1 to output a result Z (n). The level detector 2 outputs the output Z (n) from the divider 1
Is rectified by a rectifier 21 and output to a low-pass filter 22. The low-pass filter 22 removes a high-frequency component of the rectified signal voltage of the rectifier 21 and outputs a DC component (LPF_OUT) to the amplifier 23. The amplifier 23 amplifies the DC component from the low-pass filter 22 and outputs a division signal X (n) for division by the divider 1. In the divider 1, the compressor input signal
The result of dividing Y (n) by the division signal X (n) is output as Z (n) (Z (n) = Y (n) / X (n)).

Here, the level where Z (n) = Y (n) is set as the compressor reference level. Compressor output adjustment circuit 4
Is input to the multiplier 41 as an input signal of the division signal X (n) output from the level detection circuit 2. The multiplier 41 multiplies by a coefficient paraA for setting a change point for changing the operation of the compressor compression ratio 2: 1 at a low level, and a level comparison coefficient K
Find (n) (K (n) = X (n) * paraA).

The level comparison coefficient K (n) is input to the level comparator 42 and compared with the level comparison value ref. If the level comparison coefficient K (n) is greater than or equal to the level comparison value ref, the level comparison coefficient K (n) is set to 1.0 and input to the multiplier 3. When the level comparison coefficient K (n) is smaller than the level comparison value ref, the level comparison coefficient K (n) is directly input to the multiplier 3 (K (n) ≧ 1.0 then K (n) = 1.0). .

The multiplier 3 multiplies the output Z (n) from the divider 1 by the level comparison coefficient K (n) which is the output of the level comparator 42 of the compressor output adjustment circuit 4 to multiply the compressor output signal Zco (n). ) (Zco (n) = Z (n) * K (n)).

The compressor reference level is set to -20 to indicate numerically the operation result for the compressor input signal Y (n).
dBv. Also, if the input level range of the compressor circuit is set based on the US mobile phone standard as an example, the reference level will be
+24.7 dB to -30 dB. If the reference input -20dBv of the compressor input signal Y (n) is set to 1.0 and the compression ratio at a level lower than about -36dB from the reference level is changed, the operation is changed by setting paraA to 8.0. Can be.

If the compressor input level Y (n) is -36.12 dB lower than the reference level, Y (n) = 10 ^{(-32.6 / 20)}
= 0.015625, division signal: X (n) = 0.12
5, divider output: Z (n) = 0.125, level comparison coefficient: K (n) = X (n) * paraA = 0.125 * 8.0 =
1.0, compressor output: Zco (n) = Z (n) * K (n)
= 0.125 * 1.0 = 0.125. Therefore Zc
o (n) = 20 log10 (0.125) = − 18.06 dB
Up to this level, the compression ratio of the compressor circuit is 2: 1.

Below this level, the compression ratio becomes smaller. For example, if the compressor input level Y (n) is −40 ^dB lower than the reference level, Y (n) = 10 ^(−40/20) = 0.0
1, division signal: X (n) = 0.1, divider output: Z (n) = 0.1, level comparison coefficient: K (n) = X (n)
* ParaA = 0.1 * 8.0 = 0.8, compressor output: Zco (n) = Z (n) * K (n) = 0.1 * 0.8 = 0.
08. Therefore, Zco (n) = 20log10 (0.08) =
-21.94dB, which is lower than that of a normal compressor circuit.
1.94dB compressor output is reduced.

As described above, according to the present invention, the compression ratio of the low-level compressor input signal can be reduced, so that the low-level ambient noise when no voice is input or the voice signal is digitally processed to perform digital signal processing, for example. The level of the quantization noise generated by the A / D converter used to convert the value at the time of compressor output can be lower than that of a normal compressor circuit, and is lower when expanded by the expander circuit on the demodulator side. Level, so call quality is improved.

FIG. 2 shows the relationship between the input level (dB) and the output level (dB) in the compressor circuit of this embodiment. The horizontal axis represents the compressor input signal level, and the vertical axis represents the compressor output signal level.
0 (Y (n)) and 20 log10 (Zco (n)) are shown in dB.

FIG. 3 is a block diagram for explaining a second embodiment of the compressor circuit, which will be described below with reference to the drawings. In the circuit shown in the figure, the same circuit parts as in the first embodiment are denoted by the same reference numerals.

As shown in FIG. 3, the second embodiment is obtained by adding a square circuit 6 after the compressor output adjusting circuit 4 to the compressor circuit of the first embodiment. Since the description of the operation is the same as that of the first embodiment up to the compressor output adjustment circuit 4, reference is made to the first embodiment. Here, the operation after the compressor output adjustment circuit 4 will be described.

The output level comparison coefficient K (n) from the compressor output adjustment circuit 4 is K (n) ≧ 1.0then K (n) =
This input is input to the squaring circuit 6. When the squared level comparison coefficient K (n) is smaller than 1.0 before squaring, the squared level comparison coefficient K (n) becomes a smaller value because the squaring is performed, and the coefficient becomes lower at a lower level than in the first embodiment. The compression ratio becomes smaller. This is the compressor input signal Y (n)
Is lower than the reference level by -40 dB, as compared with the first embodiment.

If the compressor input signal Y (n) is -40 ^dB below the reference level, Y (n) = 10 ^{( -40/20)} = 0.0
1, division signal: X (n) = 0.1, divider output: Z (n) =
0.1, level comparison coefficient: K (n) = X (n) * paraA =
0.1 * 8.0 = 0.8, compressor output: Zco (n)
= Z (n) * K (n) ² = 0.1 * 0.64 = 0.064. Therefore, Zco (n) = 20 log10 (0.064) = − 2
3.88 dB, which is -3.8 from the ordinary compressor circuit
An attenuation value of 8 dB, twice as large as that of the first embodiment, can be obtained.

As described above, according to the present invention, since the compression ratio of the low-level compressor input signal can be made smaller than that in the first embodiment, low-level ambient noise when no voice is input or digital signal processing is performed. The level of quantization noise generated by an A / D converter used to convert an audio signal into a digital value at the time of compressor output can be made lower than that of a normal compressor circuit.
Since the level becomes lower when expanded by the expander on the demodulator side, the quality of the call can be further improved. FIG. 2 shows the relationship between the input level (dB) and the output level (dB) in the compressor circuit of this embodiment.

FIG. 4 shows a third embodiment of the compressor circuit of the present invention.
FIG. 3 is a configuration diagram for explaining the embodiment of FIG. In this embodiment,
As shown in FIG. 4, while the division signal X (n), which is the output of the level detector 2 of the first embodiment, is input to the divider 1, the second
And a circuit for receiving the output from the level detector 2 and comparing it with the comparison value paraB to generate a division signal X (n) based on the comparison result. The other parts are the same as those in the first embodiment, and a description thereof will be omitted.

When the compressor input signal Y (n) is in the non-input state “Y (n) = 0.0”, the division signal X (n) which is the output of the level detection circuit 2 is also zero output “X (n) = 0.0 ". If low-level noise is input to the compressor input signal Y (n) in this state, the output of the divider 1 outputs a very large value. When the divider 1 is configured by digital signal processing, since division by X (n) cannot be performed, exception processing is performed.
Although the maximum value represented by the output Z (n) of the divider 1 has been set, in this embodiment, the value of the division signal X (n) is compared with a reference value paraB which is a level comparator 5, and the reference value When the division signal X (n) is larger than paraB, the compressor input signal Y (n) is divided using the division signal X (n) from the level detection circuit 2 as the division signal of the divider 1. The division signal X (n) is the reference value paraB
If it is smaller, the divided signal X (n) = paraB and the compressor input signal Y (n) is divided (X (n) <paraB t
hen X (n) = paraB).

If the highest division operation level of the multiplier is set to -60 dB from the reference level, the reference value paraB becomes p
^{araB = 10 (-. 60 /} (20 * 2) is a = 0.0316 by using as the value divided signal X (n), in the case of the division signal X (n) = 0.0 In the divider 1 It is no longer necessary to perform exception processing, and the compressor input signal Y (n) is changed from the non-input state “Y (n) = 0.0” to the compressor input signal Y (n).
Even when low-level noise is input to (n), the output of the divider 1 does not output a large value.

Examples of these operations will be described below. First, when the compressor input signal Y (n) is ^{−50 dB} from the reference level, which is the case of the conventional example, Y (n) = 10 ^(−50/20)
= 0.00316, division signal of level detector 2 output: X
(n) = 0.0, division signal by second level comparator 5 Division signal after level comparison: Xb (n) = 0.0316, divider output: Z (n) = Y (n) / Xb ( n) = 0.00316 / 0.03
16 = 0.1. This value is sufficiently smaller than that of the conventional embodiment, and the output of the compressor circuit due to minute noise can be suppressed to a small value.

FIG. 5 shows a fourth embodiment of the compressor circuit of the present invention.
FIG. 4 is a configuration diagram for explaining the embodiment, and corresponds to a diagram in which the first embodiment is configured by an analog circuit. In the circuit shown in the figure, the same circuit parts as those in the conventional example are given the same numbers.

As shown in FIG. 5, 11 and 13 are voltage control amplifiers (VCA), 14 is an inverter (INV), 2 is a level detector, and 4 is a compressor output adjusting circuit. The level detector 2 has a rectifier 21, a low-pass filter 2
2, including the amplifier 23. The compressor output adjustment circuit 4 includes an amplifier 411 and a limiter 412.
1 can be constituted by a variable amplifier or the like.

FIG. 6 is a diagram showing the input-output voltage characteristics of each functional block of the compressor circuit shown in FIG. FIG. 6A shows the operation of the voltage control amplifier 11 with respect to the control voltage. FIG. 6B is a diagram showing the operation of the inverter 14, and FIG. 6C is a comprehensive operation characteristic diagram of the voltage control amplifier 11 and the inverter 14. It shows that the amplification is large when the inverter input voltage is low, and the amplification is small when the inverter input voltage is large. The operation of the level detector 2 is the same as that of the first embodiment, and the description is omitted here. FIG. 6D shows the input / output characteristics of the level detector, and FIG. 6E shows the level detector 2 and the voltage control amplifier 11. Shows the overall characteristics of

Next, the operation of the compressor output adjusting circuit 4 will be described with reference to FIG. The compressor output adjustment circuit 4 inputs the output X (n) of the level detection circuit 2 to the amplifier 411 as an input signal, and outputs an output for setting a change point for changing the operation of the compressor compression ratio 2: 1 at a low level. It is amplified and output to limiter 412 to obtain. The limiter 412 outputs the result K (n) to the voltage control amplifier 13 as a result of limiting the output of the amplifier 411 to a level at which the amplification degree of the voltage control amplifier 13 becomes 1 or more. The voltage control amplifier 13 controls the amplification of the output Z (n) of the voltage control amplifier 11 with the limiter output K (n) to obtain the compressor output Zco (n).

FIGS. 6 (f) to 6 (h) show this operation, and FIG. 6 (f) shows the input / output characteristics of the amplifier 411. In this figure, the level detector output X (n) is 8 Double and limiter 412
Output to FIG. 6 (g) is a diagram showing the operation of the limiter 412, in which the input voltage is limited and output. Here 1
It is set so that the voltage of V or more is not output. FIG. 6 (h) is a characteristic showing the overall operation characteristics of the compressor output adjustment circuit 4 and the voltage control amplifier 13, and the output Z (n) is output as a limiter output.
The output Zco (n) is obtained by inputting to the voltage controlled amplifier 13 whose amplification degree is controlled by K (n). In this figure, control is performed so that a voltage in which Z (n) is 0.8 V or less is attenuated.

As described above, according to the present invention, the compression ratio of the low-level compressor input signal can be reduced, so that the low-level ambient noise when no voice is input or the voice signal is digitally processed to perform digital signal processing, for example. The level of the quantization noise generated by the A / D converter used to convert the value at the time of compressor output can be lower than that of a normal compressor circuit, and is lower when expanded by the expander on the demodulator side. Level, so call quality is improved.

[0043]

As described in detail above, the compressor circuit of the present invention can reduce the compression ratio of low-level noise, and when the signal is expanded by the expander on the demodulator side, the signal is input on the transmitter side. Since the demodulated signal is demodulated at a level lower than the signal level, background noise at the time of no sound input on the transmitting side can be reduced. In addition, it is possible to reduce the transient response when minute noise is input to the compressor circuit when the input of the compressor circuit is in a non-signal state,
Impulsive noise of the demodulated output demodulated on the demodulator side can be reduced.

According to the present invention, the compression ratio at the low level of the conventional compressor circuit is changed, and when the compressor input signal is at the low level, the signal compression ratio is reduced and FM-modulated and sent out to the radio line to extract the demodulator side. An object of the present invention is to improve the communication quality of a wireless telephone device such as a mobile phone by utilizing the fact that low-level noise is lower than the noise level on the transmitter side when a signal is restored by a panda circuit.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a compressor circuit according to a first embodiment of the present invention.

FIG. 2 is a diagram for explaining input / output characteristics of a compressor circuit.

FIG. 3 is a configuration diagram of a compressor circuit according to a second embodiment of the present invention.

FIG. 4 is a configuration diagram of a compressor circuit according to a third embodiment of the present invention.

FIG. 5 is a configuration diagram of a compressor circuit according to a fourth embodiment in which the compressor circuit according to the first embodiment of the present invention is configured by an analog circuit.

FIG. 6 is a diagram for explaining the operation characteristics of each functional block of the compressor circuit according to the fourth embodiment.

FIG. 7 is a configuration diagram for explaining a conventional compressor circuit.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Divider, 2 ... Level detector, 3 ... Multiplier, 4 ... Compressor output adjustment circuit, 5, 42 ... Level comparator, 6 ...
Squaring circuit, 11, 13 voltage-controlled amplifier, 14 inverter, 21 rectifier, 22 low-pass filter, 23,
411: Amplifier, 412: Limiter

Claims (4)

[Claims] 1. A compressor circuit for compressing the level of an output signal with respect to the level of an input signal, wherein the divider divides the input signal by a division signal and outputs the result as a division result signal, and detects and levels the level of the division result signal. A level detector which outputs the level detection signal as the detection signal and inputs the level detection signal to the divider as the division signal; and attenuates the output signal when the level of the level detection signal is less than or equal to the comparison value. And a multiplier for multiplying the compressor output adjustment signal by the division result signal, and outputting an output from the multiplier as the output signal. A compressor circuit characterized by that: 2. The compressor circuit according to claim 1, further comprising a squaring circuit for squaring and outputting the compressor output adjustment signal between the compressor output adjustment circuit and the multiplier. Compressor circuit. 3. The compressor circuit according to claim 1, further comprising: a stage between the level detector and the divider.
A compressor circuit, comprising: a second level comparator that outputs the comparison value as the division signal when the division signal is smaller than a second comparison value. 4. A compressor circuit for compressing the level of an output signal with respect to the level of an input signal, comprising: a voltage control amplifier that amplifies the input signal in accordance with an input division signal and outputs the result as a division result signal; A level detector that detects the level of a signal and outputs the level detection signal, an inverter that inputs the level detection signal, inverts the magnitude of the level detection signal, and inputs the divided signal to the voltage control amplifier, and inputs the level detection signal. A compressor output adjustment circuit having a limiter for limiting an output level to be equal to or less than a predetermined value, and outputting a compressor output adjustment signal having a level limited by the limiter for attenuating the output signal; A second voltage controlled amplifier for amplifying a result signal in accordance with the compressor output adjustment signal. Compressor circuit for, and outputs the output from the second voltage controlled amplifier as the output signal.