JP2002203852A - 絶縁膜の形成方法及び絶縁膜 - Google Patents
絶縁膜の形成方法及び絶縁膜Info
- Publication number
- JP2002203852A JP2002203852A JP2001000627A JP2001000627A JP2002203852A JP 2002203852 A JP2002203852 A JP 2002203852A JP 2001000627 A JP2001000627 A JP 2001000627A JP 2001000627 A JP2001000627 A JP 2001000627A JP 2002203852 A JP2002203852 A JP 2002203852A
- Authority
- JP
- Japan
- Prior art keywords
- insulating film
- interlayer insulating
- bond
- forming
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/69—Inorganic materials
- H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
- H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
- H10P14/6922—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H10P14/6926—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material comprising alkyl silsesquioxane, e.g. MSQ
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
- H10P14/6516—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
- H10P14/6529—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to a gas or vapour
- H10P14/6532—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to a gas or vapour by exposure to a plasma
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
- H10P14/6516—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
- H10P14/6548—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by forming intermediate materials, e.g. capping layers or diffusion barriers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
- H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
- H10P50/286—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials
- H10P50/287—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials by chemical means
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H10W20/076—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
- H10W20/096—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by contacting with gases, liquids or plasmas
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W20/45—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
- H10W20/47—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts comprising two or more dielectric layers having different properties, e.g. different dielectric constants
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W20/45—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
- H10W20/48—Insulating materials thereof
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
- H10P14/6326—Deposition processes
- H10P14/6328—Deposition from the gas or vapour phase
- H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H10P14/6336—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
- H10P14/6326—Deposition processes
- H10P14/6342—Liquid deposition, e.g. spin-coating, sol-gel techniques or spray coating
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/69—Inorganic materials
- H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
- H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
- H10P14/6922—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
- H10W20/425—Barrier, adhesion or liner layers
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Photosensitive Polymer And Photoresist Processing (AREA)
- Drying Of Semiconductors (AREA)
- Formation Of Insulating Films (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001000627A JP2002203852A (ja) | 2001-01-05 | 2001-01-05 | 絶縁膜の形成方法及び絶縁膜 |
| US09/963,648 US20020090833A1 (en) | 2001-01-05 | 2001-09-27 | Method of forming dielectric film and dielectric film |
| US10/196,181 US6903027B2 (en) | 2001-01-05 | 2002-07-17 | Method of forming dielectric film and dielectric film |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001000627A JP2002203852A (ja) | 2001-01-05 | 2001-01-05 | 絶縁膜の形成方法及び絶縁膜 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2002203852A true JP2002203852A (ja) | 2002-07-19 |
| JP2002203852A5 JP2002203852A5 (2) | 2008-02-14 |
Family
ID=18869380
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001000627A Pending JP2002203852A (ja) | 2001-01-05 | 2001-01-05 | 絶縁膜の形成方法及び絶縁膜 |
Country Status (2)
| Country | Link |
|---|---|
| US (2) | US20020090833A1 (2) |
| JP (1) | JP2002203852A (2) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002324837A (ja) * | 2001-04-25 | 2002-11-08 | Hitachi Ltd | 半導体装置の製造方法 |
| KR100439844B1 (ko) * | 2002-07-24 | 2004-07-12 | 삼성전자주식회사 | 반도체 소자의 금속배선 형성 후의 감광막 제거방법 |
| US7172965B2 (en) | 2003-05-21 | 2007-02-06 | Rohm Co., Ltd. | Method for manufacturing semiconductor device |
| JP2008545253A (ja) * | 2005-05-10 | 2008-12-11 | ラム リサーチ コーポレーション | 通常の低k誘電性材料および/または多孔質の低k誘電性材料の存在下でのレジスト剥離のための方法 |
| US7563705B2 (en) | 2002-02-14 | 2009-07-21 | Nec Electronics Corporation | Manufacturing method of semiconductor device |
| KR100976882B1 (ko) | 2007-08-17 | 2010-08-18 | 도쿄엘렉트론가부시키가이샤 | 반도체 장치의 제조 방법 및 기억 매체 |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6759098B2 (en) * | 2000-03-20 | 2004-07-06 | Axcelis Technologies, Inc. | Plasma curing of MSQ-based porous low-k film materials |
| US6908846B2 (en) * | 2002-10-24 | 2005-06-21 | Lam Research Corporation | Method and apparatus for detecting endpoint during plasma etching of thin films |
| US7416990B2 (en) * | 2005-12-20 | 2008-08-26 | Dongbu Electronics Co., Ltd. | Method for patterning low dielectric layer of semiconductor device |
| US7553736B2 (en) * | 2006-07-13 | 2009-06-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Increasing dielectric constant in local regions for the formation of capacitors |
| US20090078675A1 (en) * | 2007-09-26 | 2009-03-26 | Silverbrook Research Pty Ltd | Method of removing photoresist |
| WO2009039551A1 (en) * | 2007-09-26 | 2009-04-02 | Silverbrook Research Pty Ltd | Method of removing photoresist |
| CN102509699B (zh) * | 2011-11-02 | 2016-05-11 | 上海华虹宏力半导体制造有限公司 | 金属层光刻胶重涂方法以及光刻方法 |
| US8871639B2 (en) | 2013-01-04 | 2014-10-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor devices and methods of manufacture thereof |
| US9685393B2 (en) * | 2013-03-04 | 2017-06-20 | The Hong Kong University Of Science And Technology | Phase-change chamber with patterned regions of high and low affinity to a phase-change medium for electronic device cooling |
| US10381322B1 (en) | 2018-04-23 | 2019-08-13 | Sandisk Technologies Llc | Three-dimensional memory device containing self-aligned interlocking bonded structure and method of making the same |
| US10879260B2 (en) | 2019-02-28 | 2020-12-29 | Sandisk Technologies Llc | Bonded assembly of a support die and plural memory dies containing laterally shifted vertical interconnections and methods for making the same |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5177588A (en) | 1991-06-14 | 1993-01-05 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device including nitride layer |
| JP3204041B2 (ja) | 1995-05-19 | 2001-09-04 | ソニー株式会社 | 絶縁膜の形成方法 |
| JPH0992717A (ja) | 1995-09-21 | 1997-04-04 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
| JPH11150101A (ja) * | 1997-11-18 | 1999-06-02 | Nec Corp | 半導体装置の製造方法 |
| JP3193335B2 (ja) * | 1997-12-12 | 2001-07-30 | 松下電器産業株式会社 | 半導体装置の製造方法 |
| JP3248492B2 (ja) | 1998-08-14 | 2002-01-21 | 日本電気株式会社 | 半導体装置及びその製造方法 |
| JP2000077410A (ja) | 1998-08-27 | 2000-03-14 | Tokyo Ohka Kogyo Co Ltd | 多層配線構造の形成方法 |
| US6207583B1 (en) * | 1998-09-04 | 2001-03-27 | Alliedsignal Inc. | Photoresist ashing process for organic and inorganic polymer dielectric materials |
| US6117782A (en) * | 1999-04-22 | 2000-09-12 | Advanced Micro Devices, Inc. | Optimized trench/via profile for damascene filling |
| US6457477B1 (en) * | 2000-07-24 | 2002-10-01 | Taiwan Semiconductor Manufacturing Company | Method of cleaning a copper/porous low-k dual damascene etch |
-
2001
- 2001-01-05 JP JP2001000627A patent/JP2002203852A/ja active Pending
- 2001-09-27 US US09/963,648 patent/US20020090833A1/en not_active Abandoned
-
2002
- 2002-07-17 US US10/196,181 patent/US6903027B2/en not_active Expired - Lifetime
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002324837A (ja) * | 2001-04-25 | 2002-11-08 | Hitachi Ltd | 半導体装置の製造方法 |
| US7563705B2 (en) | 2002-02-14 | 2009-07-21 | Nec Electronics Corporation | Manufacturing method of semiconductor device |
| KR100439844B1 (ko) * | 2002-07-24 | 2004-07-12 | 삼성전자주식회사 | 반도체 소자의 금속배선 형성 후의 감광막 제거방법 |
| US7172965B2 (en) | 2003-05-21 | 2007-02-06 | Rohm Co., Ltd. | Method for manufacturing semiconductor device |
| JP2008545253A (ja) * | 2005-05-10 | 2008-12-11 | ラム リサーチ コーポレーション | 通常の低k誘電性材料および/または多孔質の低k誘電性材料の存在下でのレジスト剥離のための方法 |
| KR100976882B1 (ko) | 2007-08-17 | 2010-08-18 | 도쿄엘렉트론가부시키가이샤 | 반도체 장치의 제조 방법 및 기억 매체 |
Also Published As
| Publication number | Publication date |
|---|---|
| US20020090833A1 (en) | 2002-07-11 |
| US20020182891A1 (en) | 2002-12-05 |
| US6903027B2 (en) | 2005-06-07 |
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