JP2003174191A5 - - Google Patents
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- JP2003174191A5 JP2003174191A5 JP2002179915A JP2002179915A JP2003174191A5 JP 2003174191 A5 JP2003174191 A5 JP 2003174191A5 JP 2002179915 A JP2002179915 A JP 2002179915A JP 2002179915 A JP2002179915 A JP 2002179915A JP 2003174191 A5 JP2003174191 A5 JP 2003174191A5
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- JP
- Japan
- Prior art keywords
- light emitting
- layer
- semiconductor light
- substrate
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 239000004065 semiconductor Substances 0.000 claims 54
- 239000000758 substrate Substances 0.000 claims 23
- 238000009792 diffusion process Methods 0.000 claims 11
- 238000000605 extraction Methods 0.000 claims 10
- 125000005842 heteroatom Chemical group 0.000 claims 10
- 238000004519 manufacturing process Methods 0.000 claims 10
- 238000005253 cladding Methods 0.000 claims 5
- 229910021478 group 5 element Inorganic materials 0.000 claims 4
- 238000000034 method Methods 0.000 claims 4
- 150000001875 compounds Chemical class 0.000 claims 2
- 238000007788 roughening Methods 0.000 claims 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims 1
- 238000000137 annealing Methods 0.000 claims 1
- 239000011347 resin Substances 0.000 claims 1
- 229920005989 resin Polymers 0.000 claims 1
- 230000003746 surface roughness Effects 0.000 claims 1
Claims (25)
前記複数の突起物における底面と側面との交差角度は、30度以上で70度以下に設定されていることを特徴とする半導体発光素子。A substrate having a main surface, a semiconductor multilayer film including a light emitting layer formed on the main surface of the substrate, and a plurality of cones provided on the light extraction surface side of the semiconductor multilayer film opposite to the substrate A surface-emitting type semiconductor light-emitting device comprising a protrusion in a shape,
The intersection angle between the bottom surface and the side surface of the plurality of protrusions is set to be 30 degrees or more and 70 degrees or less.
前記半導体多層膜の前記基板と反対側の光取り出し面が多数の凹凸形状を有するように粗面加工され、この粗面加工された面における各凹凸の頂部と底部との距離(凹凸の高さ)は、50nm以上で且つ前記発光層における発光波長λ以下に設定され、前記凹凸の周期は0.5λ以下に設定されていることを特徴とする半導体発光素子。A semiconductor light emitting device comprising: a substrate having a main surface; and a semiconductor multilayer film including a light emitting layer formed on the main surface of the substrate,
The light extraction surface opposite to the substrate of the semiconductor multilayer film is roughened so as to have a number of irregularities, and the distance between the top and bottom of each irregularity on the roughened surface (the height of the irregularities). ) Is set to 50 nm or more and a light emission wavelength λ or less in the light emitting layer, and a period of the unevenness is set to 0.5λ or less .
前記反射防止膜の各凹凸における頂部と底部との距離(凹凸の高さ)は、50nm以上で且つ前記発光層における発光波長λ以下に設定され、前記凹凸の周期は0.5λ以下に設定されていることを特徴とする半導体発光素子。A substrate having a main surface; a semiconductor multilayer film including a light emitting layer formed on the main surface of the substrate; and a light extraction surface side opposite to the substrate of the semiconductor multilayer film, wherein the surface has a plurality of surfaces A semiconductor light emitting device comprising an antireflection film roughened to have an uneven shape,
The distance between the top and bottom of each unevenness of the antireflection film (the height of the unevenness) is set to 50 nm or more and the emission wavelength λ or less in the light emitting layer, and the period of the unevenness is set to 0.5λ or less. A semiconductor light emitting element characterized by comprising:
前記反射防止膜の凹凸における頂部と底部との距離(凹凸の高さ)は、50nm以上で且つ前記発光層における発光波長λ以下に設定され、前記凹凸の周期は0.5λ以下に設定されていることを特徴とする半導体発光素子。A substrate having a main surface; a semiconductor multilayer film including a light emitting layer formed on the main surface of the substrate; and a first portion formed on the light extraction surface side of the semiconductor multilayer film opposite to the substrate. 1 and an antireflection film that is provided on the light extraction surface side of the semiconductor multilayer film in a portion excluding the first electrode and is roughened so that the surface has a number of irregularities; and A semiconductor light emitting device comprising a second electrode formed on the entire back surface side,
The distance between the top and bottom of the unevenness of the antireflection film (the height of the unevenness) is set to 50 nm or more and the emission wavelength λ or less in the light emitting layer, and the period of the unevenness is set to 0.5λ or less. A semiconductor light emitting element characterized by comprising:
前記反射防止膜の表面は多数の凹凸を有する形状に粗面加工され、粗面加工による凹凸における頂部と底部との距離(凹凸の高さ)は、50nm以上で且つ前記発光層における発光波長λ以下に設定され、前記凹凸の周期は0.5λ以下に設定されていることを特徴とする半導体発光素子。A compound semiconductor substrate of a first conductivity type, a double hetero structure part formed by forming a first conductivity type clad layer, an active layer, and a second conductivity type clad layer on the substrate, and the double hetero structure A second conductivity type current diffusion layer formed on the second conductivity type cladding layer, a second conductivity type contact layer formed on the current diffusion layer, and selectively formed on the contact layer A semiconductor light emitting device comprising: a formed upper electrode; a lower electrode formed on the back side of the substrate; and an antireflection film formed on a portion of the contact layer where the electrode is not formed. And
The surface of the antireflection film is roughened into a shape having a large number of irregularities, and the distance (height of irregularities) between the top and bottom of the irregularities by the roughening is 50 nm or more and the emission wavelength λ in the light emitting layer The semiconductor light emitting device is set as follows, and the period of the unevenness is set to 0.5λ or less .
前記半導体多層膜の光取り出し面側に位置しV族元素としてPを含む層を成長する際に、成長時のPH3 分圧を1〜20Paに設定し、成長表面に前記突起物を形成することを特徴とする半導体発光素子の製造方法。A method for manufacturing a semiconductor light emitting device according to claim 1, comprising:
When growing a layer containing P as a group V element located on the light extraction surface side of the semiconductor multilayer film, a PH3 partial pressure during growth is set to 1 to 20 Pa, and the protrusion is formed on the growth surface. A method for manufacturing a semiconductor light-emitting device.
前記半導体多層膜の光取り出し面側に位置する所定の層を、先端角が120度以下のグラインダーでランダム方向に表面を荒らすことにより、前記突起物を形成することを特徴とする半導体発光素子の製造方法。A method for manufacturing a semiconductor light emitting device according to claim 1, comprising:
The protrusion is formed by roughening the surface of the predetermined layer located on the light extraction surface side of the semiconductor multilayer film in a random direction with a grinder having a tip angle of 120 degrees or less. Production method.
前記半導体多層膜の光取り出し面側に位置しV族元素としてPを含む層を、該層のV族元素とは異なるV族元素と水素ガスを用いてアニールすることにより、前記突起物を形成することを特徴とする半導体発光素子の製造方法。A method for manufacturing a semiconductor light emitting device according to claim 1, comprising:
Forming the protrusions by annealing a layer containing P as a group V element located on the light extraction surface side of the semiconductor multilayer film using a group V element different from the group V element and hydrogen gas. A method of manufacturing a semiconductor light emitting device.
前記反射防止膜の形成に際して、該反射防止膜を塗布形成した後に、凹凸を有する金型でプレス加工することを特徴とする半導体発光素子の製造方法。A method for producing a semiconductor light emitting device according to claim 10 or 11,
A method of manufacturing a semiconductor light emitting element, wherein, when forming the antireflection film, the antireflection film is applied and formed, and then pressed with a mold having irregularities.
前記反射防止膜の形成に際して、該反射防止膜を成膜した後に、グラインダーでランダム方向に表面を荒らすことを特徴とする半導体発光素子の製造方法。A method for producing a semiconductor light emitting device according to claim 10 or 11,
A method of manufacturing a semiconductor light emitting device, wherein, when forming the antireflection film, the antireflection film is formed, and then the surface is roughened in a random direction by a grinder.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002179915A JP4098568B2 (en) | 2001-06-25 | 2002-06-20 | Semiconductor light emitting device and manufacturing method thereof |
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001191724 | 2001-06-25 | ||
| JP2001-191724 | 2001-06-25 | ||
| JP2001-297042 | 2001-09-27 | ||
| JP2001297042 | 2001-09-27 | ||
| JP2002179915A JP4098568B2 (en) | 2001-06-25 | 2002-06-20 | Semiconductor light emitting device and manufacturing method thereof |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2003174191A JP2003174191A (en) | 2003-06-20 |
| JP2003174191A5 true JP2003174191A5 (en) | 2005-09-29 |
| JP4098568B2 JP4098568B2 (en) | 2008-06-11 |
Family
ID=27347016
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002179915A Expired - Fee Related JP4098568B2 (en) | 2001-06-25 | 2002-06-20 | Semiconductor light emitting device and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP4098568B2 (en) |
Cited By (1)
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| US9431589B2 (en) | 2007-12-14 | 2016-08-30 | Cree, Inc. | Textured encapsulant surface in LED packages |
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|---|---|---|---|---|
| US9431589B2 (en) | 2007-12-14 | 2016-08-30 | Cree, Inc. | Textured encapsulant surface in LED packages |
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