JP2003174191A5 - - Google Patents

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JP2003174191A5
JP2003174191A5 JP2002179915A JP2002179915A JP2003174191A5 JP 2003174191 A5 JP2003174191 A5 JP 2003174191A5 JP 2002179915 A JP2002179915 A JP 2002179915A JP 2002179915 A JP2002179915 A JP 2002179915A JP 2003174191 A5 JP2003174191 A5 JP 2003174191A5
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主面を有する基板と、前記基板の主面上に形成された、発光層を含む半導体多層膜と、前記半導体多層膜の前記基板と反対側の光取り出し面側に設けられた複数の錐体状の突起物とを具備してなる面発光型の半導体発光素子であって、
前記複数の突起物における底面と側面との交差角度は、30度以上で70度以下に設定されていることを特徴とする半導体発光素子。
A substrate having a main surface, a semiconductor multilayer film including a light emitting layer formed on the main surface of the substrate, and a plurality of cones provided on the light extraction surface side of the semiconductor multilayer film opposite to the substrate A surface-emitting type semiconductor light-emitting device comprising a protrusion in a shape,
The intersection angle between the bottom surface and the side surface of the plurality of protrusions is set to be 30 degrees or more and 70 degrees or less.
前記半導体多層膜は活性層をクラッド層で挟んだダブルへテロ構造部を有し、このダブルへテロ構造部の前記基板と反対側のクラッド層上に透明電極が形成され、前記突起物は前記透明電極の直下のクラッド層の表面に形成されていることを特徴とする請求項1記載の半導体発光素子。  The semiconductor multilayer film has a double heterostructure part in which an active layer is sandwiched between clad layers, a transparent electrode is formed on the clad layer opposite to the substrate of the double heterostructure part, and the protrusion is 2. The semiconductor light emitting element according to claim 1, wherein the semiconductor light emitting element is formed on a surface of a cladding layer immediately below the transparent electrode. 前記半導体多層膜は活性層をクラッド層で挟んだダブルへテロ構造部を有し、このダブルへテロ構造部の前記基板と反対側のクラッド層上に電流拡散層が形成されたものであり、前記突起物は前記電流拡散層の表面に形成されていることを特徴とする請求項1記載の半導体発光素子。  The semiconductor multilayer film has a double hetero structure part in which an active layer is sandwiched between clad layers, and a current diffusion layer is formed on the clad layer opposite to the substrate of the double hetero structure part, The semiconductor light emitting device according to claim 1, wherein the protrusion is formed on a surface of the current diffusion layer. 前記活性層はInGaAlPであり、前記クラッド層はInAlPであることを特徴とする請求項2又は3記載の半導体発光素子。  4. The semiconductor light emitting device according to claim 2, wherein the active layer is InGaAlP, and the cladding layer is InAlP. 前記突起物は、円錐又は角錐であることを特徴とする請求項1〜3の何れかに記載の半導体発光素子。  The semiconductor light emitting element according to claim 1, wherein the protrusion is a cone or a pyramid. 前記光取り出し面側における前記突起物の占有面積の割合は、50%以上であることを特徴とする請求項1〜3の何れかに記載の半導体発光素子。  4. The semiconductor light emitting element according to claim 1, wherein a ratio of an area occupied by the protrusions on the light extraction surface side is 50% or more. 前記突起物は周期的に設けられており、周期は0.5μm以上であることを特徴とする請求項1〜3の何れかに記載の半導体発光素子。  The semiconductor light emitting element according to claim 1, wherein the protrusions are provided periodically, and the period is 0.5 μm or more. 前記突起物は、その90%以上が前記交差角度30度以上70度以下を満足するものであることを特徴とする請求項1〜3の何れかに記載の半導体発光素子。  4. The semiconductor light emitting device according to claim 1, wherein 90% or more of the protrusions satisfy the intersection angle of 30 degrees or more and 70 degrees or less. 主面を有する基板と、前記基板の主面上に形成された、発光層を含む半導体多層膜とを具備してなる半導体発光素子であって、
前記半導体多層膜の前記基板と反対側の光取り出し面が多数の凹凸形状を有するように粗面加工され、この粗面加工された面における各凹凸の頂部と底部との距離(凹凸の高さ)は、50nm以上で且つ前記発光層における発光波長λ以下に設定され、前記凹凸の周期は0.5λ以下に設定されていることを特徴とする半導体発光素子。
A semiconductor light emitting device comprising: a substrate having a main surface; and a semiconductor multilayer film including a light emitting layer formed on the main surface of the substrate,
The light extraction surface opposite to the substrate of the semiconductor multilayer film is roughened so as to have a number of irregularities, and the distance between the top and bottom of each irregularity on the roughened surface (the height of the irregularities). ) Is set to 50 nm or more and a light emission wavelength λ or less in the light emitting layer, and a period of the unevenness is set to 0.5λ or less .
主面を有する基板と、前記基板の主面上に形成された、発光層を含む半導体多層膜と、前記半導体多層膜の前記基板と反対側の光取り出し面側に設けられ、表面が複数の凹凸形状を有するように粗面加工された反射防止膜とを具備してなる半導体発光素子であって、
前記反射防止膜の各凹凸における頂部と底部との距離(凹凸の高さ)は、50nm以上で且つ前記発光層における発光波長λ以下に設定され、前記凹凸の周期は0.5λ以下に設定されていることを特徴とする半導体発光素子。
A substrate having a main surface; a semiconductor multilayer film including a light emitting layer formed on the main surface of the substrate; and a light extraction surface side opposite to the substrate of the semiconductor multilayer film, wherein the surface has a plurality of surfaces A semiconductor light emitting device comprising an antireflection film roughened to have an uneven shape,
The distance between the top and bottom of each unevenness of the antireflection film (the height of the unevenness) is set to 50 nm or more and the emission wavelength λ or less in the light emitting layer, and the period of the unevenness is set to 0.5λ or less. A semiconductor light emitting element characterized by comprising:
主面を有する基板と、前記基板の主面上に形成された、発光層を含む半導体多層膜と、前記半導体多層膜の前記基板と反対側の光取り出し面側に部分的に形成された第1の電極と、前記半導体多層膜の光取り出し面側に前記第1の電極を除く部分に設けられ、表面が多数の凹凸形状を有するように粗面加工された反射防止膜と、前記基板の裏面側の全面に形成された第2の電極とを具備してなる半導体発光素子であって、
前記反射防止膜の凹凸における頂部と底部との距離(凹凸の高さ)は、50nm以上で且つ前記発光層における発光波長λ以下に設定され、前記凹凸の周期は0.5λ以下に設定されていることを特徴とする半導体発光素子。
A substrate having a main surface; a semiconductor multilayer film including a light emitting layer formed on the main surface of the substrate; and a first portion formed on the light extraction surface side of the semiconductor multilayer film opposite to the substrate. 1 and an antireflection film that is provided on the light extraction surface side of the semiconductor multilayer film in a portion excluding the first electrode and is roughened so that the surface has a number of irregularities; and A semiconductor light emitting device comprising a second electrode formed on the entire back surface side,
The distance between the top and bottom of the unevenness of the antireflection film (the height of the unevenness) is set to 50 nm or more and the emission wavelength λ or less in the light emitting layer, and the period of the unevenness is set to 0.5λ or less. A semiconductor light emitting element characterized by comprising:
前記半導体多層膜は活性層をクラッド層で挟んだダブルへテロ構造部を有し、このダブルへテロ構造部の前記基板と反対側のクラッド層上に透明電極が形成され、前記透明電極の直下のクラッド層の表面が粗面加工されていることを特徴とする請求項9記載の半導体発光素子。  The semiconductor multilayer film has a double heterostructure part in which an active layer is sandwiched between clad layers, and a transparent electrode is formed on the clad layer on the opposite side of the double heterostructure part from the substrate. 10. The semiconductor light emitting device according to claim 9, wherein the surface of the clad layer is roughened. 前記半導体多層膜は活性層をクラッド層で挟んだダブルへテロ構造部を有し、このダブルへテロ構造部の前記基板と反対側のクラッド層上に電流拡散層が形成されたものであり、前記電流拡散層の表面が粗面加工されていることを特徴とする請求項9記載の半導体発光素子。  The semiconductor multilayer film has a double hetero structure part in which an active layer is sandwiched between clad layers, and a current diffusion layer is formed on the clad layer opposite to the substrate of the double hetero structure part, The semiconductor light emitting device according to claim 9, wherein a surface of the current diffusion layer is roughened. 前記半導体多層膜は活性層をクラッド層で挟んだダブルへテロ構造部を有し、このダブルへテロ構造部の基板と反対側のクラッド層上に電流拡散層が形成されていることを特徴とする請求項10記載の半導体発光素子。  The semiconductor multilayer film has a double hetero structure part in which an active layer is sandwiched between clad layers, and a current diffusion layer is formed on a clad layer opposite to the substrate of the double hetero structure part. The semiconductor light emitting device according to claim 10. 前記半導体多層膜は活性層をクラッド層で挟んだダブルへテロ構造部を有し、このダブルへテロ構造部の前記基板と反対側のクラッド層上に電流拡散層が形成されたものであり、前記第1の電極及び反射防止膜は前記電流拡散層の表面に形成されていることを特徴とする請求項11記載の半導体発光素子。  The semiconductor multilayer film has a double hetero structure part in which an active layer is sandwiched between clad layers, and a current diffusion layer is formed on the clad layer opposite to the substrate of the double hetero structure part, 12. The semiconductor light emitting device according to claim 11, wherein the first electrode and the antireflection film are formed on a surface of the current diffusion layer. 前記活性層はInGaAlPであり、前記クラッド層はInAlPであることを特徴とする請求項12〜15の何れかに記載の半導体発光素子。  The semiconductor light emitting element according to claim 12, wherein the active layer is InGaAlP, and the cladding layer is InAlP. 前記反射防止膜の屈折率は、前記半導体多層膜の光取り出し面側に充填する透明樹脂よりも高く、且つ前記半導体多層膜の最上層よりも低く設定されていることを特徴とする請求項10又は11記載の半導体発光素子。  11. The refractive index of the antireflection film is set higher than the transparent resin filling the light extraction surface side of the semiconductor multilayer film and lower than the uppermost layer of the semiconductor multilayer film. Or a semiconductor light emitting device according to 11; 第1導電型の化合物半導体基板と、前記基板上に第1導電型のクラッド層,活性層,及び第2導電型のクラッド層を形成してなるダブルへテロ構造部と、前記ダブルへテロ構造部の第2導電型クラッド層上に形成された第2導電型の電流拡散層と、前記電流拡散層上に形成された第2導電型のコンタクト層と、前記コンタクト層上に選択的に形成された上部電極と、前記基板の裏面側に形成された下部電極と、前記コンタクト層上で前記電極が形成されてない部分に形成された反射防止膜とを具備してなる半導体発光素子であって、
前記反射防止膜の表面は多数の凹凸を有する形状に粗面加工され、粗面加工による凹凸における頂部と底部との距離(凹凸の高さ)は、50nm以上で且つ前記発光層における発光波長λ以下に設定され、前記凹凸の周期は0.5λ以下に設定されていることを特徴とする半導体発光素子。
A compound semiconductor substrate of a first conductivity type, a double hetero structure part formed by forming a first conductivity type clad layer, an active layer, and a second conductivity type clad layer on the substrate, and the double hetero structure A second conductivity type current diffusion layer formed on the second conductivity type cladding layer, a second conductivity type contact layer formed on the current diffusion layer, and selectively formed on the contact layer A semiconductor light emitting device comprising: a formed upper electrode; a lower electrode formed on the back side of the substrate; and an antireflection film formed on a portion of the contact layer where the electrode is not formed. And
The surface of the antireflection film is roughened into a shape having a large number of irregularities, and the distance (height of irregularities) between the top and bottom of the irregularities by the roughening is 50 nm or more and the emission wavelength λ in the light emitting layer The semiconductor light emitting device is set as follows, and the period of the unevenness is set to 0.5λ or less .
請求項1記載の半導体発光素子を製造する方法であって、
前記半導体多層膜の光取り出し面側に位置しV族元素としてPを含む層を成長する際に、成長時のPH3 分圧を1〜20Paに設定し、成長表面に前記突起物を形成することを特徴とする半導体発光素子の製造方法。
A method for manufacturing a semiconductor light emitting device according to claim 1, comprising:
When growing a layer containing P as a group V element located on the light extraction surface side of the semiconductor multilayer film, a PH3 partial pressure during growth is set to 1 to 20 Pa, and the protrusion is formed on the growth surface. A method for manufacturing a semiconductor light-emitting device.
請求項1記載の半導体発光素子を製造する方法であって、
前記半導体多層膜の光取り出し面側に位置する所定の層を、先端角が120度以下のグラインダーでランダム方向に表面を荒らすことにより、前記突起物を形成することを特徴とする半導体発光素子の製造方法。
A method for manufacturing a semiconductor light emitting device according to claim 1, comprising:
The protrusion is formed by roughening the surface of the predetermined layer located on the light extraction surface side of the semiconductor multilayer film in a random direction with a grinder having a tip angle of 120 degrees or less. Production method.
請求項1記載の半導体発光素子を製造する方法であって、
前記半導体多層膜の光取り出し面側に位置しV族元素としてPを含む層を、該層のV族元素とは異なるV族元素と水素ガスを用いてアニールすることにより、前記突起物を形成することを特徴とする半導体発光素子の製造方法。
A method for manufacturing a semiconductor light emitting device according to claim 1, comprising:
Forming the protrusions by annealing a layer containing P as a group V element located on the light extraction surface side of the semiconductor multilayer film using a group V element different from the group V element and hydrogen gas. A method of manufacturing a semiconductor light emitting device.
請求項10又は11記載の半導体発光素子を製造する方法であって、
前記反射防止膜の形成に際して、該反射防止膜を塗布形成した後に、凹凸を有する金型でプレス加工することを特徴とする半導体発光素子の製造方法。
A method for producing a semiconductor light emitting device according to claim 10 or 11,
A method of manufacturing a semiconductor light emitting element, wherein, when forming the antireflection film, the antireflection film is applied and formed, and then pressed with a mold having irregularities.
請求項10又は11記載の半導体発光素子を製造する方法であって、
前記反射防止膜の形成に際して、該反射防止膜を成膜した後に、グラインダーでランダム方向に表面を荒らすことを特徴とする半導体発光素子の製造方法。
A method for producing a semiconductor light emitting device according to claim 10 or 11,
A method of manufacturing a semiconductor light emitting device, wherein, when forming the antireflection film, the antireflection film is formed, and then the surface is roughened in a random direction by a grinder.
第1導電型の化合物半導体基板上に、活性層を第1導電型のクラッド層及び第2導電型のクラッド層で挟んだダブルへテロ構造部を形成する工程と、前記ダブルへテロ構造部の第2導電型クラッド層上に第2導電型の電流拡散層を形成する工程と、前記電流拡散層上に第2導電型のコンタクト層を形成する工程と、前記コンタクト層上に表面ラフネス(PV値(max-min))が前記発光層における発光波長以下に設定された反射防止膜を形成する工程と、前記反射防止膜を一部除去して露出された前記コンタクト層上に上部電極を形成する工程と、前記基板の裏面側に下部電極を形成する工程とを含むことを特徴とする半導体発光素子の製造方法。  Forming a double heterostructure part on the first conductive type compound semiconductor substrate by sandwiching an active layer between the first conductive type clad layer and the second conductive type clad layer; Forming a second conductivity type current diffusion layer on the second conductivity type cladding layer; forming a second conductivity type contact layer on the current diffusion layer; and surface roughness (PV) on the contact layer. Forming an antireflection film whose value (max-min) is less than or equal to the emission wavelength of the light emitting layer, and forming an upper electrode on the exposed contact layer by partially removing the antireflection film And a step of forming a lower electrode on the back side of the substrate. 前記凹凸の高さが200nm以上に設定されていることを特徴とする請求項9,10,11,18の何れかに記載の半導体発光素子。Claim 9, 10, 11, 18 semiconductor light-emitting device according to any one of, wherein the height of the irregularities is set to at least 200 nm.
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