JP2006139802A - 半導体集積回路カードの製造方法 - Google Patents
半導体集積回路カードの製造方法 Download PDFInfo
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- JP2006139802A JP2006139802A JP2006013930A JP2006013930A JP2006139802A JP 2006139802 A JP2006139802 A JP 2006139802A JP 2006013930 A JP2006013930 A JP 2006013930A JP 2006013930 A JP2006013930 A JP 2006013930A JP 2006139802 A JP2006139802 A JP 2006139802A
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Abstract
【解決手段】半導体集積回路チップ(以下、「チップ」という)CPが接着されたフィルム基板FBを第1封止用樹脂を介して第1補強用金属板MP1の上に載置し、第2封止用樹脂を介してチップCP上に第2補強用金属板MP2を配する。次に第1及び第2補強用金属板MP1,MP2を加圧し、第2封止用樹脂をチップCPの周面に流れ込ませた後、硬化させ、封止用樹脂部SPを形成する。そしてチップCP、第1及び第2補強用金属板MP1,MP2、並びに第2封止用樹脂(封止用樹脂部SP)が一体構造とされた半導体集積回路チップ装置CPDを半導体集積回路カードの外装樹脂基板OP,OP内に装填する。
【選択図】図3
Description
Claims (1)
- 複数の回路パターンが形成されたフィルム基板上の各回路パターンに半導体集積回路チップを接着する工程と、
前記半導体集積回路チップが接着されたフィルム基板を、第1の封止用樹脂が塗布された、前記半導体集積回路チップの下面より広い面積を有する第1の補強用金属板の上に載置するとともに、第2の封止用樹脂が塗布された前記半導体集積回路チップの上に、前記半導体集積回路チップの上面より広い面積を有する第2の補強用金属板を配する工程と、
前記第1及び第2の補強用金属板を介して前記第1及び第2の封止用樹脂を加圧することによって、前記第2の封止用樹脂を前記半導体集積回路チップの周面に流れ込ませて、前記第1及び第2の補強用金属板をそれぞれ前記フィルム基板及び前記半導体集積回路チップに接着する工程と、
前記半導体集積回路チップの周面に流し込まれた前記第2の封止用樹脂を硬化させることによって前記半導体集積回路チップの周面を被覆する封止用樹脂部を形成して半導体集積回路チップを封止する工程と、
前記封止された半導体集積回路チップを各回路パターン毎に打ち抜く工程と、
前記打ち抜かれた半導体集積回路チップを充填樹脂層内に装填する工程と、
前記充填樹脂層の表裏にそれぞれ外装樹脂基板を接着する工程と、
前記外装樹脂基板が接着された複数の半導体集積回路カードを各半導体集積回路カード毎に打ち抜く工程
を有することを特徴とする半導体集積回路カードの製造方法。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006013930A JP4251185B2 (ja) | 2006-01-23 | 2006-01-23 | 半導体集積回路カードの製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006013930A JP4251185B2 (ja) | 2006-01-23 | 2006-01-23 | 半導体集積回路カードの製造方法 |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2651999A Division JP4215886B2 (ja) | 1998-10-19 | 1999-02-03 | 半導体集積回路チップの封止方法、半導体集積回路カードの製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2006139802A true JP2006139802A (ja) | 2006-06-01 |
| JP4251185B2 JP4251185B2 (ja) | 2009-04-08 |
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| JP2006013930A Expired - Lifetime JP4251185B2 (ja) | 2006-01-23 | 2006-01-23 | 半導体集積回路カードの製造方法 |
Country Status (1)
| Country | Link |
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| JP (1) | JP4251185B2 (ja) |
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| US8133749B2 (en) | 2008-04-25 | 2012-03-13 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing the same |
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| JP4251185B2 (ja) | 2009-04-08 |
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