JP2009502041A - ダイオードクランプを有するドレイン拡張されたｍｏｓｆｅｔｓ - Google Patents

ダイオードクランプを有するドレイン拡張されたｍｏｓｆｅｔｓ Download PDF

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Publication number
JP2009502041A
JP2009502041A JP2008522752A JP2008522752A JP2009502041A JP 2009502041 A JP2009502041 A JP 2009502041A JP 2008522752 A JP2008522752 A JP 2008522752A JP 2008522752 A JP2008522752 A JP 2008522752A JP 2009502041 A JP2009502041 A JP 2009502041A
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JP
Japan
Prior art keywords
buried layer
drain
transistor
well
diode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
JP2008522752A
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English (en)
Japanese (ja)
Inventor
サミーア ペンドハーカー
Original Assignee
テキサス インスツルメンツ インコーポレイテッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by テキサス インスツルメンツ インコーポレイテッド filed Critical テキサス インスツルメンツ インコーポレイテッド
Publication of JP2009502041A publication Critical patent/JP2009502041A/ja
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/101—Integrated devices comprising main components and built-in components, e.g. IGBT having built-in freewheel diode
    • H10D84/151—LDMOS having built-in components
    • H10D84/153—LDMOS having built-in components the built-in component being PN junction diodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/62—Capacitors having potential barriers
    • H10D1/66—Conductor-insulator-semiconductor capacitors, e.g. MOS capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
    • H10D30/0281—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of lateral DMOS [LDMOS] FETs
    • H10D30/0285—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of lateral DMOS [LDMOS] FETs using formation of insulating sidewall spacers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/351—Substrate regions of field-effect devices
    • H10D62/357—Substrate regions of field-effect devices of FETs
    • H10D62/364—Substrate regions of field-effect devices of FETs of IGFETs
    • H10D62/371—Inactive supplementary semiconductor regions, e.g. for preventing punch-through, improving capacity effect or leakage current
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/514—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers
    • H10D64/516—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers the thicknesses being non-uniform

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP2008522752A 2005-07-18 2005-07-18 ダイオードクランプを有するドレイン拡張されたｍｏｓｆｅｔｓ Abandoned JP2009502041A (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US2005/025396 WO2007011354A1 (en) 2005-07-18 2005-07-18 Drain-extended mosfets with diode clamp

Publications (1)

Publication Number Publication Date
JP2009502041A true JP2009502041A (ja) 2009-01-22

Family

ID=37669121

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008522752A Abandoned JP2009502041A (ja) 2005-07-18 2005-07-18 ダイオードクランプを有するドレイン拡張されたｍｏｓｆｅｔｓ

Country Status (4)

Country Link
EP (1) EP1908121A4 (de)
JP (1) JP2009502041A (de)
KR (1) KR100985373B1 (de)
WO (1) WO2007011354A1 (de)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011003608A (ja) * 2009-06-16 2011-01-06 Renesas Electronics Corp 半導体装置
JP2013524507A (ja) * 2010-03-30 2013-06-17 フリースケール セミコンダクター インコーポレイテッド 半導体デバイスおよび方法
JP2013172110A (ja) * 2012-02-23 2013-09-02 Lapis Semiconductor Co Ltd 半導体装置
JP2013247188A (ja) * 2012-05-24 2013-12-09 Toshiba Corp 半導体装置
JP2014011454A (ja) * 2012-06-29 2014-01-20 Freescale Semiconductor Inc ダイオード回路を通じて相互接続されるドレインおよび分離構造体を有する半導体デバイスおよびドライバ回路ならびにその製造方法
JP2019046911A (ja) * 2017-08-31 2019-03-22 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009059949A (ja) * 2007-08-31 2009-03-19 Sharp Corp 半導体装置、および、半導体装置の製造方法
US7838940B2 (en) 2007-12-04 2010-11-23 Infineon Technologies Ag Drain-extended field effect transistor
KR100943504B1 (ko) 2007-12-31 2010-02-22 주식회사 동부하이텍 Ｍｏｓｆｅｔ 제조 방법
KR101302108B1 (ko) * 2011-12-30 2013-08-30 주식회사 동부하이텍 드레인 확장형 모스 트랜지스터 제조 방법
KR101694091B1 (ko) * 2016-03-03 2017-01-17 강희복 Flyback 인덕터 구조 적용을 위한 음의 문턱전압 5-단자 엔모스 트랜지스터 소자를 이용한 전력 공급 회로 장치
KR101694092B1 (ko) * 2016-03-03 2017-01-17 강희복 3상 Flyback 인덕터 구조 적용을 위한 음의 문턱전압 5-단자 엔모스 트랜지스터 소자를 이용한 전력 공급 회로 장치
CN112713182B (zh) * 2020-12-29 2022-06-28 浙大城市学院 一种碳化硅元胞级功率集成芯片结构

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0936674B1 (de) * 1998-02-10 2006-04-26 STMicroelectronics S.r.l. Integrierte Schaltung mit einem VDMOS-Transistor, der gegen Überspannungen zwischen Source und Gate geschützt ist
KR100859701B1 (ko) * 2002-02-23 2008-09-23 페어차일드코리아반도체 주식회사 고전압 수평형 디모스 트랜지스터 및 그 제조 방법
JP3713490B2 (ja) * 2003-02-18 2005-11-09 株式会社東芝 半導体装置
US6924531B2 (en) * 2003-10-01 2005-08-02 Taiwan Semiconductor Manufacturing Company, Ltd. LDMOS device with isolation guard rings

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011003608A (ja) * 2009-06-16 2011-01-06 Renesas Electronics Corp 半導体装置
JP2013524507A (ja) * 2010-03-30 2013-06-17 フリースケール セミコンダクター インコーポレイテッド 半導体デバイスおよび方法
JP2013172110A (ja) * 2012-02-23 2013-09-02 Lapis Semiconductor Co Ltd 半導体装置
JP2013247188A (ja) * 2012-05-24 2013-12-09 Toshiba Corp 半導体装置
JP2014011454A (ja) * 2012-06-29 2014-01-20 Freescale Semiconductor Inc ダイオード回路を通じて相互接続されるドレインおよび分離構造体を有する半導体デバイスおよびドライバ回路ならびにその製造方法
JP2019046911A (ja) * 2017-08-31 2019-03-22 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法

Also Published As

Publication number Publication date
KR20080033423A (ko) 2008-04-16
EP1908121A1 (de) 2008-04-09
EP1908121A4 (de) 2009-09-30
WO2007011354A1 (en) 2007-01-25
KR100985373B1 (ko) 2010-10-04

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Date Code Title Description
A762 Written abandonment of application

Free format text: JAPANESE INTERMEDIATE CODE: A762

Effective date: 20091113