JP2012178493A5 - - Google Patents
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- JP2012178493A5 JP2012178493A5 JP2011041219A JP2011041219A JP2012178493A5 JP 2012178493 A5 JP2012178493 A5 JP 2012178493A5 JP 2011041219 A JP2011041219 A JP 2011041219A JP 2011041219 A JP2011041219 A JP 2011041219A JP 2012178493 A5 JP2012178493 A5 JP 2012178493A5
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- film
- semiconductor
- semiconductor film
- oxygen
- etching
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Claims (18)
(b)前記第1半導体膜上に第2金属酸化物を含有する半導体からなる第2半導体膜を形成する工程と、
(c)前記第1半導体膜と前記第2半導体膜との積層膜を加工する工程と、
(d)前記(c)工程の後、前記第2半導体膜上に、第1導電性膜を形成する工程と、
(e)前記(d)工程の後、前記第2半導体膜上の第1領域の前記第1導電性膜をエッチングにより除去する工程と、
(f)前記(e)工程の後、前記第1領域の前記第2半導体膜をエッチングにより除去する工程と、
を有し、
前記(c)工程と、前記(f)工程との間に、
(g)前記第1半導体膜に熱処理を施し、前記第1半導体膜を結晶化する工程を有し、
前記(e)工程のエッチングは、ドライエッチングであり、
前記(f)工程のエッチングは、ウェットエッチングであることを特徴とする半導体装置の製造方法。 (A) forming a first semiconductor film made of a semiconductor containing a first metal oxide above the substrate;
(B) forming a second semiconductor film made of a semiconductor containing a second metal oxide on the first semiconductor film;
(C) processing a laminated film of the first semiconductor film and the second semiconductor film;
(D) after the step (c), forming a first conductive film on the second semiconductor film;
(E) after the step (d), removing the first conductive film in the first region on the second semiconductor film by etching;
(F) After the step (e), a step of removing the second semiconductor film in the first region by etching;
Have
Between the step (c) and the step (f),
(G) heat-treated in the first semiconductor film, it has a step of crystallizing the first semiconductor film,
The etching in the step (e) is dry etching,
The method of manufacturing a semiconductor device, wherein the etching in the step (f) is wet etching .
(h)前記基板上にトランジスタのゲート電極を形成した後、前記ゲート電極上にゲート絶縁膜を形成する工程を有し、
前記(a)工程は、前記ゲート絶縁膜上に、前記第1半導体膜を形成する工程であり、
前記(e)工程は、前記第1領域の前記第1導電性膜を除去することにより、前記第1領域を介して離間して配置される前記トランジスタのソース電極およびドレイン電極を形成する工程であることを特徴とする請求項1記載の半導体装置の製造方法。 Before the step (a),
(H) forming a gate insulating film on the gate electrode after forming the gate electrode of the transistor on the substrate;
The step (a) is a step of forming the first semiconductor film on the gate insulating film,
The step (e) is a step of forming a source electrode and a drain electrode of the transistor that are spaced apart via the first region by removing the first conductive film in the first region. 2. The method of manufacturing a semiconductor device according to claim 1, wherein:
(i)前記(f)工程の後に、前記ソース電極および前記ドレイン電極上にゲート絶縁膜を形成した後、前記ゲート絶縁膜上に前記トランジスタのゲート電極を形成する工程を有することを特徴とする請求項1記載の半導体装置の製造方法。 The step (e) is a step of forming a source electrode and a drain electrode of a transistor that are spaced apart via the first region by removing the first conductive film in the first region. ,
(I) After the step (f), after forming a gate insulating film on the source electrode and the drain electrode, forming a gate electrode of the transistor on the gate insulating film. A method for manufacturing a semiconductor device according to claim 1.
(b)前記半導体層上に、第1金属酸化物を含有する半導体からなる第1半導体膜を形成する工程と、
(c)前記第1半導体膜上に第2金属酸化物を含有する半導体からなる第2半導体膜を形成する工程と、
(d)前記半導体層、前記第1半導体膜および前記第2半導体膜との積層膜を加工する工程と、
(e)前記(d)工程の後、前記第2半導体膜上に、第1導電性膜を形成する工程と、
(f)前記(e)工程の後、前記第2半導体膜上の第1領域の前記第1導電性膜をエッチングにより除去する工程と、
(g)前記(f)工程の後、前記第1領域の前記第2半導体膜をエッチングにより除去する工程と、
を有し、
前記(d)工程と、前記(g)工程との間に、
(h)前記第1半導体膜に熱処理を施し、前記第1半導体膜を結晶化する工程を有し、
前記(f)工程のエッチングは、ドライエッチングであり、
前記(g)工程のエッチングは、ウェットエッチングであることを特徴とする半導体装置の製造方法。 (A) forming a semiconductor layer above the substrate;
(B) forming a first semiconductor film made of a semiconductor containing a first metal oxide on the semiconductor layer;
(C) forming a second semiconductor film made of a semiconductor containing a second metal oxide on the first semiconductor film;
(D) processing a stacked film of the semiconductor layer, the first semiconductor film, and the second semiconductor film;
(E) after the step (d), forming a first conductive film on the second semiconductor film;
(F) After the step (e), removing the first conductive film in the first region on the second semiconductor film by etching;
(G) after the step (f), removing the second semiconductor film in the first region by etching;
Have
Between the step (d) and the step (g),
(H) heat treatment to said first semiconductor film, have a step of crystallizing the first semiconductor film,
The etching in the step (f) is dry etching,
The method of manufacturing a semiconductor device, wherein the etching in the step (g) is wet etching .
(b)前記第1半導体膜の上方に配置され、前記第1半導体膜上の第1領域を挟んで離間して配置されたソース電極およびドレイン電極と、
(c)ゲート電極と、
(d)ゲート絶縁膜と、
を有するトランジスタを有し、
(e)第2金属酸化物を含有する半導体からなる第2半導体膜であって、前記第1半導体膜と前記ソース電極、および前記第1半導体膜と前記ドレイン電極との間に配置された第2半導体膜と、を有し、
前記第2半導体膜の厚さが30nm以上であることを特徴とする半導体装置。 (A) a first semiconductor film made of a polycrystalline semiconductor containing a first metal oxide disposed above the substrate;
(B) a source electrode and a drain electrode that are disposed above the first semiconductor film and are spaced apart across a first region on the first semiconductor film;
(C) a gate electrode;
(D) a gate insulating film;
A transistor having
(E) a second semiconductor film made of a semiconductor containing a second metal oxide, the second semiconductor film being disposed between the first semiconductor film and the source electrode, and between the first semiconductor film and the drain electrode. and the second semiconductor film, and possess,
A semiconductor device, wherein the thickness of the second semiconductor film is 30 nm or more .
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011041219A JP2012178493A (en) | 2011-02-28 | 2011-02-28 | Method for manufacturing semiconductor device and semiconductor device |
| PCT/JP2012/051659 WO2012117778A1 (en) | 2011-02-28 | 2012-01-26 | Method of manufacturing semiconductor device, and semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011041219A JP2012178493A (en) | 2011-02-28 | 2011-02-28 | Method for manufacturing semiconductor device and semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2012178493A JP2012178493A (en) | 2012-09-13 |
| JP2012178493A5 true JP2012178493A5 (en) | 2013-10-03 |
Family
ID=46757720
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2011041219A Pending JP2012178493A (en) | 2011-02-28 | 2011-02-28 | Method for manufacturing semiconductor device and semiconductor device |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JP2012178493A (en) |
| WO (1) | WO2012117778A1 (en) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6236792B2 (en) * | 2013-02-07 | 2017-11-29 | 凸版印刷株式会社 | THIN FILM TRANSISTOR, ITS MANUFACTURING METHOD, AND IMAGE DISPLAY DEVICE |
| JP6025595B2 (en) * | 2013-02-15 | 2016-11-16 | 三菱電機株式会社 | Thin film transistor manufacturing method |
| DE102014019794B4 (en) | 2013-05-20 | 2024-10-24 | Semiconductor Energy Laboratory Co., Ltd. | semiconductor device |
| JP2015109424A (en) * | 2013-10-22 | 2015-06-11 | 株式会社半導体エネルギー研究所 | Semiconductor device, method for manufacturing the semiconductor device, and etching solution used for the semiconductor device |
| KR101500175B1 (en) * | 2013-10-25 | 2015-03-06 | 희성금속 주식회사 | High density oxide sintered body and novel thin film transistor comprising the same |
| WO2015186354A1 (en) * | 2014-06-03 | 2015-12-10 | 株式会社Joled | Thin film transistor and method for manufacturing same |
| JP6494184B2 (en) * | 2014-06-12 | 2019-04-03 | 三菱電機株式会社 | Thin film transistor, active matrix substrate, method for manufacturing thin film transistor, and method for manufacturing active matrix substrate |
| KR102260886B1 (en) * | 2014-12-10 | 2021-06-07 | 삼성디스플레이 주식회사 | Thin film transistor |
| WO2025177134A1 (en) * | 2024-02-22 | 2025-08-28 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device, and semiconductor device |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5171258B2 (en) * | 2005-12-02 | 2013-03-27 | 出光興産株式会社 | TFT substrate and manufacturing method of TFT substrate |
| KR101402189B1 (en) * | 2007-06-22 | 2014-06-02 | 삼성전자주식회사 | Oxide thin film transistor and etchant of Zn oxide |
| JP2010123758A (en) * | 2008-11-19 | 2010-06-03 | Nec Corp | Thin film device and method of manufacturing the same |
| JP2010205923A (en) * | 2009-03-03 | 2010-09-16 | Fujifilm Corp | Method of manufacturing field effect transistor |
-
2011
- 2011-02-28 JP JP2011041219A patent/JP2012178493A/en active Pending
-
2012
- 2012-01-26 WO PCT/JP2012/051659 patent/WO2012117778A1/en not_active Ceased
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