JP3244346B2 - Switch circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a switch circuit suitable for use in an OSD (on-screen display) circuit for displaying characters such as channels and volumes on a screen of a TV receiver or the like.

[0002]

2. Description of the Related Art In an OSD circuit of a TV receiver, when a character is displayed on an image, an original image signal and image signals (R, G, B signals) for displaying the character are switched by a switch circuit and output. There is a need to. FIG. 2 is a block diagram showing such a switch circuit. The input terminal (1) receives a first chroma signal (one of R, G, and B signals) from a character generator (not shown). The second chroma signal, which is an image such as a television broadcast, is applied to the input terminal (2). A control signal for selectively outputting the chroma signal is applied to the control terminal (3), and a chroma signal is obtained at the output terminal (4). Now, the control signal of FIG. 3A is applied to the control terminal (3), the switching circuit (5) selects the a side during the "L" level period, and the switching circuit (5) during the "H" level period. ) Selects the b side. Then, it is assumed that a continuous second chroma signal has arrived at the input terminal (2) and the first chroma signal of FIG. 3B has been applied to the input terminal (1).

When the signal shown in FIG. 3A is at "L" level, an image signal as shown in FIG. 3C is generated at the output terminal (4).
On the other hand, the signal shown in FIG. 3B can take 0 [V] and 5 [V], but the comparator (6) uses the voltage of 2.5 [V] of the reference power supply (7) as a reference. A large signal is assumed to be a signal, and a smaller signal is assumed to be no signal. Therefore, the value of the reference power supply (9) of the switching circuit (8) is set to 3
If [V] is set, a signal as shown in FIG. 3C is generated in response to a signal as a trapezoidal wave as shown in FIG.

Therefore, according to the circuit shown in FIG. 2, the signal of the OSD circuit can be selected. In addition, when the signal of FIG. 3 (b) is 0 [V], which is at the time of no signal, it is necessary to apply a DC voltage (3 [V]) indicating black to the switching circuit (5). , A switching circuit (8).

[0005]

However, in the circuit of FIG. 2, the switching circuit (8) and the comparator (6)
Requires a plurality of voltage follower circuits and the like, and about 30 elements are required only by transistors.
Since the switching circuit (8) and the comparator (6) are required for each of the R, G, and B primary color signals, the number of elements is increased in total, and reduction thereof has been desired.

[0006]

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and is directed to a switch circuit for leading an input signal externally applied to a signal input terminal or an internal reference voltage to a signal output terminal. And a first emitter connected to a fixed potential point via first and second resistors connected in series.
An input signal from the signal input terminal is applied to a transistor, a base, a second transistor having an emitter connected to the base of the first transistor, a first reference voltage is applied to the base, and an emitter is connected to the first transistor. A first transistor having an input terminal and an output terminal; a third transistor having a collector connected to a connection midpoint between the first and second resistors; a first current mirror circuit having an input terminal and an output terminal; A fourth transistor, applied and having a collector connected to an input terminal of the first current mirror circuit;
A base is connected to a connection midpoint between the first and second resistors,
A fifth transistor having a collector connected to the input terminal of the first current mirror circuit, an emitter connected to the emitter of the fourth transistor, a base connected to the signal output terminal, and a collector connected to the first current mirror circuit. A sixth transistor connected to an output terminal of the circuit and having an emitter connected to the emitter of the fourth transistor, and a feedback circuit connected between a base and a collector of the sixth transistor; When the input signal applied to the terminal is greater than the first reference voltage, an input signal applied to the signal input terminal is generated from the signal output terminal, and the input signal applied to the signal input terminal is applied to the signal input terminal. When the voltage is smaller than one reference voltage, the second reference voltage is generated from the signal output terminal.

[0007]

According to the present invention, when the level of the input signal is higher than the first reference voltage, the third transistor is turned off and the second transistor is turned off.
And the first transistor acts as an emitter follower,
An input signal is applied to the base of the fifth transistor,
The transistor and the sixth transistor form a voltage follower, and the input signal is generated at an output terminal.
When the level of the input signal is smaller than the first reference voltage,
The third transistor turns on, lowering the base of the fifth transistor to a lower voltage than the base of the fourth transistor. Then, a voltage follower is formed by the fourth and sixth transistors, and the second reference voltage is generated at the output terminal.

[0008]

FIG. 1 is a circuit diagram showing an embodiment of the present invention.
(10) is a first transistor connected to a constant potential point via first and second resistors (11) and (12) having emitters connected in series, and (13) is applied with a first chroma signal to a base. The emitter is the first transistor (10)
A second transistor (14) connected to the base of the first transistor (10) has a base to which a first reference voltage (2.5 V) at point A is applied, an emitter connected to the base of the first transistor (10), and a collector connected to the first transistor (10). A third transistor connected to a connection midpoint between the first and second resistors (11) and (12);
(15) is a first current mirror circuit having an input terminal (16) and an output terminal (17), (18) is a base to which a second reference voltage (3V) at point B is applied, and a collector is the current mirror circuit. The fourth transistor connected to the input terminal (16) of (15), and the base of (19) has the first and second transistors.
The collector is connected to the input terminal (16) of the first current mirror circuit (15), and the emitter is connected to the emitter of the fourth transistor (18). A fifth transistor connected,
In (20), the base is connected to the output terminal (21), the collector is connected to the output terminal (17) of the first current mirror circuit (15), and the emitter is connected to the emitter of the fourth transistor (18). The sixth transistor,
(22) is composed of seventh and eighth transistors (23) and (24) whose emitters are commonly connected and a first current mirror circuit (15), and a second current mirror circuit (15) from the input terminal (25).
A voltage follower circuit for leading a chroma signal to an output terminal (21); (26) and (27) are control terminals (28)
Is a control transistor that is turned on and off in the opposite polarity in response to the switching signal of the first and second chroma signals from.

First, a first chroma signal corresponding to a signal from a character generator and a voltage 3 at a point B corresponding to a non-signal state are provided.
The case where [V] is led to the output terminal (21) will be described. In this case, an "L" level control signal is applied to the control terminal (28), turning off the control transistor (26) and turning on the control transistor (27). Because of this,
The seventh and eighth transistors (23) and (24) are turned off, and the fourth to sixth transistors (18), (19) and (20) become operable.

On the other hand, it is assumed that a first chroma signal as shown in FIG. 3B is applied to the input terminal (29). First, assuming that the signal has a voltage of 0 [V], the voltage at point A is 2.5 V.
[V], the second transistor (13) is off,
The third transistor (14) turns on, and the voltage at the point C becomes 3
It drops to a voltage lower than V. The voltage at point B is 3 [V]
Therefore, the fourth transistor (18) is turned on and the fifth transistor (19) is turned off. Then, a voltage follower circuit including the fourth transistor (18), the sixth transistor (20), the feedback transistor (30), and the first current mirror circuit (15) operates, and the output terminal (21) is connected to the output terminal (21). A DC voltage of 3 [V] indicating no signal is generated.

The second current mirror circuit (31) serving as an operating current source of the differential amplifier constituted by the second and third transistors (13) and (14) is provided with a third transistor (1).
When the transistor is turned on in step 4), the transistor serving as the operating current source is not saturated even if the emitter voltage decreases. Next, assuming that the voltage of the input terminal (29) becomes 5 [V], which is a normal signal, the third transistor (1
4) is turned off, the first and second transistors (10) and (13) operate as emitter followers, and a first chroma signal having a voltage higher than 3 [V] is generated at the point C. Then
The fourth transistor (18) is turned off, the fifth transistor (19) is turned on, and the fifth and sixth transistors (1) are turned off.
9) and (20), a voltage follower circuit comprising a first current mirror circuit (15) and a feedback transistor (30) operates, and a first chroma signal equal to that at point C is output to an output terminal (21). Occurs.

Therefore, according to the circuit of FIG. 1, the level of the first chroma signal is detected, and if the level is higher than the predetermined level, the signal is passed as it is, and if the level is lower than the predetermined level, a DC voltage indicating no signal is generated. be able to. Next, a case where the second chroma signal from the input terminal (25) is led to the output terminal (21) will be described.

In this case, "H" is applied to the control terminal (28).
Level control signal is applied and the control transistor (2
6) turns on and the control transistor (27) turns off. Therefore, the seventh and eighth transistors (23) and (24)
Are turned on, and the fourth to sixth transistors (18), (1)
9) and (20) are turned off. Then, the voltage follower circuit (22) including the seventh and eighth transistors (23) and (24), the first current mirror circuit (15), and the feedback transistor (30) operates.

Therefore, a signal equal to the second chroma signal at the input terminal (25) is generated at the output terminal (21). Therefore, according to the circuit of FIG. 1, the same function as the switch circuit of FIG. 2 can be realized with a small number of elements.

[0015]

As described above, according to the present invention, it is possible to provide a switch circuit capable of switching an OSD circuit with a small number of elements.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a switch circuit of the present invention.

FIG. 2 is a block diagram showing a conventional switch circuit.

FIG. 3 is a waveform diagram for explaining FIG. 2;

[Explanation of symbols]

 (10) First transistor (13) Second transistor (14) Third transistor (15) First current mirror circuit (18) Fourth transistor (19) Fifth transistor (20) Sixth transistor

Claims (2)

(57) [Claims] An input externally applied to a signal input terminal.
Deriving signal or internal reference voltage to signal output terminal
A switch circuit, wherein a first transistor whose emitter is connected to a constant potential point via first and second resistors connected in series, and an input signal from the signal input terminal are applied to a base;
A second transistor having an emitter connected to the base of the first transistor; a first reference voltage applied to the base;
A collector connected to the base of the transistor;
A first transistor having an input terminal and an output terminal; a second reference voltage applied to a base; and a collector connected to the first transistor.
A fourth transistor connected to the input terminal of the current mirror circuit, and a base connected to a connection midpoint between the first and second resistors;
A fifth transistor having a collector connected to the input terminal of the first current mirror circuit, an emitter connected to the emitter of the fourth transistor, a base connected to the signal output terminal, and a collector connected to the first current mirror circuit. is connected to the output terminal of the mirror circuit includes a sixth transistor whose emitter is connected to the emitter of the fourth transistor, and a feedback circuit connected between the base and the collector of the sixth transistor, wherein wherein from said signal output terminal when an input signal applied to the signal input terminal is larger than the first reference voltage
It generates an input signal applied to the signal input terminal, the signal
A switching circuit for generating the second reference voltage from the signal output terminal when an input signal applied to the signal input terminal is smaller than the first reference voltage. 2. The switch circuit according to claim 1, further comprising a second current mirror circuit having an input terminal connected to a collector of said first transistor and an output terminal connected to a base of said first transistor.