JP5117823B2 - Highly stable oscillator with temperature chamber - Google Patents

Description

  The present invention relates to a high-stability oscillator with a thermostat using an SC-CUT crystal resonator, and more particularly to a high-stability oscillator with a thermostat capable of improving the stability at startup and preventing an increase in hardware scale.

The frequency-temperature characteristic of the SC-CUT crystal resonator is convex upward.
Therefore, the thermostatic chamber-equipped crystal oscillator using the SC-CUT crystal resonator performs temperature control so that the temperature becomes stable at the convex apex of the resonator.

  However, at the time of activation of the crystal oscillator with a thermostatic bath, it becomes −100 to −150 ppm as compared with the peak frequency, and the frequency deviation becomes large.

  Therefore, when a fixed oscillator is added to the crystal oscillator with a thermostatic bath to improve the stability at startup, the switching time is determined by the timer means after startup, and furthermore, switching is performed to eliminate phase jumps at switching. Phase detection means is required.

  As related prior arts, there are JP-A-59-194519 (Patent Document 1) and JP-A-2004-64445 (Patent Document 2).

  In Patent Document 1, a temperature compensated crystal oscillator (TCXO) and a crystal oscillator with a thermostatic bath (OCXO: Oven Controlled Crystal Oscillator) are juxtaposed, and the TCXO oscillation frequency is adopted at startup. A reference frequency generation method for switching to OCXO when is stabilized is shown.

  Patent Document 2 includes TCXO and OCXO. When the average of the phase difference is within the range of the frequency stability when both oscillation frequencies are compared by the phase comparison circuit, the warm-up of OCXO is completed. There is shown a warm-up control method for a crystal oscillator with a thermostatic bath that can amplify the output frequency of the OCXO with a buffer and output it.

JP 59-194519 A JP 2004-64445 A

  However, in a circuit in which a fixed oscillator is added to the conventional crystal oscillator with a thermostat, a timer means for determining a switching time after activation is provided, or a switching phase detection means for eliminating a phase jump at the time of switching There is a problem that the hardware scale cannot be suppressed while improving the stability at the time of starting.

  The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a highly stable oscillator with a thermostat that can suppress the hardware scale while improving the stability at the time of startup.

  The present invention for solving the problems of the above-mentioned conventional example inputs a crystal oscillator with a thermostat and an oscillation frequency signal from the crystal oscillator with a thermostat, and connects the crystal oscillator and the first inverter in parallel. The inverter type crystal oscillator, the oscillation frequency signal from the oven-controlled crystal oscillator and the oscillation frequency signal from the inverter-type crystal oscillator are input, and a selector for selecting one of the oscillation frequency signals, and the oven-controlled crystal oscillator Until the oscillation frequency signal is synchronized with the oscillation frequency signal of the inverter type crystal oscillator, the selection signal is output to the selector so as to select the oscillation frequency signal from the inverter type crystal oscillator, and the oscillation of the crystal oscillator with a thermostatic bath When the frequency signal is synchronized with the oscillation frequency signal of the inverter-type crystal oscillator, select the oscillation frequency signal from the oven-controlled crystal oscillator High stability oscillator with a thermostat and having a stabilizing means for outputting a selection signal to cormorants selector.

  The present invention is characterized in that, in the high-stability oscillator with a thermostat, a capacitor and a resistor are connected in series between the crystal oscillator with a thermostat and an inverter crystal oscillator.

  According to the present invention, in the high-stability oscillator with a thermostat, the stabilizing means inputs an oscillation frequency signal from the thermostat-equipped crystal oscillator and an oscillation frequency signal from the inverter-type crystal oscillator, and outputs an AND. Integrating the output from the AND gate, the output signal from the integrator, and the reference value when the oscillation frequency signal of the oven-controlled crystal oscillator is recognized to be synchronized with the oscillation frequency signal of the inverter-type crystal oscillator When the output signal is higher than the reference value and not synchronized, a selection signal for selecting the oscillation frequency signal from the inverter type crystal oscillator is output, and when the output signal is lower than the reference value and synchronized, the thermostatic chamber And a comparator for outputting a selection signal for selecting an oscillation frequency signal from the attached crystal oscillator.

  According to the present invention, in the high-stability oscillator with a thermostat, the oscillation frequency signal of the crystal oscillator with a thermostat is selected in synchronization with the oscillation frequency signal of the inverter crystal oscillator. Later, a stabilization maintaining means for controlling so as not to select an oscillation frequency signal from the inverter type crystal oscillator is provided.

According to the present invention, in the high-stability oscillator with a thermostatic bath, the stabilization maintaining means inputs a second inverter that inverts and outputs an input signal from the comparator, and an input from the second inverter to a clock terminal, And a flip-flop for supplying power to the input terminal , supplying a signal from the inverting output terminal to the first inverter as power, and outputting the signal from the inverting output terminal as a selection signal to the selector. .

  According to the present invention, the stabilizing means selects the oscillation frequency signal from the inverter-type crystal oscillator until the oscillation frequency signal of the oven-controlled crystal oscillator is synchronized with the oscillation frequency signal of the inverter-type crystal oscillator. When the oscillation frequency signal of the oven-controlled crystal oscillator is synchronized with the oscillation frequency signal of the inverter-type crystal oscillator, the selector selects the oscillation frequency signal from the oven-controlled crystal oscillator. Therefore, there is an effect that the hardware scale can be suppressed while improving the stability at the time of startup.

  According to the present invention, since the above-mentioned high-stability oscillator with a thermostat is provided with a capacitor and a resistor connected in series between a crystal oscillator with a thermostat and an inverter-type crystal oscillator, the inverter is controlled according to the constants of the capacitor and the resistor. There is an effect that the degree of interference with the crystal oscillator can be adjusted.

  According to the present invention, the stabilization maintaining means is configured so that the oscillation frequency signal of the thermostatic oven crystal oscillator is synchronized with the oscillation frequency signal of the inverter crystal oscillator and the oscillation frequency signal from the thermostatic oven crystal oscillator is selected. Because the high-stability oscillator with a thermostatic chamber is controlled so as not to select the oscillation frequency signal from the inverter-type crystal oscillator, the oscillation frequency signal of the inverter-type crystal oscillator is selected after the temperature-controlled crystal oscillator is stabilized There is an effect of preventing the return to the state to be performed.

Embodiments of the present invention will be described with reference to the drawings.
[Outline of the embodiment]
A high-stability oscillator with a thermostat according to an embodiment of the present invention is an inverter crystal oscillator configured by inputting OCXO and an oscillation frequency signal from OCXO and connecting the crystal oscillator and the first inverter in parallel. And an oscillation frequency signal from the OCXO and an oscillation frequency signal from the inverter type crystal oscillator, and a selector for selecting either of them, and until the oscillation frequency signal of the OCXO is synchronized with the oscillation frequency signal of the inverter type crystal oscillator When the OCXO oscillation frequency signal is synchronized with the oscillation frequency signal of the inverter crystal oscillator, the selection signal is output to the selector so as to select the oscillation frequency signal from the inverter crystal oscillator. And a stabilizing means for outputting a selection signal to the selector so that the selection can be made. While above, in which it is possible to suppress the hardware scale.

  In addition, the high-stability oscillator with a thermostat according to the embodiment of the present invention is configured so that the oscillation frequency signal of the OCXO is synchronized with the oscillation frequency signal of the inverter-type crystal oscillator and the oscillation frequency signal from the OCXO is selected. Stabilizing means for controlling the oscillation frequency signal from the crystal oscillator so as not to be selected. After the OCXO has stabilized once, it returns to the state of selecting the oscillation frequency signal of the inverter crystal oscillator. Can be prevented.

[Configuration of this oscillator: Fig. 1]
A highly stable oscillator with a thermostat (this oscillator) according to an embodiment of the present invention will be described with reference to FIG. FIG. 1 is a block diagram showing the configuration of a high-stability oscillator with a thermostat according to an embodiment of the present invention.
As shown in FIG. 1, the present oscillator includes an oven controlled crystal oscillator (OCXO) 1, a first buffer 2, a capacitor 3, a resistor 4, an inverter crystal oscillator 5, and a second buffer 6. The AND gate 7, the integrator 8, the comparator (CMP: Comparator) 9, the selector (SEL: Selector) 10, and the output terminal 11 are basically provided.
Here, the AND gate 7, the integrator 8, and the comparator 9 are OCXO1 stabilization detection means.

[Each oscillator part]
Each part of the oscillator will be specifically described.
The thermostatic oven crystal oscillator (OCXO) 1 is an oscillator that achieves high stability by inserting a crystal oscillation circuit into the thermostatic oven. The oscillation frequency signal output from the OCXO 1 is branched and input to one end of the first buffer 2, the capacitor 3, and the AND gate 7.

The first buffer 2 amplifies the signal from the OCXO 1 and outputs it to one input terminal of the selector 10.
The capacitor 3 and the resistor 4 are connected in series between the OCXO 1 and the inverter type crystal oscillator 5, and the degree of interference with the inverter type crystal oscillator 5 is adjusted by the constants of the capacitor 3 and the resistor 4. Naturally, the greater the amplitude, the wider the synchronization range is in the range of 3 to 5 ppm, but the jitter (the signal edge fluctuation component) increases, so a constant is determined as appropriate.

  In the inverter type crystal oscillator 5, a fixed crystal oscillator 5a and an inverter 5b for inverting the phase of an input signal are connected in parallel, and one end of a capacitor 5c and a capacitor 5d is connected to both ends thereof, and the other end of these capacitors is connected to the other end. Configured to be grounded.

The inverter-type crystal oscillator 5 returns the output of the inverter 5b to the input of the inverter 5b through the crystal oscillator 5a, thereby performing a stable operation at the natural frequency of the crystal oscillator 5a.
Note that the inverter-type crystal oscillator 5 is inverted by the inverter 5b.

The second buffer 6 amplifies the output from the inverter type crystal oscillator 5, branches it, and outputs one to the selector 10 and the other to the AND gate 7.
The AND gate 7 outputs a logical product of the signal from the second buffer 6 and the signal from the OCXO 1.
The integrator 8 integrates the output from the AND gate 7 for a predetermined time and outputs the result to the comparator 9.

  The comparator (CMP) 9 compares the integrated signal from the integrator 8 with a reference value, and outputs an H (High) level signal when the level is higher (High) than the reference value, and is lower than the reference value (Low). ) Level, an L (Low) level signal is output.

  When the outputs of the OCXO 1 and the inverter-type crystal oscillator 5 are not synchronized, the reference value is increased because the error increases, and when the synchronization is established, the error is decreased and the integrated value is decreased. Thus, the value of the integral value when synchronization can be established is set.

  That is, when the output signal from the comparator 8 is at the H level, the synchronization is not established, and when the output signal from the comparator 8 is at the L level and lower than the reference signal, the synchronization is established. It is in a state where it is removed.

The selector (SEL) 10 selects the output from the first buffer 2 and the output from the second buffer 6 by a signal (selection signal) from the comparator 9 and outputs the selected signal to the output terminal 11.
Specifically, in the case of the H level signal from the comparator 9 (not synchronized), a signal obtained by amplifying the signal from the inverter type crystal oscillator 5 by the second buffer 6 is selected and output to the output terminal 11. Is done. In the case of the L level signal from the comparator 9 (synchronized), a signal obtained by amplifying the signal from the OCXO 1 by the first buffer 2 is selected and output to the output terminal 11.

[Operation of this oscillator]
Next, the operation of this oscillator will be described.
In this oscillator, when the OCXO 1 is started, the OCXO 1 and the inverter type crystal oscillator 5 are not synchronized with each other, and the difference in the AND gate 7 which is the stabilization detecting means becomes large, and the integration in the integrator 8 is performed. When the value becomes higher and is higher than the reference value by the comparator 9, an H level signal is output to the selector 10.
The selector 10 selects the frequency signal from the second buffer 6 (a signal obtained by amplifying the oscillation frequency signal of the inverter type crystal oscillator 5) from the H level signal from the comparator 9 and outputs it to the output terminal 11.

When the OCXO 1 and the inverter type crystal oscillator 5 are synchronized, the difference in the AND gate 7 is reduced, the integration value in the integrator 8 is reduced, and the comparator 9 is lower than the reference value. An L level signal is output to the selector 10.
The selector 10 selects a frequency signal (a signal obtained by amplifying the oscillation frequency of the OCXO 1) from the first buffer 2 based on the L level signal from the comparator 9 and outputs it to the output terminal 11.

  If the inverter type crystal oscillator 5 is mounted in the vicinity of the SC-CUT crystal resonator in the OCXO 1, the temperature environment of the inverter type crystal oscillator 5 becomes stable, and further stability improvement can be expected at the time of startup.

[Time chart during synchronization: Fig. 2]
FIG. 2 shows the state of the output signal of the AND gate when the oscillation frequency of the OCXO 1 and the oscillation frequency of the inverter type crystal oscillator 5 are synchronized. FIG. 2 is a time chart showing two input signals and output signals in the AND gate.

  When the oscillator is synchronized, as shown in FIG. 2, the input signal 101 from the OCXO 1 and the output signal (inverted output) 102 from the second buffer 6 have a symmetrical waveform. The logical product signal 103 of both signals appears such that the signal rises in the vertical direction at the rise and fall of both signals, and when this logical product signal is integrated by the integrator 8, the level is lower than the reference value (L level). The signal is output to the comparator 9.

The comparator 9 outputs the L level signal to the selector 10 because the L level signal is lower than the reference value.
The selector 10 selects the frequency signal from the first buffer 2 by the L level signal from the comparator 9 and outputs it to the output terminal 11.

[Effect of this oscillator]
According to this oscillator, when the OCXO 1 is not started up, the stabilization means of the AND gate 7, the integrator 8, and the comparator 9 is inverted with respect to the selector 10 when not synchronized with the oscillation frequency of the inverter type crystal oscillator 5. When the instruction to select the oscillation frequency of the crystal oscillator 5 is given and the OCXO1 is stabilized and synchronized with the oscillation frequency of the inverter-type crystal oscillator 5, the stabilization means instructs the selector 10 to oscillate the OCXO1. Since it is instructed to select, the stability can be improved at start-up, and the hardware scale can be reduced by eliminating the need for timer means and phase detection means for eliminating phase jumps at the time of switching. There is.

[Application example: Fig. 3]
Next, an application example of the present oscillator will be described with reference to FIG. FIG. 3 is a configuration block diagram of an application example of the present oscillator.
As shown in FIG. 3, the oscillator of the application example continues to select the oscillation frequency of the OCXO 1 even when the temperature of the thermostatic chamber of the OCXO 1 is lowered with respect to the present oscillator of FIG. Stabilization maintaining means for preventing switching is provided.

  The stabilization maintaining means includes a power source Vcc 12, a resistor 13 connected in series to the power source 12, a capacitor 14 connected in parallel to the resistor 13, a flip-flop (F / F) 15, and an inverter 16. Yes.

The power supply 12 is input to the input terminal D and the clear terminal CLR of the flip-flop 15 via the resistor 13 connected in series and the capacitor 14 connected in parallel.
An inverter 16 that inverts the output of the comparator 9 is connected to the clock terminal CK of the flip-flop 15.
The inverted output (inverted Q) terminal of the flip-flop 15 is connected to the selector 10, the inverter 5 b, and the second buffer 6.

[Operation of application example]
The flip-flop 15 rises with a delay of several ms from the rise of the power supply 12 by the action of the resistor 13 and the capacitor 14.
As described in this oscillator, when the OCXO 1 is activated, the output from the integrator 8 is at the H level, so the comparator 9 outputs an H level signal. Therefore, the inverter 16 inverts the H level signal and outputs the L level signal to the clock terminal CK of the flip-flop 15.

  Since the signal input to the clock terminal CK of the flip-flop 15 is an L level signal, the output (Q) terminal outputs an L (Low) level signal, and the inverted Q terminal outputs an H (High) level signal. .

  An output (H level signal) from the inverted Q terminal of the flip-flop 15 is input to the selector 10, the inverter 5b, and the second buffer 6, and the inverter 5b and the second buffer 6 operate using the H level signal as a power supply. The selector 10 selects the oscillation frequency of the inverter type crystal oscillator 5.

  When OCXO1 is stabilized and synchronized with the oscillation frequency of the inverter type crystal oscillator 5, the output from the integrator 8 becomes L level, so the comparator 9 outputs an L level signal. Therefore, the inverter 16 inverts the L level signal and outputs the H level signal to the clock terminal CK of the flip-flop 15.

  Since the signal input to the clock terminal CK of the flip-flop 15 is an H level signal, the output terminal outputs an H level signal, and the inverted Q terminal outputs an L level signal.

  The output (L level signal) from the inverted Q terminal of the flip-flop 15 is input to the selector 10, the inverter 5b, and the second buffer 6, and the power supply to the inverter 5b and the second buffer 6 is stopped by the L level signal. Then, the operation is stopped, and the selector 10 selects the oscillation frequency of the OCXO1.

Thereafter, the inverter 5b and the second buffer 6 are stopped regardless of the state of the oscillation frequency of the OCXO1, so that the output signal from the integrator 8 remains at the L level. The L level signal continues to be output from the terminal, and the selector 10 continues the state in which the oscillation frequency of the OCXO 1 is selected.
Thereby, once OCXO1 is stabilized, it is prevented from returning to the state in which the oscillation frequency of the inverter type crystal oscillator 5 is selected.

  INDUSTRIAL APPLICABILITY The present invention is suitable for a highly stable oscillator with a thermostatic bath that can suppress the hardware scale while improving the stability at the time of startup.

It is a block diagram of the high-stability oscillator with a thermostat according to the embodiment of the present invention. It is a time chart which shows two input signals and an output signal in an AND gate. It is a block diagram of an application example of the present oscillator.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Constant temperature chamber crystal oscillator (OCXO), 2 ... 1st buffer, 3 ... Capacitor, 4 ... Resistor, 5 ... Inverter type crystal oscillator, 6 ... 2nd buffer, 7 ... And gate, 8 ... Integrator, DESCRIPTION OF SYMBOLS 9 ... Comparator (CMP), 10 ... Selector (SEL), 11 ... Output terminal, 12 ... Power supply, 13 ... Resistor, 14 ... Capacitor, 15 ... Flip-flop, 16 ... Inverter

Claims (5)

A crystal oscillator with a thermostat, an inverter type crystal oscillator configured by inputting an oscillation frequency signal from the crystal oscillator with a thermostat and connecting the crystal oscillator and the first inverter in parallel, and the crystal with the thermostat A selector that inputs an oscillation frequency signal from an oscillator and an oscillation frequency signal from the inverter-type crystal oscillator, and selects any oscillation frequency signal;
Until the oscillation frequency signal of the crystal oscillator with a thermostat is synchronized with the oscillation frequency signal of the inverter crystal oscillator, a selection signal is output to the selector so as to select the oscillation frequency signal from the inverter crystal oscillator, When the oscillation frequency signal of the thermostat crystal oscillator is synchronized with the oscillation frequency signal of the inverter crystal oscillator, a selection signal is output to the selector so as to select the oscillation frequency signal from the thermostat crystal oscillator. A highly stable oscillator with a thermostatic bath, characterized by comprising stabilization means.   The high-stability oscillator with a thermostat according to claim 1, wherein a capacitor and a resistor are connected in series between the crystal oscillator with a thermostat and the inverter-type crystal oscillator. Stabilization means
An AND gate that inputs an oscillation frequency signal from a crystal oscillator with a thermostat and an oscillation frequency signal from an inverter type crystal oscillator, and outputs a logical product;
An integrator for integrating the output from the AND gate;
The output signal from the integrator is compared with a reference value when the oscillation frequency signal of the thermostat crystal oscillator is recognized to be synchronized with the oscillation frequency signal of the inverter crystal oscillator, and the output signal is more than the reference value. When it is high and not synchronized, it outputs a selection signal for selecting an oscillation frequency signal from the inverter type crystal oscillator, and when the output signal is synchronized with being lower than the reference value, the thermostat crystal oscillator A high-stability oscillator with a thermostat according to claim 1 or 2, further comprising a comparator that outputs a selection signal for selecting the oscillation frequency signal.   The oscillation frequency signal from the inverter-type crystal oscillator is selected after the oscillation frequency signal from the temperature-controlled bath crystal oscillator is selected in synchronization with the oscillation frequency signal from the inverter-type crystal oscillator. 4. A high-stability oscillator with a thermostat as claimed in claim 1, further comprising a stabilization maintaining means for controlling so as not to select the temperature. Stabilization maintenance means
A second inverter that inverts and outputs the input signal from the comparator;
The input from the second inverter is input to the clock terminal, power is input to the input terminal, the signal from the inverting output terminal is supplied as power to the first inverter, and the signal from the inverting output terminal is the selector. A high-stable oscillator with a thermostatic bath according to any one of claims 1 to 4, further comprising a flip-flop that outputs as a selection signal to.

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