JP6281537B2 - 半導体ウェーハの製造方法 - Google Patents
半導体ウェーハの製造方法 Download PDFInfo
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- JP6281537B2 JP6281537B2 JP2015157347A JP2015157347A JP6281537B2 JP 6281537 B2 JP6281537 B2 JP 6281537B2 JP 2015157347 A JP2015157347 A JP 2015157347A JP 2015157347 A JP2015157347 A JP 2015157347A JP 6281537 B2 JP6281537 B2 JP 6281537B2
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- wafer
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P54/00—Cutting or separating of wafers, substrates or parts of devices
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/06—Apparatus for monitoring, sorting, marking, testing or measuring
- H10P72/0614—Marking devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/06—Apparatus for monitoring, sorting, marking, testing or measuring
- H10P72/0616—Monitoring of warpages, curvatures, damages, defects or the like
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
- H10P74/20—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by the properties tested or measured, e.g. structural or electrical properties
- H10P74/203—Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
- H10P90/12—Preparing bulk and homogeneous wafers
- H10P90/123—Preparing bulk and homogeneous wafers by grinding or lapping
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
- H10P90/12—Preparing bulk and homogeneous wafers
- H10P90/124—Preparing bulk and homogeneous wafers by processing the backside of the wafers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
- H10P90/12—Preparing bulk and homogeneous wafers
- H10P90/128—Preparing bulk and homogeneous wafers by edge treatment, e.g. chamfering
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
- H10P90/12—Preparing bulk and homogeneous wafers
- H10P90/129—Preparing bulk and homogeneous wafers by polishing
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
- H10P52/40—Chemomechanical polishing [CMP]
- H10P52/403—Chemomechanical polishing [CMP] of conductive or resistive materials
Landscapes
- Mechanical Treatment Of Semiconductor (AREA)
Description
本発明の半導体ウェーハの製造方法に従って、半導体ウェーハを製造した。実施例では、スライス工程、反り方向調整工程、面取り工程、ラップ工程、レーザーマーク工程、及び両面研磨工程を、この順に実施した。
半導体ウェーハの製造における各製造工程の順番を、スライス工程、面取り工程、反り方向調整工程、ラップ工程、レーザーマーク工程、両面研磨工程の順としたこと、すなわち、反り方向調整工程を、面取り加工後に実施したこと以外、実施例と同様な条件で半導体ウェーハを製造した。さらに、実施例と同様な方法で、反り方向調整工程にて反転させたウェーハの両面研磨後のSFQRを測定した。
14…サンギヤ、 15…インターナルギヤ、 16…キャリア、
W…ウェーハ。
Claims (2)
- インゴットから複数のウェーハをスライスするスライス工程と、
該スライスされた複数のウェーハの外周部を面取りする面取り工程と、
該面取り後の複数のウェーハを、該ウェーハの外周部を保持するキャリアを用いて保持し、該キャリアで外周部を保持したウェーハの両面を研磨する両面研磨工程とを含む半導体ウェーハの製造方法であって、
前記スライス工程の後であって、前記面取り工程の前に、前記複数のウェーハの反りの向きを一方向に揃える反り方向調整工程を含み、
該反り方向調整工程後、前記複数のウェーハの反りの向きを一方向に揃えた状態で、前記面取り工程、及び前記両面研磨工程を実施することを特徴とする半導体ウェーハの製造方法。 - 前記反り方向調整工程において、前記複数のウェーハの反りの向きを判別し、該判別結果に基づいて、前記複数のウェーハのうちの一部のウェーハを反転させることで、前記複数のウェーハの反りの向きを一方向に揃えることを特徴とする請求項1に記載の半導体ウェーハの製造方法。
Priority Applications (8)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2015157347A JP6281537B2 (ja) | 2015-08-07 | 2015-08-07 | 半導体ウェーハの製造方法 |
| CN201680042042.9A CN107851569B (zh) | 2015-08-07 | 2016-07-15 | 半导体晶圆的制造方法 |
| KR1020187003451A KR102277171B1 (ko) | 2015-08-07 | 2016-07-15 | 반도체 웨이퍼의 제조방법 |
| US15/748,834 US10395933B2 (en) | 2015-08-07 | 2016-07-15 | Method for manufacturing semiconductor wafer |
| DE112016003032.0T DE112016003032T5 (de) | 2015-08-07 | 2016-07-15 | Verfahren zum Herstellen eines Halbleiterwafers |
| PCT/JP2016/003339 WO2017026092A1 (ja) | 2015-08-07 | 2016-07-15 | 半導体ウェーハの製造方法 |
| SG11201800460YA SG11201800460YA (en) | 2015-08-07 | 2016-07-15 | Method for manufacturing semiconductor wafer |
| TW105122542A TWI685030B (zh) | 2015-08-07 | 2016-07-18 | 半導體晶圓的製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2015157347A JP6281537B2 (ja) | 2015-08-07 | 2015-08-07 | 半導体ウェーハの製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2017037922A JP2017037922A (ja) | 2017-02-16 |
| JP6281537B2 true JP6281537B2 (ja) | 2018-02-21 |
Family
ID=57984211
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2015157347A Active JP6281537B2 (ja) | 2015-08-07 | 2015-08-07 | 半導体ウェーハの製造方法 |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US10395933B2 (ja) |
| JP (1) | JP6281537B2 (ja) |
| KR (1) | KR102277171B1 (ja) |
| CN (1) | CN107851569B (ja) |
| DE (1) | DE112016003032T5 (ja) |
| SG (1) | SG11201800460YA (ja) |
| TW (1) | TWI685030B (ja) |
| WO (1) | WO2017026092A1 (ja) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109216157A (zh) * | 2017-07-04 | 2019-01-15 | 上海新昇半导体科技有限公司 | 晶片背面密封的方法 |
| CN111540750B (zh) * | 2020-04-27 | 2021-07-06 | 长江存储科技有限责任公司 | 3d存储器件的制造方法 |
| CN111872780B (zh) * | 2020-07-20 | 2022-04-15 | 上海中欣晶圆半导体科技有限公司 | 一种改善硅片边缘翘曲的方法 |
| CN112542373B (zh) * | 2020-11-05 | 2023-07-21 | 山西中科潞安紫外光电科技有限公司 | 一种提高翘曲蓝宝石晶圆研磨良率的方法 |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3274190B2 (ja) | 1992-09-26 | 2002-04-15 | 株式会社東芝 | 半導体エピタキシャル基板の製造方法 |
| US7582221B2 (en) * | 2000-10-26 | 2009-09-01 | Shin-Etsu Handotai Co., Ltd. | Wafer manufacturing method, polishing apparatus, and wafer |
| JP2002231665A (ja) * | 2001-02-06 | 2002-08-16 | Sumitomo Metal Ind Ltd | エピタキシャル膜付き半導体ウエーハの製造方法 |
| US6613591B1 (en) * | 2002-03-07 | 2003-09-02 | Memc Electronic Materials, Inc. | Method of estimating post-polishing waviness characteristics of a semiconductor wafer |
| JP2005103683A (ja) * | 2003-09-29 | 2005-04-21 | Toshiba Ceramics Co Ltd | ワイヤソー |
| JP4273943B2 (ja) * | 2003-12-01 | 2009-06-03 | 株式会社Sumco | シリコンウェーハの製造方法 |
| JP4991229B2 (ja) | 2006-09-22 | 2012-08-01 | 信越半導体株式会社 | 切断方法およびエピタキシャルウエーハの製造方法 |
| JP5250968B2 (ja) | 2006-11-30 | 2013-07-31 | 株式会社Sumco | エピタキシャルシリコンウェーハ及びその製造方法並びにエピタキシャル成長用シリコンウェーハ。 |
| JP4816511B2 (ja) * | 2007-03-06 | 2011-11-16 | 信越半導体株式会社 | 切断方法およびワイヤソー装置 |
| JP2010010358A (ja) * | 2008-06-26 | 2010-01-14 | Sumco Corp | 半導体ウェーハの製造方法 |
| JP2011201759A (ja) * | 2010-03-05 | 2011-10-13 | Namiki Precision Jewel Co Ltd | 多層膜付き単結晶基板、多層膜付き単結晶基板の製造方法および素子製造方法 |
| KR101173766B1 (ko) * | 2010-08-11 | 2012-08-13 | 주식회사 엘지실트론 | 웨이퍼 수용 장치, 캐리어 및 웨이퍼 연마 장치 |
| KR20140100549A (ko) * | 2011-12-01 | 2014-08-14 | 엠이엠씨 일렉트로닉 머티리얼스 쏘시에떼 퍼 아찌오니 | 와이어 소우에서 슬라이싱된 웨이퍼들의 표면 프로파일들을 제어하기 위한 시스템들 및 방법들 |
| JP5807648B2 (ja) * | 2013-01-29 | 2015-11-10 | 信越半導体株式会社 | 両面研磨装置用キャリア及びウェーハの両面研磨方法 |
| JP6079554B2 (ja) * | 2013-10-22 | 2017-02-15 | 信越半導体株式会社 | 半導体ウェーハの製造方法 |
| US9412706B1 (en) * | 2015-01-29 | 2016-08-09 | Micron Technology, Inc. | Engineered carrier wafers |
-
2015
- 2015-08-07 JP JP2015157347A patent/JP6281537B2/ja active Active
-
2016
- 2016-07-15 CN CN201680042042.9A patent/CN107851569B/zh active Active
- 2016-07-15 KR KR1020187003451A patent/KR102277171B1/ko active Active
- 2016-07-15 DE DE112016003032.0T patent/DE112016003032T5/de active Pending
- 2016-07-15 US US15/748,834 patent/US10395933B2/en active Active
- 2016-07-15 WO PCT/JP2016/003339 patent/WO2017026092A1/ja not_active Ceased
- 2016-07-15 SG SG11201800460YA patent/SG11201800460YA/en unknown
- 2016-07-18 TW TW105122542A patent/TWI685030B/zh active
Also Published As
| Publication number | Publication date |
|---|---|
| KR102277171B1 (ko) | 2021-07-14 |
| TWI685030B (zh) | 2020-02-11 |
| CN107851569B (zh) | 2021-07-23 |
| US10395933B2 (en) | 2019-08-27 |
| DE112016003032T5 (de) | 2018-03-22 |
| US20180226258A1 (en) | 2018-08-09 |
| SG11201800460YA (en) | 2018-02-27 |
| CN107851569A (zh) | 2018-03-27 |
| KR20180031694A (ko) | 2018-03-28 |
| WO2017026092A1 (ja) | 2017-02-16 |
| JP2017037922A (ja) | 2017-02-16 |
| TW201707079A (zh) | 2017-02-16 |
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