JP6745021B2 - 競合検出を実行するための方法および装置 - Google Patents

競合検出を実行するための方法および装置 Download PDF

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Publication number
JP6745021B2
JP6745021B2 JP2017527682A JP2017527682A JP6745021B2 JP 6745021 B2 JP6745021 B2 JP 6745021B2 JP 2017527682 A JP2017527682 A JP 2017527682A JP 2017527682 A JP2017527682 A JP 2017527682A JP 6745021 B2 JP6745021 B2 JP 6745021B2
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comparison
data elements
processor
instruction
field
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Japanese (ja)
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JP2017539013A (ja
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ジェイ． ヒューズ、クリストファー
ジェイ． ヒューズ、クリストファー
オウルド−アハムド−ヴァル、エルモウスタファ
ヴァレンタイン、ロバート
ビー． ギルカル、ミリンド
ビー． ギルカル、ミリンド
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Intel Corp
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Intel Corp
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G06F9/30038—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations using a mask
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30018—Bit or string instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30021—Compare instructions, e.g. Greater-Than, Equal-To, MINMAX
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G06F9/30047—Prefetch instructions; cache control instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G06F9/30112—Register structure comprising data of variable length
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3834—Maintaining memory consistency
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3838—Dependency mechanisms, e.g. register scoreboarding

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
  • Complex Calculations (AREA)
JP2017527682A 2014-12-23 2015-11-23 競合検出を実行するための方法および装置 Expired - Fee Related JP6745021B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/581,607 2014-12-23
US14/581,607 US9891913B2 (en) 2014-12-23 2014-12-23 Method and apparatus for performing conflict detection using vector comparison operations
PCT/US2015/062063 WO2016105758A1 (en) 2014-12-23 2015-11-23 Method and apparatus for performing conflict detection

Publications (2)

Publication Number Publication Date
JP2017539013A JP2017539013A (ja) 2017-12-28
JP6745021B2 true JP6745021B2 (ja) 2020-08-26

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JP2017527682A Expired - Fee Related JP6745021B2 (ja) 2014-12-23 2015-11-23 競合検出を実行するための方法および装置

Country Status (7)

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US (1) US9891913B2 (de)
EP (1) EP3238043A4 (de)
JP (1) JP6745021B2 (de)
KR (1) KR20170097621A (de)
CN (1) CN107003849B (de)
TW (1) TWI599952B (de)
WO (1) WO2016105758A1 (de)

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US10203955B2 (en) * 2014-12-31 2019-02-12 Intel Corporation Methods, apparatus, instructions and logic to provide vector packed tuple cross-comparison functionality
GB2549737B (en) * 2016-04-26 2019-05-08 Advanced Risc Mach Ltd An apparatus and method for managing address collisions when performing vector operations
US10191744B2 (en) 2016-07-01 2019-01-29 Intel Corporation Apparatuses, methods, and systems for element sorting of vectors
US9785435B1 (en) * 2016-10-27 2017-10-10 International Business Machines Corporation Floating point instruction with selectable comparison attributes
US11200056B2 (en) 2018-02-08 2021-12-14 Nec Corporation Parallel union control device, parallel union control method, and storage medium
CN108897522A (zh) * 2018-06-14 2018-11-27 北京比特大陆科技有限公司 数据处理方法、数据处理装置以及电子设备
CN112799788B (zh) * 2021-02-07 2023-10-03 北京华如科技股份有限公司 一种在仿真运行中并行行为执行冲突检测方法及存储介质
CN113407351B (zh) * 2021-07-20 2024-08-23 昆仑芯(北京)科技有限公司 执行运算的方法、装置、芯片、设备、介质和程序产品

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US4789925A (en) 1985-07-31 1988-12-06 Unisys Corporation Vector data logical usage conflict detection
CN103345380B (zh) * 1995-08-31 2016-05-18 英特尔公司 控制移位分组数据的位校正的装置
JP3735438B2 (ja) * 1997-02-21 2006-01-18 株式会社東芝 Ｒｉｓｃ計算機
US6922716B2 (en) 2001-07-13 2005-07-26 Motorola, Inc. Method and apparatus for vector processing
US7793084B1 (en) * 2002-07-22 2010-09-07 Mimar Tibet Efficient handling of vector high-level language conditional constructs in a SIMD processor
CN101145030B (zh) * 2006-09-13 2011-01-12 新鼎系统股份有限公司 增加变量数量、获得其余的变量、维度鉴识与变量筛选的方法及系统
US9069547B2 (en) * 2006-09-22 2015-06-30 Intel Corporation Instruction and logic for processing text strings
US8078847B2 (en) 2007-05-14 2011-12-13 Apple Inc. Detecting memory-hazard conflicts during vector processing
US8984262B2 (en) * 2008-08-15 2015-03-17 Apple Inc. Generate predicates instruction for processing vectors
JP5573134B2 (ja) * 2009-12-04 2014-08-20 日本電気株式会社 ベクトル型計算機及びベクトル型計算機の命令制御方法
US8972698B2 (en) * 2010-12-22 2015-03-03 Intel Corporation Vector conflict instructions
WO2013101132A1 (en) 2011-12-29 2013-07-04 Intel Corporation Processors having fully-connected interconnects shared by vector conflict instructions and permute instructions
US9459864B2 (en) * 2012-03-15 2016-10-04 International Business Machines Corporation Vector string range compare
US9575753B2 (en) * 2012-03-15 2017-02-21 International Business Machines Corporation SIMD compare instruction using permute logic for distributed register files
US9715383B2 (en) * 2012-03-15 2017-07-25 International Business Machines Corporation Vector find element equal instruction
US9665368B2 (en) * 2012-09-28 2017-05-30 Intel Corporation Systems, apparatuses, and methods for performing conflict detection and broadcasting contents of a register to data element positions of another register
US9372692B2 (en) * 2012-12-29 2016-06-21 Intel Corporation Methods, apparatus, instructions, and logic to provide permute controls with leading zero count functionality
US9411592B2 (en) * 2012-12-29 2016-08-09 Intel Corporation Vector address conflict resolution with vector population count functionality
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Publication number Publication date
US9891913B2 (en) 2018-02-13
JP2017539013A (ja) 2017-12-28
US20160179528A1 (en) 2016-06-23
TW201643698A (zh) 2016-12-16
CN107003849A (zh) 2017-08-01
CN107003849B (zh) 2021-03-02
KR20170097621A (ko) 2017-08-28
TWI599952B (zh) 2017-09-21
WO2016105758A1 (en) 2016-06-30
EP3238043A4 (de) 2018-07-25
EP3238043A1 (de) 2017-11-01

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