JPH01100976A - Method for manufacturing semiconductor devices - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a method for manufacturing a semiconductor device, and in particular, to a method for manufacturing a semiconductor device, in particular, by forming a pn junction in a semiconductor substrate by impurity diffusion, and then forming an epitaxial layer on the semiconductor substrate by an epitaxial growth method. , relates to improvements in methods for manufacturing desired semiconductor devices.

One type of conventional solar cell is a tandem type solar cell, which has two types of semiconductors with different band gaps connected in series. this is,
For example, it is manufactured by forming an epitaxial layer of GaAS or the like on a semiconductor substrate of Si or the like in which a pn junction is formed by impurity diffusion. And like this,
After forming a pn junction by diffusing impurities on the surface of a predetermined semiconductor substrate, when forming an epitaxial layer on the semiconductor substrate by epitaxial growth, first,
A pn junction is formed in an impurity diffusion furnace, and then the semiconductor substrate is placed in a reactor for epitaxial growth to perform metal organic chemical vapor deposition (MOCVDHMetal).
Organic Che@1cal Vapor D
epositfan) method and molecular beam epitaxy (MBf) method.
! ;Mo1eculer Beam Epitaxy)
Usually, a desired epitaxial layer is formed by an epitaxial growth method such as a method.

Problems to be Solved by the Invention However, in such conventional manufacturing methods, the semiconductor substrate on which the pn junction is formed is exposed to the atmosphere before it is placed in a reactor for epitaxial growth, so that the surface of the semiconductor substrate is exposed to oxidation. There have been cases where substances have adhered to the epitaxial layer, inhibiting the crystallinity of the epitaxial layer and deteriorating the performance of semiconductor devices. For this reason, pre-treatments such as organic solvent cleaning and etching are performed prior to epitaxial growth, but sufficient cleaning has not always been possible.

Means for Solving the Problems The present invention has been made against the background of the above circumstances.
The purpose is to prevent oxides and the like from adhering to the surface of a semiconductor substrate on which a pn junction is formed, thereby making it possible to manufacture semiconductor elements with excellent performance.

In order to achieve this object, the present invention diffuses impurities into the surface of a semiconductor substrate to form a pn junction, and then
A method of manufacturing a desired semiconductor element by forming an epitaxial layer on a semiconductor substrate by an epitaxial growth method, the semiconductor substrate being accommodated in a reaction furnace for the epitaxial growth method, and the impurity being added to the reaction furnace. The impurities are diffused onto the surface of the semiconductor substrate to form the pn junction by flowing a gas containing the semiconductor substrate, and the epitaxial layer is then formed on the semiconductor substrate in the reactor. It is characterized by

Function and Effect of the Invention Namely, the present invention accommodates a semiconductor substrate in a reactor for epitaxial growth, and forms pn by diffusion of impurities.
In addition to forming a junction, an epitaxial layer is also formed on the junction, and in this way, the pn
Since the semiconductor substrate on which the bond is formed is no longer exposed to the atmosphere, oxides etc. are prevented from adhering to the surface, improving the crystallinity of the semiconductor that is subsequently formed, resulting in high-performance semiconductor devices. will be manufactured.

In addition, since impurity diffusion is performed in a reactor for epitaxial growth, there is no need for conventional equipment used only for impurity diffusion, and the pn junction and epitaxial layer are formed in a series of steps. This makes it possible to manufacture semiconductor devices efficiently and at low cost.

Note that the impurity diffusion conditions in the above reactor vary depending on the semiconductor, the type of impurity, etc., but for example, the diffusion temperature is set at 800°C, taking into consideration the junction depth of the pn junction, etc.
It is desirable to set it within the range of ~1200℃,
The molar ratio of impurities to the total molar amount of carrier gas is determined by considering the carrier concentration in the semiconductor, etc.
It is desirable to set it within a range of about 1×10 −1 .

EXAMPLE Hereinafter, an example of the present invention will be described in detail based on the drawings.

First, FIG. 1 shows an MOCV that can suitably carry out the method of the present invention.
This is a diagram illustrating the configuration of apparatus D, which epitaxially grows semiconductor crystals according to metalorganic chemical vapor deposition. In FIG. 1, a predetermined raw material gas is introduced into a reactor 10 from a raw material gas supply facility 12. This raw material gas supply equipment 12 includes three organometallic raw material tanks 14a, 14b, and 1 in this embodiment.
4C and three raw material gas tanks 16a and 16b.

16c. Tanks 14a, 14b.

14c, TMG()limethylgalliumHG, respectively
a (CH:l)! ), TMA C) Limethylaluminum: A l (CH3)3 ]', D
E Z (diethyl zinc; Zn (Cz Hs)z
) are housed therein, and by introducing H2 gas as a carrier gas, the vapors of these organic metals are supplied into the reactor 10 together with the H2 gas. Also, tank 16
a.

16b and 16c each contain arsine (AsH).

], hydrogen selenide (H, Se), hydrogen phosphide [PH5
) is contained in the reactor IO, and is supplied together with H2 gas into the reactor IO. These raw material gases are controlled by the valves and MFCs (flow rate controllers) indicated by O in the figure.
are supplied at predetermined flow rates at predetermined times.

On the other hand, a graphite susceptor 20 that is rotated around a substantially vertical center line is disposed inside the reactor 10, and a semiconductor substrate (hereinafter simply referred to as a substrate) 22 is mounted on the susceptor 20. It is meant to be retained. Further, a heating device 26 equipped with an induction coil 24 is disposed around the reactor 10, and is configured to heat the substrate 22 by inductively heating the susceptor 20.

The heating temperature of the substrate 22 by the heating device 26 is controlled by the control device 18 in conjunction with the supply control of the raw material gas. Note that an exhaust port 28 is provided at the bottom of the reactor 10 to exhaust the supplied gas.

Next, a method for manufacturing the semiconductor element 30 shown in FIG. 2 using the MOCVD apparatus configured as described above will be described. Note that this semiconductor element 30 is used as a tandem type solar cell.

First, a p-3t semiconductor is prepared as the substrate 22, and after pretreatment such as cleaning with an organic solvent and etching,
It is charged into the reactor lO and held on the susceptor 20.

Then, the substrate 22 is heated by the heating device 26, and hydrogen phosphide is supplied together with H2 gas from the source gas supply equipment 12. Phosphorus in hydrogen phosphide is an n-type dopant (impurity) that makes the Si semiconductor n-type. By diffusing this phosphorus from the surface of the substrate 22, the surface layer of the substrate 22 becomes n'. ''-3i semiconductor, and a pn junction is formed with the original p-3t semiconductor.The substrate 22 on which the pn junction is formed is the first
functions as a solar cell.

Here, the heating temperature by the heating device 26 during the impurity diffusion, that is, the diffusion temperature (° C.) is determined from the surface of the substrate 22 to the part where the pn junction is formed, as shown in FIG. Since it is closely related to the junction depth (R), the temperature is set at a desired temperature within the range of about 800 to 1200°C, taking into account the junction depth and the like. Furthermore, the molar ratio of the n-type dopant to the total molar amount of the carrier gas is closely related to the carrier concentration (cm-'') of the n''-3t layer to be formed, as shown in FIG. Because there are
Considering the carrier concentration etc., lXl0-”~lXl0
The carrier concentration data in Figure 4 above is set to a desired amount within the range of 1000°C.
This is the case at °C.

Once the pn junction is formed on the substrate 22 in this way, GaP, (GaA3o, s Po, s/GaP) is then grown on the substrate 22 by epitaxial growth.
strained superlattice, and (GaAs/GaAS6.'A pa
, s) A buffer Ji32 consisting of a strained superlattice is formed. That is, first, T from the raw material gas supply equipment 12
By supplying H2 gas containing MG vapor and hydrogen phosphide at predetermined flow rates, GaP is formed by a chemical reaction of these raw material gases, and subsequently, TMC
A state where H2 gas containing vapor of TMG, arsine, and hydrogen phosphide are supplied at predetermined flow rates, and a state where H2 gas containing TMG vapor and hydrogen phosphide are supplied at predetermined flow rates are alternately repeated. Accordingly, CGa
A strained superlattice of ASo, s Po, s /GaP) is formed, and furthermore, H2 gas containing TMG vapor and arsine are supplied at predetermined flow rates, and H2 gas containing TMG vapor, arsine, and phosphorus are supplied at predetermined flow rates. A strained superlattice of (GaAs/GaAso, s pH, s ) is formed by alternately repeating the state in which hydrogen hydride is supplied at predetermined flow rates. This buffer layer 32 is provided to alleviate the lattice mismatch between the lattice constants of the p-GaAs semiconductor layer 34 formed thereon and the substrate 22, which are different from each other.

Thereafter, by supplying H2 gas containing vapors of TMG and DEZ and arsine from the source gas supply equipment 12 at predetermined flow rates, p-G is deposited on the buffer layer 32.
A semiconductor layer 34 of aAs is formed, and further, by supplying Ht gas containing TMG vapor, arsine, and hydrogen selenide at predetermined flow rates, n''-GaAs
A semiconductor J136 is formed. These semiconductor layers 34
．． A pn junction is formed by 36, and a second solar cell is constituted by a semiconductor having a different band gap from the substrate 22 on which the pn junction is formed. And finally T
By supplying H2 gas containing vapors of MG and TMA, arsine, and hydrogen selenide at predetermined flow rates, a semiconductor N3 consisting of n''-Al.0.Gao and zAs is produced.
8 is formed.

With the above steps, the operation of forming an epitaxial layer by the epitaxial growth method is completed. In this embodiment, the buffer layer 32. The semiconductor layer 34.36.degree. 38 is an epitaxial layer formed by an epitaxial growth method.

Further, the heating temperature of the substrate 22 during such epitaxial growth is controlled to a temperature suitable for crystal growth of each semiconductor to be formed, for example, a temperature of about 600 to 800°C.

The buffer layer 32. Semiconductor layer 34, 36°3
The substrate 22 on which 8 is formed is then taken out from the reactor 10, and an antireflection film 40 of SiNx is formed on the semiconductor layer 38.
are provided, and electrodes 42 and 44 are attached to form a desired semiconductor element 30, which is used as a tandem solar cell.

Here, in this embodiment, the substrate 22 is housed in the reactor 10 of the MOCVD apparatus, and the substrate 22 is heated by impurity diffusion.
Since a pn junction is formed on the substrate 22 and an epitaxial layer 32.34°36.38 is formed on the substrate 22, the substrate 22 on which the pn junction is formed is not exposed to the atmosphere. , oxides and the like are prevented from adhering to the surface. Therefore 1. The board 22
A buffer layer 32 having an excellent crystal structure with few lattice defects etc. is epitaxially grown on top of the buffer layer 32, and since the crystallinity of the buffer layer 32 is improved, a semiconductor layer 34 is further formed on top of the buffer layer 32. The crystallinity of '8 is also improved, and a semiconductor device 30 with excellent performance can be manufactured.

Furthermore, since impurity diffusion is performed within the reactor 10 of the MOCVD apparatus, a conventional device used only for impurity diffusion is no longer necessary, and the pn junction of the substrate 22 and the epitaxial layer 32 on the substrate 22 are .34
．． The formation of 36 and 38 is now performed continuously in a series of steps, making it possible to manufacture the semiconductor element 30 efficiently and at low cost.

Although one embodiment of the present invention has been described above in detail based on the drawings, the present invention can also be implemented in other embodiments.

For example, although an MOCVD apparatus is used in the embodiments described above, it is also possible to practice the present invention using other epitaxial growth apparatuses such as those using molecular beam epitaxy.

Furthermore, the MOCVD apparatus shown in FIG. 1 is merely an example, and other modifications may be made, such as changing the piping system of the raw material gas supply equipment 12 or adopting another heating means in place of the heating device 26. When carrying out the invention, MOCVD apparatuses having various configurations can be employed.

Further, in the above embodiment, a p-3i semiconductor substrate 22 is used to form a pn junction by impurity diffusion, and GaAs semiconductor layers 34, 36, etc. are formed on the substrate 22, so that it can be used as a solar cell. Although the case of manufacturing the semiconductor element 30 has been described, it is also possible to use an n-3t semiconductor or other semiconductor substrate, or to form an m-v group compound semiconductor other than GaAs on the semiconductor substrate, or a semiconductor other than GaAs. It is also possible to manufacture solar cells with other structures or semiconductor elements other than solar cells by doing so. In short, the present invention is similarly applicable when a desired semiconductor element is manufactured by forming a pn junction by diffusing impurities on the surface of a semiconductor substrate and then forming an epitaxial layer on the semiconductor substrate using an epitaxial growth method. It can be done.

In addition, although hydrogen phosphide is used to perform impurity diffusion in the above embodiment, it is also possible to use other dopants, and when an n-3t semiconductor is used as the semiconductor substrate, diborane is used. (B2H4) and the like are preferably used.

Although other examples are not provided, the present invention can be implemented with various modifications and improvements based on the knowledge of those skilled in the art.

[Brief explanation of the drawing]

FIG. 1 is a block diagram illustrating an example of an MOCVD apparatus that can suitably carry out the method of the present invention. Figure 2 is the MO of Figure 1.
1 is a structural diagram showing an example of a semiconductor device manufactured according to the method of the present invention using a CVD apparatus. FIG. 3 is a diagram showing the relationship between diffusion temperature and junction depth when a pn junction is formed by impurity diffusion using the apparatus shown in FIG. 1. FIG. 4 is a diagram showing the relationship between dopant molar ratio and carrier concentration when impurity diffusion is performed using the apparatus shown in FIG. 1. 10: Reactor 22: Semiconductor substrate 30: Semiconductor element 32: Buffer layer 34. 36. 38: Semiconductor layer 44I Figure 3 ≠ Several degrees (°C) Figure 4 Dopasite tension

Claims (5)

[Claims] (1) A method for manufacturing a desired semiconductor device by diffusing impurities into the surface of a semiconductor substrate to form a pn junction, and then forming an epitaxial layer on the semiconductor substrate by an epitaxial growth method, the method comprising: The semiconductor substrate is housed in a reaction furnace for the purpose of the present invention, and a gas containing the impurities is introduced into the reaction furnace to diffuse the impurities onto the surface of the semiconductor substrate to form the pn junction. . A method for manufacturing a semiconductor device, characterized in that the epitaxial layer is formed on the semiconductor substrate in the reactor. (2) The conditions for the diffusion of the impurity in the reactor are as follows:
The diffusion temperature is 800 to 1200°C, and the molar ratio of impurities to the total molar amount of carrier gas is 1 x 10^-^6 to 1 x 1.
0^-^1. The method for manufacturing a semiconductor device according to claim 1. (3) The semiconductor substrate constitutes a first solar cell by forming the pn junction, and the epitaxial layer is made of a semiconductor having a different band gap from that of the semiconductor substrate. 2nd with junction
A method for manufacturing a semiconductor device according to claim 1 or 2, which comprises a solar cell. (4) The method for manufacturing a semiconductor device according to any one of claims 1 to 3, wherein the semiconductor substrate is a Si semiconductor, and the epitaxial layer is a III-V group compound semiconductor. (5) The semiconductor substrate is a p-type Si semiconductor, and the pn junction is formed by diffusing phosphorus as the impurity. A method for manufacturing semiconductor devices.