JPH01101589A - Control signal generator for electronic musical instrument - Google Patents

Abstract

PURPOSE: To reduce the size of constitution by controlling a musical sound by an envelope waveform signal generated from an envelope waveform generating means and a modulation signal formed by a modulation signal forming means. CONSTITUTION: A multiclock signal generating means 21 generates plural clock signals CK1 to CKn having respectively different frequency bands and the envelope waveform generating means 18 controls an envelope waveform change rate based upon the clock signals CK1 to CKn and generates an envelope waveform signal. The clock signals CK1 to CKn generated from the means 21 are inputted also to a control means 14a, which outputs a clock signal corresponding to required modulation frequency based upon the inputted clock signals CK1 to CKn. The modulation signal forming means forms a modulation signal based upon the clock signal outputted from the means 14a. Since it is unnecessary to prepare a clock signal generating means for a modulation signal independently of a clock signal generating means for the generation of an evenlope waveform, the size of device constitution can be reduced.

Description

[Detailed Description of the Invention] [Field of Industrial Application] This invention provides control signals for controlling multiple types of musical tones, such as modulation signals for vibrato, tremolo, and other modulation controls, and envelope waveform signals for envelope setting and control. Regarding a control signal generation device for an electronic musical instrument, in particular, the means for generating a clock signal for setting and controlling the change rate of an envelope waveform and the means for generating a clock signal for setting the frequency of a modulation signal are simplified. About what you did.

[Conventional technology]

Generally, electronic musical instruments are provided with an envelope waveform generation circuit that generates an envelope waveform for setting and controlling the volume envelope of musical tones, the envelope of control signals, and the like. Such an envelope waveform generation circuit is provided with a clock signal generation circuit in order to set and control change rates such as attack and decay of the generated envelope waveform.

On the other hand, when generating a modulation signal for modulation control such as vibrato or tremolo, the modulation signal generation device must further include a circuit for generating a clock signal for setting the frequency of the modulation signal. Conventionally, such a clock signal generation circuit for a modulated signal has been provided separately from a clock signal generation circuit for generating an envelope waveform (see Japanese Patent Publication No. 58-9434). Since independent clock frequency adjustment and control is required for envelope waveform generation and modulation signal generation, clock signal generation circuits for both have been provided separately.

[Problem that the invention seeks to solve]

Incidentally, a clock signal generation circuit for a modulation signal is generally configured to generate a low frequency quack signal, and a divide-by-one circuit is often used.

Furthermore, frequency division and storage is often used in clock signal generation circuits for generating envelope waveforms. When a large number of branch circuits are used in this way, there is a problem in that the overall circuit configuration becomes large. Furthermore, even if a divide-by-5 circuit was not used, separate clock signal generation circuits had to be provided for envelope waveform generation and modulation signal generation.
There was a problem in that the overall circuit configuration became larger.

The present invention has been made in view of the above points, and solves the problem that a clock signal generation circuit for modulation signals had to be provided separately from a clock signal generation circuit for generating envelope waveforms.

It is an object of the present invention to provide a control signal generating device for an electronic musical instrument whose structure is miniaturized.

[Means for solving problems]

A control signal generating device for an electronic musical instrument according to the present invention includes a multi-clock signal generating means for generating a plurality of clock signals of different frequencies, and controlling an envelope waveform change rate based on the clock signal generated by the multi-clock signal generating means. an envelope waveform generation means for generating an envelope waveform signal; a control means for inputting the clock signal generated by the multi-clock signal generation means and outputting a clock signal corresponding to a desired modulation frequency based on the clock signal; a modulation signal forming means for forming a modulation signal based on the clock signal output by the control means,
The musical tone is controlled by an envelope waveform signal generated by the envelope waveform generating means and a modulation signal formed by the modulation signal forming means.

[Effect]

The multi-clock signal generation means generates a plurality of clock signals of different frequencies, and the envelope waveform generation means controls an envelope waveform change rate based on this clock signal to generate an envelope waveform signal. The clock signal generated by the multi-clock signal generation means is also input to the control means. The control means outputs a clock signal corresponding to a desired modulation frequency based on the input clock signal. The modulation signal forming means forms a modulation signal based on the clock signal output by the control means.

Since a plurality of clock signals of different frequencies are generated by the multi-clock signal generation means, it is possible to obtain a clock signal of a desired frequency based on these clock signals (for example, by selectively synthesizing one or more desired ones). can. Therefore.

The oscillation frequency itself of the multi-clock signal generation means is
Separate adjustment and adjustment for envelope waveform generation and modulation signal
There is no need to control it, on the side of the user.

A clock signal of a desired frequency may be obtained based on a plurality of clock signals of different frequencies. Therefore, the envelope waveform generating means and the common multi-crotter signal generating means can be used for generating the modulation signal.

This eliminates the need to provide a clock signal generating means for a modulated signal separately from a clock signal generating means for generating an envelope waveform, and it is possible to reduce the size of the device configuration.

〔Example〕

Hereinafter, one embodiment of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 shows an embodiment of an electronic musical instrument that generates a modulation signal for vibrato and generates a musical tone with a vibrato effect.

First, the overall structure of the electronic musical instrument of this embodiment will be explained. The pressed key detection circuit 11 detects a pressed key on the keyboard 10, and outputs a key code KC indicating the pressed key and a key-on signal KON indicating that the key is being pressed.0 frequency number memory 12 outputs the key code KC. is input, and in response to this, a frequency number F corresponding to the musical tone frequency of the pressed key is generated. This frequency number F is given to a multiplier 13 and multiplied by a vibrato signal given from a vibrato signal generation circuit 14. Thereby, the output of the 1 multiplier 13, whose frequency number F is modulated by the vibrato signal, is applied to the accumulator 15 and is repeatedly accumulated at regular time intervals. The output of the accumulator 15 is applied to the musical waveform generation circuit 16 as phase address data indicating the instantaneous phase of the musical tone signal to be generated. This musical waveform generation circuit 16 is given a tone code TC from a tone setting circuit 24, and the circuit 16 generates sample point amplitude data of a musical waveform having a tone corresponding to this tone code TC according to the phase address data. occurs. The musical tone corresponding to this musical waveform sample point amplitude data has 1 frequency number F.
It has a scale frequency corresponding to , and is vibrato modulated according to the vibrato signal. This musical waveform sample point amplitude data is applied to a multiplier 17 and multiplied by an envelope waveform signal applied from an envelope waveform generation circuit 18. As a result, an amplitude envelope corresponding to the envelope waveform signal is given to the musical waveform sample point amplitude data.

The musical sound waveform sample point amplitude data to which an amplitude envelope has been added is converted into an analog signal by the digital/analog conversion circuit 19 and then input to the sound system 20 .

The envelope waveform generation circuit 18 uses the above key code KC.
, a key-on signal KON, and a tone code TC are input, and an envelope waveform signal having a waveform shape determined according to the pitch indicated by the key code KC and the tone indicated by the tone color code TC is generated to indicate a key press operation. Generated in response to the key-on signal KON. A probability signal generation circuit 21 as a multi-clock signal generation means is attached to the envelope waveform generation circuit 18.

The probability signal generation circuit 21 is for generating a plurality of clock signals GKI to CKn of different frequencies. Specifically, it generates a plurality of probability signals having different pulse generation probabilities, and Clock signals CK1 to CKn
Output as . Each probability signal, that is, the clock signal C
K1 to CKn are preferably generated so that the pulse generation timings of clock signals GKI to CKn corresponding to each frequency do not overlap. By doing so, by simply selecting and multiplexing one or more desired clock signals GKI-CKn, each clock signal CK1-C''
This is advantageous because clock signals of various frequencies other than the frequency of Kn itself can be synthesized.

The envelope waveform generation circuit 18 is similar to the probability signal generation circuit 2.
The clock signals GKI to CKn generated from 1 are input, and based on these, envelope waveform change rates such as attack and decay are set and controlled to generate an envelope waveform signal.

The vibrato signal generation circuit 14 is connected to the probability signal generation circuit 21.
Input clock signals CKI to CKn generated from
A control means 14a that outputs a clock signal corresponding to a desired modulation frequency (vibrato frequency) based on this, and a vibrato signal forming means 1 that forms a vibrato signal based on the clock signal outputted by the control means 14a.
4b. In this example, delay vibrato is also possible, and therefore a key-on signal KON is provided to the vibrato signal generation circuit 14.

The vibrato frequency setting device 22 sets a desired vibrato frequency and outputs one frequency setting data FR. The vibrato frequency may be set according to data such as the tone code TC, or may be set according to the operation of one manual operator.

The vibrato depth setting device 23 is for setting a desired vibrato depth, and outputs depth setting data DP. The vibrato depth may also be set according to data such as the tone code TC, or may be set according to the operation of a manual operator.

The vibrato signal generating circuit 14 generates a vibrato signal having a frequency corresponding to the frequency setting data FR and a depth corresponding to the depth setting data DP. In that case, the frequency setting data FR is used when the control means 14a outputs a clock signal corresponding to the desired vibrato frequency.
Used to indicate the desired vibrato frequency.

Next, an example of the probability signal generation circuit 21 will be explained with reference to FIG.

The probability signal generation circuit 21 has an 8-bit counter 25° priority selection encoder 26 and a decoder 27.

The 8-bit counter 25 counts master clock pulses φ of a predetermined period and outputs its binary output Sin to the input terminal of the priority selection encoder 26;S.

As shown in FIG. 3, the priority selection encoder 26 receives the 8-bit count output Sin at the input terminals T1° to T17 and outputs the inverters IN1 to IN and the AND circuit AD1□.
~AD engineering 6. As shown in the column of priority selection encoder 26 in FIG. 4, the logic circuit composed of the OR circuits OR1□ to 0R13 outputs logic "1" first among the input terminals T8° to T17 when viewed from the lower bit side. Select the terminal number with priority and output the corresponding output terminal T2゜~T22.
An encoded output S pre of a predetermined binary code is sent to the encoder.

In this way, the output terminal T0 of the O-th bit of the 8-bit counter 25, the output terminal T of the first bit, the output terminal T2 of the second bit, the output terminal T7 of the seventh bit, etc.
The probability that a state will occur in which the bit becomes a logic “1” level and its lower bit becomes a logic rOJ is sequentially 1/21=1
/2.1/2"=1/4.1/23=1/8...1
/2@=1/256.

In addition, in the case of this embodiment, the priority selection encoder 26 is
Regarding the seventh bit, it is possible to output a probability signal in which the probability of becoming a logic "1" or "0" is 1/128.

This means that, for example, the predetermined calculation time T ref is 1
The output terminal T of the priority selection encoder 26 is considered based on the time when 28 clock pulses arrive. ,T21,
The timing at which the output of logic "111" is obtained at T2° is during 1/2 of the predetermined calculation time Tref, and therefore the logic r1 is output 64 times during the calculation time Tref.
An output of 11 J will be obtained.

Similarly, the output terminal T22 of the priority selection encoder 26.
Logic rllOJ, rl OIJ... to T2 and T11+
...The timing at which roolJ and rooOJ are obtained is sequentially 1/4 time (corresponding to 32 pulses),
1/8 time (equivalent to 16 pulses)...
・1/128 time (corresponding to 1 pulse), 1/128 time (corresponding to one pulse),
This means that the probability is 12"8 times (corresponding to one pulse), thus the probability is 1/2.1/4.
1/8...1/128. Data representing 1/128 is sent to the output terminal T of the priority selection encoder 26. , T2.
,T. This can be obtained by the encoded output S pre sent from.

The decoder 27 receives the encoded output S pre and outputs logic "1" level data to one of the output terminals T0 to T4□ in accordance with the code of the encoded output S pre. Thus, the output terminal T of the decoder 27,
7. T4 T4.・・・・・・'r41. 'r,. The probability that becomes logical “1” is 1/2.1/4.1, respectively.
/8...1/128.It becomes 1/128.

This means that output terminal T47 of decoder 27. T, I T
, s...The period at which T41 and T4° become logic "1" is 21 times, 22 times, 27 times, 27 times based on the period of terminal T4ff. represents.

Output terminal T4 of this decoder 27? , T4. , T4゜・
...T4□, T,. The probability outputs obtained from the probability signal generation circuit 21 are output as output probability signals, that is, output clock signals CKI to CK8.

Next, referring to FIG. 5, envelope waveform generation circuit 1
An example of No. 8 will be explained below.

The rate data generation circuit 30 calculates the rate of change (attack, decay, sustain, etc.) of each part of the envelope waveform.
Enter the rate data RD that sets the attack rate AR, decay rate DR, sustain rate SR (see Figure 6), or the slope of the rise or fall, using the key code KC.
and tone color code TC, and which part of the envelope waveform the rate data RD should be generated is instructed by a state signal ST given from the state control circuit 31.

The level data generation circuit 32 generates level data for setting attack level AL and sustain level SL (see Fig. 6) in accordance with key code KC and tone code TC, and determines which part of the envelope waveform has level data. Whether or not to generate the signal is instructed by the state signal ST.

Rate data RD is input to change width data generation circuit 33 and selection signal generation circuit 34 . The change width data generation circuit 33 generates change width data CD corresponding to the contents of the given rate data RD.The 0 selection signal generation circuit 34 generates the frequency selection signal FRE corresponding to the contents of the given rate data RD. Occur. The change width data CD is data that indicates the envelope waveform data change width per one calculation timing of the envelope waveform forming calculation.

The frequency selection signal FRE selects a frequency for setting the period of one operation timing of the envelope waveform forming operation.

Each probability signal given from the above probability signal generation circuit 21, that is, each clock signal GKI to CK8 having a frequency ratio of 1/2n, is input to the frequency selection circuit 35.
The frequency selection circuit 35 selects one or more desired clock signals CKI to CK8 according to the frequency selection signal FRE given from the selection signal generation circuit 34 and multiplexes them to generate the frequency selection signal FRH. A clock signal CLK' having a frequency selected by is output. This frequency selection circuit 35 has the same circuit configuration as the control means 14a in the vibrato signal generation circuit 14 shown in FIG. In other words, one frequency selection signal FRE is 8-bit binary data, and each bit of the clock signal GKI to CK has a frequency corresponding to its weight.
8 are selected in the AND circuits AD, ~AD, respectively, and multiplexed in the OR circuit OR, and the clock signal C
Output as LK'. As a result, even though the input clock signals CKI to CK8 have only eight frequencies, they are selected as the output clock signal CLK' (
There are 255 possible frequencies (or combination), allowing precise frequency selection and setting.

Returning to FIG. 5, the gate 36 is opened by the clock signal CLK' outputted from the frequency selection circuit 35, and the change width data CD given from the change width data generation circuit 33 passes through the gate 36. The change width data CD passed through the gate 36 is applied to a counter consisting of an arithmetic circuit 37 and a register (or delay flip-flop or shift register) 38, and is subjected to addition/subtraction operations. The state signal ST is given to the arithmetic circuit 37 from the state control circuit 31. For example, it performs addition during attack and subtraction during decay and release. The arithmetic result is temporarily held in a register 38 and fed back to the arithmetic circuit 37. be done. In this way, the change width data CD is repeatedly added or subtracted at the timing of the clock signal CLK', and an envelope waveform signal consisting of attack, decay, sustain, release, etc. parts is obtained as the calculation output. In this way, by controlling both the cycle of repeated calculations (the frequency of clock signal CLK') and the data change width per one calculation light (change width data CD) using the rate data RD, the envelope The control range of the rate of change of each part of the waveform can be expanded.

Note that the state control circuit 31 receives key-on signals KON,
Controls switching of attack, decay, sustain, and release based on tone code TC, attack level data AL, sustain level data SL, and current value data of the envelope waveform signal output from register 38;
A corresponding state signal ST is output. Further, the register 38 is reset at the start of key depression by the rise of the key-on signal KON.

Next, an example of the vibrato signal generation circuit 14 will be explained with reference to FIG.

In the vibrato signal generation circuit 14, the control means 14a
inputs each probability signal given from the above-mentioned probability signal generation circuit 21, that is, each clock signal CKI to CK8 having a frequency ratio of 1/2n, and inputs the given frequency setting from the vibrato frequency setting device [22]. By selecting one or more desired clock signals CK1 to CK8 according to the data FR and multiplexing them, a clock signal C having the frequency selected by the frequency setting data FR is generated.
Output LK. An example of this control means 14a is shown in FIG. 8, and has the same circuit configuration as the frequency selection circuit 35 in the envelope waveform generation circuit 18, and its configuration and operation are the same as described above. In other words, one frequency setting data FR is 8-bit binary data, and each bit selects clock signals CKI to CK8 having a frequency corresponding to its weight in AND circuits AD, -AD, and outputs them to an OR circuit. It is multiplexed in oR1 and output as a clock signal CLK.

As a result, the input clock signals GKI to CK8 are 8
Even though it only has the street frequency.

There are 255 frequencies that can be selected (or synthesized) as the output clock signal CLK, allowing precise frequency selection and setting.

Clock signal CL outputted by this control means 14a
K is the counter 40 in the vibrato signal forming means 14b
is input. The counter 40 is once reset by the rising edge of the key-on signal KON, and then counts the clock signal CLK. Among the multiple bit count outputs of the counter 40, predetermined lower bit data LSBCN is used.
is applied to the waveform conversion circuit 41. The waveform conversion circuit 41 converts input data LSBCN, which repeatedly changes in a sawtooth waveform, into a triangular waveform, as shown in FIG. 9, for example, and converts the waveform-converted data into a vibrato signal VIB. Output.

On the other hand, predetermined high-order bit data MSBCN of the multiple bit count output of the counter 40 is output from the OR circuit group 42.
is applied to the multiplier 43 as a delay vibrato envelope waveform (vibrato depth envelope waveform) ENV.

Also, all bits of this data MSBCN are connected to the AND circuit 4.
5 is entered. The flip-flop 46 is reset by the key-on signal KON, and when the output of the AND circuit 45 becomes "1", the flip-flop 46 is set. The set output of this flip-flop 46 is commonly input to each OR circuit of the OR circuit group 42.

Therefore, the output of the OR circuit group 42, that is, the envelope waveform ENV for delay vibrato, is as follows at the beginning of the key press:
It gradually increases according to the count data MSBCN of the counter 40, but once the data MSBCN is all “1”
After that, all bits are held as "1". On the other hand, since the counting operation of the counter 40 itself continues,
The count contents change according to the clock signal CLK.

The vibrato signal VIB continues to be generated.

The other input of the multiplier 43 is a vibrato depth setting device 23.
Depth setting data DP is given from .

The output of the multiplier 43 is applied to a multiplier 44, where it is multiplied by the vibrato signal VIB applied from the waveform conversion circuit 41. As a result, the vibrato signal VIB is subjected to time-varying depth control for delay vibrato and constant depth control according to the depth setting data DP. In this way, a vibrato signal VIB' subjected to delay vibrato control as shown in FIG. 10 is output from the multiplier 44.

This is applied to multiplier 13 (FIG. 1). In this way, when the output of one counter 40 is used to generate both the vibrato signal VIB and the envelope waveform ENV for delay vibrato, the circuit configuration is much better than when the output is generated in separate circuits. can be made quite easy.

Note that if delay vibrato is not performed, the delay vibrato circuits 42, 43, and 45° 46 can be omitted.

Note that the vibrato modulation method is not limited to the one that modulates the frequency number as shown in FIG. It can be anything.

In addition, any modulation signal used for any modulation such as volume modulation such as tremolo or timbre modulation, as well as vibrato modulation, can be generated according to the present invention in accordance with the above embodiment. In that case, the modulation signal forming means may be one using a counter and appropriate waveform converting means as shown in FIG.

Of course, the modulated signal forming means including the vibrar signal forming means 14b is not limited to the one using a counter and appropriate waveform converting means as shown in FIG. 7, but any other arbitrary structure may be used. The signal forming means may be configured to read out a memory storing the modulated signal waveform based on the output of the control means. Similarly, the envelope waveform generating means is not limited to the one based on the addition/subtraction operation of the variation width data as shown in FIG. 5, but may have other configurations, such as a configuration reading out an envelope waveform memory.

Furthermore, the configuration of the probability signal generation circuit is not limited to that shown in FIG. 2, and may have other configurations, such as a configuration in which oscillators that oscillate signals corresponding to the frequencies of each probability signal are provided independently. Good too.

Further, the multi-clock generating means is not limited to the probability signal generating circuit, and other plural clock signal generating means may be used.

Furthermore, the control means outputs a clock signal corresponding to a desired modulation frequency based on the input plural clock signals,
The present invention is not limited to selecting and multiplexing one or more clock signals as shown in FIG. 8, but may also select only one clock signal.

〔Effect of the invention〕

As described above, according to the present invention, since the multi-clock signal generation means common to the envelope waveform generation means is used for generating modulation signals, the clock signal generation means for modulation signals is used as the multi-clock signal generation means for generating envelope waveforms. There is no need to provide a separate clock signal generation means, and the excellent effect is that the device configuration can be made smaller.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the overall configuration of an embodiment of an electronic musical instrument to which a control signal generating device according to the present invention is applied. FIG. 2 is a block diagram showing an example of the probability signal generation circuit in the eleventh embodiment. FIG. 3 is a block diagram showing a detailed example of the priority selection encoder in FIG. 2. FIG. 4 shows the input/output relationship of the priority selection encoder in FIG. A table showing probability of occurrence, that is, frequency ratio. FIG. 5 is a block diagram showing an example of the envelope waveform generation circuit in FIG. 1. 6 is a diagram showing a typical example of an envelope waveform, FIG. 7 is a block diagram showing an example of the vibrato signal generation circuit in FIG. 1, and FIG. 8 is a block diagram showing an example of the vibrato signal generation circuit in FIG. Figure 9 is a diagram illustrating the waveforms of the output data of each part of the circuit, and Figure 10 is a block diagram showing a detailed example of the circuit). FIG. 3 is a diagram illustrating a waveform of a vibrato signal. 14... Vibrato signal generating circuit, 14a... Control means, 14b... Vibrato signal forming means, 18...
- Envelope waveform generation circuit, 21... Stochastic signal generation circuit, 22... Vibrato frequency setting device, 23...
・Vibrato depth setting device. Patent applicant Yamaha Co., Ltd.

Claims (4)

[Claims] (1) Multi-clock signal generation means for generating a plurality of clock signals of different frequencies; and an envelope waveform for generating an envelope waveform signal by controlling an envelope waveform change rate based on the clock signal generated by the multi-clock signal generation means. generation means; control means for receiving the clock signal generated by the multi-clock signal generation means and outputting a clock signal corresponding to a desired modulation frequency based on the clock signal; and based on the clock signal output by the control means; A control signal generating device for an electronic musical instrument, comprising a modulating signal forming means for forming a modulating signal, and controlling a musical tone by an envelope waveform signal generated by the envelope waveform generating means and a modulating signal formed by the modulating signal forming means. . (2) The electronic musical instrument according to claim 1, wherein the multi-clock signal generating means generates the clock signals so that the pulse generation timings of the clock signals corresponding to each frequency do not overlap. Control signal generator. (3) The multi-clock signal generating means includes a probability signal generating means that generates a plurality of probability signals each having a different pulse generation probability, and generates these probability signals as the plurality of clock signals having different frequencies. A control signal generating device for an electronic musical instrument according to claim 1. (4) The control means selects one or more of the clock signals generated by the multi-clock signal generation means in accordance with a desired modulation frequency, and multiplexes the signals to correspond to the desired modulation frequency. 3. A control signal generating device for an electronic musical instrument according to claim 2, which outputs a clock signal.