JPH01101779A - Digital data replacement method - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method of replacing data within a clamp level period after passing an analog signal through a clamp/A/D conversion system.

BACKGROUND OF THE INVENTION In recent years, in systems that clamp analog signals and convert them into A/D, a method has been developed in which clamping is performed between two consecutive digital data A and A+1 because the clamping device is easy to configure and the clamp level fluctuations are small. Often used. In this case, a flat period for clamping after signal processing (hereinafter referred to as clamp level period)
When replacing with digital data, approximately A or A
It is often replaced with +1.

Problem to be Solved by the Invention However, when data is replaced during the clamp level period using the above method, the signal level outside the clamp level period is relatively smaller than the analog quantity represented by the least significant bit compared to the clamp level. This has the problem that it deviates by 2. For example, as shown in Figure 3, lamp A
The following describes the case where a television signal as shown in FIG.
The converter has a 7-bit output, and the clamping is done during the bank porch period of the horizontal sync pulse in the television signal, 0111
Suppose that it is clamped between 111 and 1,000,000.

When a TV signal as shown in Figure 4(a) is input from input terminal 1 and passed through the clamp circuit, the back porch level becomes 0111111 as digital data after A/D conversion as shown in Figure 4(b). When the data is clamped to the middle of 1,000,000 and passed through an A/D converter, the data within the bank porch period consists of two data, 0111111 and 1,000,000, at approximately the same rate. If the data within this bank pouch period is replaced with 01.11111 or 1000000, the level of the replaced part will be the lowest bit in analog quantity as shown in Figure 4 (C). It is off by 〃.

Means for Solving the Problems In order to solve the above problems, the technical means of the present invention is to clamp an analog signal to a digital value after A/D conversion between two consecutive values A and A+1. In a /D conversion system, when replacing digital data within the clamp level period, set the next lower bit to the N-bit digital data output from the A/D converter to make it N+1-bit digital data, and then replace the digital data within the clamp level period. Replace the upper N-bit data with A or A+1, and when the upper N-bit data is replaced with A, set the added least significant bit data to 1 during the replacement period and O otherwise, and replace the upper N-bit data with A+1. In this case, the added least significant bit data is set to 0 during the replacement period and 1 otherwise.

action The effect of this technical means is as follows.

In other words, when replacing data within a clamp level period after passing an analog signal through a clamp/A/D conversion system, the data within the clamp level period takes an intermediate value when expressed in N bits, so it cannot be replaced accurately. , and then add the bit below to make N+1 bits,
Data within the clamp level period can be replaced without any deviation compared to data outside the clamp level period.

EXAMPLE An example of the present invention will be described below with reference to the drawings. A case will be described in which a television signal as shown in FIG. 2(a) is input in a system in which data within a clamp level period is replaced after clamping and A/D conversion as shown in FIG. 1. However, the A/D converter has a 7-bit output, and clamping is performed within the bank porch period of the horizontal synchronizing pulse in the TV signal, and 0111111 and 1000
Suppose it is clamped somewhere between 000 and 000.

When a TV signal as shown in Figure 2 (a) is input from input terminal 1 and passed through the clamp circuit, the back porch level becomes 0111111 as digital data after A/D conversion as shown in Figure 2 (b). When the data is clamped to the middle of 1,000,000 and passed through an A/D converter, the data within the back porch period consists of two data, 0111111 and 1,000,000, at approximately the same rate. To replace the data within this back porch period, one bit below the 7-bit data is set to 8 bits, and the upper 7 bits are 0111.
Replace with 111 The newly provided least significant bit data is 1 in the replacement period and 0 in other cases.In other words, the replacement period is 7-bit data with 0111111 and 1000.
Since it is an intermediate level with 000, the 8-bit data is 011.
By replacing it with 11111 and setting the least significant bit data outside the replacement period to O, the signal levels between the replacement period and other periods do not deviate relatively.

Also, the upper 7 bits data of the replacement period is set to 10000.
Similarly, when the newly provided least significant bit data is replaced with 00 and set to 0 during the replacement period and 1 at other times, the signal levels between the replacement period and other periods do not deviate relatively.

Effects of the Invention As described above, the present invention provides an A/D conversion system in which an analog signal is clamped to the middle of two consecutive values A and A+1 as a digital value after A/D conversion, and the digital value within the clamp level period is When replacing data, set the next lower bit to the N-bit data output from the A/D converter, making it N+1-bit data, and
If the bit data is replaced with A or A+1 and the upper N bit data is replaced with A, the added least significant bit data is set to 1 during the replacement period and 0 otherwise.
When the upper N bit data is replaced with A+1, the added least significant bit data is set to 0 during the replacement period and 1 otherwise, so that the difference between the clamp level after replacement and the signal level outside the clamp level period is set. No relative deviation occurs.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing the basic configuration in an embodiment of the present invention, Fig. 2 is a waveform diagram showing waveforms of each part in Fig. 1, and Figs. 3 and 4 show the basic configuration in a conventional method. FIG. 2 is a block diagram and a waveform diagram showing waveforms of each part thereof. 2...Clamp circuit, 3...A/D converter, 5...Select circuit, 6...Replacement pulse generation circuit, 61... ... Replacement period pulse, 7... Least significant bit addition circuit. Name of agent: Patent attorney Toshio Nakao (1 person) Figure 1 Figure 2 Figure 3 Figure 4

Claims (1)

[Claims] A analog signal with a flat part for clamping
Two consecutive digital values A after /D conversion (A is 2
In a system where A/D conversion is performed to N-bit digital data by clamping it to an intermediate point between (base number) and A+1, when replacing the digital data within the clamp level period, the next lower bit is set to the N-bit digital data to convert the N+1-bit digital data to N-bit digital data. As digital data, replace the upper N bit data in the replacement period with A or A+1, and when the upper N bit data is replaced with A, set the added least significant bit data to 1 during the replacement period and 0 otherwise, A digital data replacement method characterized in that when upper N-bit data is replaced with A+1, the added least significant bit data is set to 0 during the replacement period and 1 otherwise.