JPH01106962U - - Google Patents

Info

Publication number
JPH01106962U
JPH01106962U JP1988002200U JP220088U JPH01106962U JP H01106962 U JPH01106962 U JP H01106962U JP 1988002200 U JP1988002200 U JP 1988002200U JP 220088 U JP220088 U JP 220088U JP H01106962 U JPH01106962 U JP H01106962U
Authority
JP
Japan
Prior art keywords
integrator
input
output
circuit according
integrating circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1988002200U
Other languages
Japanese (ja)
Other versions
JPH0525003Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1988002200U priority Critical patent/JPH0525003Y2/ja
Publication of JPH01106962U publication Critical patent/JPH01106962U/ja
Application granted granted Critical
Publication of JPH0525003Y2 publication Critical patent/JPH0525003Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の一実施例を示すブロツク図、
第２図は抵抗減衰回路の一例を示す図、第３図は
本考案の他の実施例を示すブロツク図、第４図は
従来の積分回路を示す図、第５図は、積分器を用
いたデータ復調回路例を示すブロツク図、第６図
はその動作説明用タイミングチヤートである。 Ｉ……積分器、ＯＰ……演算増幅器、Ｃ……積
分用コンデンサ、ＰＦ……正帰還回路。 FIG. 1 is a block diagram showing an embodiment of the present invention.
Fig. 2 is a diagram showing an example of a resistance attenuation circuit, Fig. 3 is a block diagram showing another embodiment of the present invention, Fig. 4 is a diagram showing a conventional integration circuit, and Fig. 5 is a diagram showing an integrator. FIG. 6 is a block diagram showing an example of a data demodulation circuit, and a timing chart for explaining its operation. I... Integrator, OP... Operational amplifier, C... Integrating capacitor, PF... Positive feedback circuit.

Claims (1)

【実用新案登録請求の範囲】 (1) 積分器において、その出力の一部を入力に
正帰還する手段を設けたことを特徴とする積分回
路。 (2) 上記正帰還手段が上記積分器の入出力間に
接続された抵抗減衰回路から成ることを特徴とす
る実用新案登録請求の範囲第１項記載の積分回路
。 (3) 上記積分器入力が、スペクトラム拡散受信
機の相関器からの相関スパイクであることを特徴
とする実用新案登録請求の範囲第１項記載の積分
回路。[Claims for Utility Model Registration] (1) An integrator circuit characterized in that an integrator is provided with means for positively feeding back part of its output to its input. (2) The integrating circuit according to claim 1, wherein the positive feedback means comprises a resistive attenuation circuit connected between the input and output of the integrator. (3) The integrating circuit according to claim 1, wherein the integrator input is a correlation spike from a correlator of a spread spectrum receiver.
JP1988002200U 1988-01-12 1988-01-12 Expired - Lifetime JPH0525003Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1988002200U JPH0525003Y2 (en) 1988-01-12 1988-01-12

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1988002200U JPH0525003Y2 (en) 1988-01-12 1988-01-12

Publications (2)

Publication Number Publication Date
JPH01106962U true JPH01106962U (en) 1989-07-19
JPH0525003Y2 JPH0525003Y2 (en) 1993-06-24

Family

ID=31202764

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1988002200U Expired - Lifetime JPH0525003Y2 (en) 1988-01-12 1988-01-12

Country Status (1)

Country Link
JP (1) JPH0525003Y2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8829972B2 (en) 2011-07-07 2014-09-09 Hanwa Electronic Ind. Co., Ltd. Integral value measuring circuit

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5244137A (en) * 1975-10-03 1977-04-06 Japan Storage Battery Co Ltd Analog integration circuit
JPS56103766A (en) * 1980-01-18 1981-08-19 Norio Akamatsu Integrating circuit
JPS62257224A (en) * 1986-04-30 1987-11-09 Nec Home Electronics Ltd Method and apparatus for spread spectrum power line carrier communication

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5244137A (en) * 1975-10-03 1977-04-06 Japan Storage Battery Co Ltd Analog integration circuit
JPS56103766A (en) * 1980-01-18 1981-08-19 Norio Akamatsu Integrating circuit
JPS62257224A (en) * 1986-04-30 1987-11-09 Nec Home Electronics Ltd Method and apparatus for spread spectrum power line carrier communication

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8829972B2 (en) 2011-07-07 2014-09-09 Hanwa Electronic Ind. Co., Ltd. Integral value measuring circuit

Also Published As

Publication number Publication date
JPH0525003Y2 (en) 1993-06-24

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