JPH01113423U - - Google Patents
Info
- Publication number
- JPH01113423U JPH01113423U JP860088U JP860088U JPH01113423U JP H01113423 U JPH01113423 U JP H01113423U JP 860088 U JP860088 U JP 860088U JP 860088 U JP860088 U JP 860088U JP H01113423 U JPH01113423 U JP H01113423U
- Authority
- JP
- Japan
- Prior art keywords
- phase
- locked loop
- circuit
- loop circuit
- follows
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000013078 crystal Substances 0.000 claims 1
- 238000001514 detection method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
Landscapes
- Synchronizing For Television (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Description
第１図は本考案の実施例に係る標準周波数発生
回路を示すブロツク図である。
１；カラーバースト抽出回路、２；第１の位相
固定ループ（ＰＬＬ）回路、３，１１；電圧制御
発振器（ＶＣＸＯ）、４，１０；位相比較器（Ｐ
Ｄ）、５，１３；ループフイルタ（ＬＰＦ）、６
；スイツチ、７；ロツク外れ検知回路、８；第２
のＰＬＬ回路、９；第１の分周器、１２；第２の
分周器。
FIG. 1 is a block diagram showing a standard frequency generating circuit according to an embodiment of the present invention. 1; Color burst extraction circuit; 2; First phase locked loop (PLL) circuit; 3, 11; Voltage controlled oscillator (VCXO); 4, 10; Phase comparator (P
D), 5, 13; Loop filter (LPF), 6
;Switch, 7;Unlock detection circuit, 8;Second
PLL circuit, 9; first frequency divider, 12; second frequency divider.
Claims (1)
された高安定水晶発振器からなる電圧制御発振器
を備え外部からの基準信号に追従する第１の位相
固定ループ回路と、この第１の位相固定ループ回
路の前記電圧制御発振器の出力に追従する第２の
位相固定ループ回路と、前記第１の位相固定ルー
プ回路のロツク外れを検出し前記第１の位相固定
ループ回路のループを切断する手段とを具備した
ことを特徴とする標準周波数発生回路。 A first phase-locked loop circuit that includes a voltage-controlled oscillator made of a highly stable crystal oscillator whose frequency variable range is suppressed to approximately the same level of stability accuracy and follows an external reference signal, and this first phase-locked loop. a second phase-locked loop circuit that follows the output of the voltage controlled oscillator of the circuit; and means for detecting lock-out of the first phase-locked loop circuit and breaking the loop of the first phase-locked loop circuit. A standard frequency generation circuit characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP860088U JPH01113423U (en) | 1988-01-26 | 1988-01-26 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP860088U JPH01113423U (en) | 1988-01-26 | 1988-01-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01113423U true JPH01113423U (en) | 1989-07-31 |
Family
ID=31214621
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP860088U Pending JPH01113423U (en) | 1988-01-26 | 1988-01-26 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01113423U (en) |
-
1988
- 1988-01-26 JP JP860088U patent/JPH01113423U/ja active Pending
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